init_cs.h

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

/*
===============================================================================
            TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION           
                                                                             
   Property of Texas Instruments 
   For  Unrestricted  Internal  Use  Only 
   Unauthorized reproduction and/or distribution is strictly prohibited.  
   This product is protected under copyright law and trade secret law 
   as an unpublished work.  
   Created 1999, (C) Copyright 1999 Texas Instruments.  All rights reserved.

   Filename       	: init_cs.h

   Description    	: Header file for the ARM925ST initialization of Chip select

   Project        	: ARM925ST

   Author         	: Francis Huguenin [e-mail]
   FUNCTIONS PROVIDED    :
	INITCS_DebugConfig :initialize Cselect 0,1,2,3,4 for debug configuration
	INITCS_TestConfig  :initialize Cselect 0,1,2,3,4 for test configuration
	INITCS_BoardConfig :initialize Cselect 0,1,2,3,4 for board configuration

===============================================================================
*/
#ifndef _INIT_CS__HH
#define _INIT_CS__HH

typedef enum {
  CS0   = 0,
  CS1   = 1,
  CS2   = 2,
  CS3   = 3,
  CS4   = 4
  // for CS6 nothing to do
} CsId_t;

// PARAMATERS FOR SDRAM  NEC UPD4564163 1 Mo * 16 (data bits)* 4 banks */
// Auto Refresh Counter = 64 ms / Nbr Rows * 65MHz * autorefresh burst length - 40
//                      = 64 ms / 4096 * 65 MHz * 1 - 40 
#define AUTO_REFRESH_COUNTER_VALUE_13_MHZ 			163
#define AUTO_REFRESH_COUNTER_VALUE_65_MHZ 			975
// For NEC UPD4564163 64 Mbit
#define SDRAM_TYPE_64MBITS_4BANK_16DATA 				7
// For MICRON 48LC32M8A2 64 Mbit (tst config)
#define SDRAM_TYPE_256MBITS_4BANK_8DATA 				13
// For MICRON 48LC8M8A2 2 meg x 8 x 4 banks (board config) 9
#define SDRAM_TYPE_128MBITS_4BANK_8DATA 				5
// For MICRON 48LC8M16A2 128 Mbit
#define SDRAM_TYPE_128MBITS_4BANK_16DATA 				11
// For INFINEON HYB39S256160AT 256 Mbit
#define SDRAM_TYPE_256MBITS_4BANK_16DATA 				15
 
#define FREQUENCY_DOMAIN 						         MIF_SDRAM_FREQ_0


void INITCS_DebugConfig(CsId_t cs_id);
void INITCS_TestConfig(CsId_t cs_id);
void INITCS_BoardConfig(CsId_t cs_id);
void INITCS_Cs4MicronBoardConfig(void);

void INITCS_InitTtbValidCacheForBoardConfig(void);


#endif