synctimer.h

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

/*Header modified by DSP-CONVERT V1.01 Script on  Tue Aug 13 14:51:47 MEST 2002*/
//========================================================================
//          TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION  
//   Property of Texas Instruments
//   For Unrestricted Internal Use Only
//   Unauthorized reprofuction and/or distribution is strictly prohibited.
//   This product is protected under copyright law and trade secret law
//   as an unpublished work
//   Created 2000,  (C) Copyright 2000 Texas Instruments. All rights reserved
//
//
//   Filename           :synctimer.h
//
//   Date of Module Modification:3/7/02
//   Date of Generation :4/18/02
//
//
//========================================================================
#include "mapping.h"
#ifndef _SYNCTIMER__H
#define _SYNCTIMER__H

//BEGIN INC GENERATION
//--------------------------------------


#ifndef DSP_ADJUST              /* If DSP_ADJUST is not defined, we are using */
#define DSP_ADJUST              /* include file for ARM code, we do not need any */
#endif                          /* modufucations. If this file is used for DSP code, */

//Register Offset
//-------------------
#define coeff8_arm   1
#define coeff16_arm  1
#define coeff32_arm  1

//-------------------

#define            SYNCTIMER_SYNCT32K_REV_OFFSET                                                                       (0x00 DSP_ADJUST)
#define            SYNCTIMER_CR_OFFSET                                                                                 (0x10 DSP_ADJUST)


#ifndef DSP_ACCESS



//SYNCTIMER_SYNCT32K_REV

#endif /* DSP_ACCESS */


#ifndef DSP_ACCESS
#define            SYNCTIMER_SYNCT32K_REV_16_0                                                                         REG16(SYNCTIMER_BASE_ADDR_ARM+SYNCTIMER_SYNCT32K_REV_OFFSET*coeff16_arm+0)
#else
#define            SYNCTIMER_SYNCT32K_REV_16_0                                                                         REG16(SYNCTIMER_BASE_ADDR_DSP+SYNCTIMER_SYNCT32K_REV_OFFSET)
#endif


#define            SYNCTIMER_SYNCT32K_REV_16_0_CID_REV_POS                                                               0
#define            SYNCTIMER_SYNCT32K_REV_16_0_CID_REV_NUMB                                                              32
#define            SYNCTIMER_SYNCT32K_REV_16_0_CID_REV_RES_VAL                                                           0x00000010
//R



#ifndef DSP_ACCESS
#define            SYNCTIMER_SYNCT32K_REV_16_2                                                                         REG16(SYNCTIMER_BASE_ADDR_ARM+SYNCTIMER_SYNCT32K_REV_OFFSET*coeff16_arm+2)
#else
#define            SYNCTIMER_SYNCT32K_REV_16_2                                                                         REG16(SYNCTIMER_BASE_ADDR_DSP+SYNCTIMER_SYNCT32K_REV_OFFSET+1)
#endif


#define            SYNCTIMER_SYNCT32K_REV_16_2_CID_REV_POS                                                               0
#define            SYNCTIMER_SYNCT32K_REV_16_2_CID_REV_NUMB                                                              32
#define            SYNCTIMER_SYNCT32K_REV_16_2_CID_REV_RES_VAL                                                           0x00000010

#ifndef DSP_ACCESS

#define            SYNCTIMER_SYNCT32K_REV_32                                                                           REG32(SYNCTIMER_BASE_ADDR_ARM+SYNCTIMER_SYNCT32K_REV_OFFSET*coeff32_arm)


#define            SYNCTIMER_SYNCT32K_REV_32_CID_REV_POS                                                                 0
#define            SYNCTIMER_SYNCT32K_REV_32_CID_REV_NUMB                                                                32
#define            SYNCTIMER_SYNCT32K_REV_32_CID_REV_RES_VAL                                                             0x00000011
//R


//SYNCTIMER_CR

#endif /* DSP_ACCESS */


#ifndef DSP_ACCESS
#define            SYNCTIMER_CR_16_0                                                                                   REG16(SYNCTIMER_BASE_ADDR_ARM+SYNCTIMER_CR_OFFSET*coeff16_arm+0)
#else
#define            SYNCTIMER_CR_16_0                                                                                   REG16(SYNCTIMER_BASE_ADDR_DSP+SYNCTIMER_CR_OFFSET)
#endif


#define            SYNCTIMER_CR_16_0_COUNTER_VALUE_POS                                                                   0
#define            SYNCTIMER_CR_16_0_COUNTER_VALUE_NUMB                                                                  32
#define            SYNCTIMER_CR_16_0_COUNTER_VALUE_RES_VAL                                                               0x00000003
//R



#ifndef DSP_ACCESS
#define            SYNCTIMER_CR_16_2                                                                                   REG16(SYNCTIMER_BASE_ADDR_ARM+SYNCTIMER_CR_OFFSET*coeff16_arm+2)
#else
#define            SYNCTIMER_CR_16_2                                                                                   REG16(SYNCTIMER_BASE_ADDR_DSP+SYNCTIMER_CR_OFFSET+1)
#endif


#define            SYNCTIMER_CR_16_2_COUNTER_VALUE_POS                                                                   0
#define            SYNCTIMER_CR_16_2_COUNTER_VALUE_NUMB                                                                  32
#define            SYNCTIMER_CR_16_2_COUNTER_VALUE_RES_VAL                                                               0x00000003

#ifndef DSP_ACCESS

#define            SYNCTIMER_CR_32                                                                                     REG32(SYNCTIMER_BASE_ADDR_ARM+SYNCTIMER_CR_OFFSET*coeff32_arm)


#define            SYNCTIMER_CR_32_COUNTER_VALUE_POS                                                                     0
#define            SYNCTIMER_CR_32_COUNTER_VALUE_NUMB                                                                    32
#define            SYNCTIMER_CR_32_COUNTER_VALUE_RES_VAL                                                                 0x00000003
//R

#endif

#endif