omap_32_ocpt.h

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

//========================================================================
//          TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION  
//   Property of Texas Instruments
//   For Unrestricted Internal Use Only
//   Unauthorized reprofuction and/or distribution is strictly prohibited.
//   This product is protected under copyright law and trade secret law
//   as an unpublished work
//   Created 2000,  (C) Copyright 2000 Texas Instruments. All rights reserved
//
//
//   Filename           :omap_32_ocpt.h
//
//   Date of Module Modification:4/26/02
//   Date of Generation :5/3/02
//
//
//========================================================================
#include "omap_32_mapping.h"
#ifndef _OCPT__H
#define _OCPT__H

//BEGIN INC GENERATION
//--------------------------------------


//Register Offset
//-------------------
#define            OCPT_OCPT1_PRIOR_OFFSET                                                                             0x00
#define            OCPT_OCPT1_PTOR1_OFFSET                                                                             0xA0
#define            OCPT_OCPT1_PTOR2_OFFSET                                                                             0xA4
#define            OCPT_OCPT1_PTOR3_OFFSET                                                                             0xA8
#define            OCPT_OCPT1_ATOR_OFFSET                                                                              0xAC
#define            OCPT_OCPT1_AADDR_OFFSET                                                                             0xB0
#define            OCPT_OCPT1_ATYPER_OFFSET                                                                            0xB4
#define            OCPT_OCPT_CONFIG_REG_OFFSET                                                                         0xB8
#define            OCPT_OCPT2_PRIOR_OFFSET                                                                             0xD0
#define            OCPT_OCPT2_PTOR1_OFFSET                                                                             0xD4
#define            OCPT_OCPT2_PTOR2_OFFSET                                                                             0xD8
#define            OCPT_OCPT2_PTOR3_OFFSET                                                                             0xDC
#define            OCPT_OCPT2_ATOR_OFFSET                                                                              0xE0
#define            OCPT_OCPT2_AADDR_OFFSET                                                                             0xE4
#define            OCPT_OCPT2_ATYPER_OFFSET                                                                            0xE8




//OCPT_OCPT1_PRIOR
//-------------------
#define            OCPT_OCPT1_PRIOR                                                                                    REG32(OCPT_BASE_ADDR_ARM+OCPT_OCPT1_PRIOR_OFFSET)


//R/W

#define            OCPT_OCPT1_PRIOR_OCPI_PRIORITY_POS                                                                    12
#define            OCPT_OCPT1_PRIOR_OCPI_PRIORITY_NUMB                                                                   4
#define            OCPT_OCPT1_PRIOR_OCPI_PRIORITY_RES_VAL                                                                0x0
//R/W

#define            OCPT_OCPT1_PRIOR_DMA_PRIORITY_POS                                                                     8
#define            OCPT_OCPT1_PRIOR_DMA_PRIORITY_NUMB                                                                    4
#define            OCPT_OCPT1_PRIOR_DMA_PRIORITY_RES_VAL                                                                 0x0
//R/W

//R/W

#define            OCPT_OCPT1_PRIOR_DSP_PRIORITY_POS                                                                     4
#define            OCPT_OCPT1_PRIOR_DSP_PRIORITY_NUMB                                                                    3
#define            OCPT_OCPT1_PRIOR_DSP_PRIORITY_RES_VAL                                                                 0x0
//R/W

//R/W

#define            OCPT_OCPT1_PRIOR_ARM_PRIORITY_POS                                                                     0
#define            OCPT_OCPT1_PRIOR_ARM_PRIORITY_NUMB                                                                    3
#define            OCPT_OCPT1_PRIOR_ARM_PRIORITY_RES_VAL                                                                 0x0
//R/W


//OCPT_OCPT1_PTOR1
//-------------------
#define            OCPT_OCPT1_PTOR1                                                                                    REG32(OCPT_BASE_ADDR_ARM+OCPT_OCPT1_PTOR1_OFFSET)

//R/W

#define            OCPT_OCPT1_PTOR1_DMA_POS                                                                              0
#define            OCPT_OCPT1_PTOR1_DMA_NUMB                                                                             8
#define            OCPT_OCPT1_PTOR1_DMA_RES_VAL                                                                          0x0
//R/W


//OCPT_OCPT1_PTOR2
//-------------------
#define            OCPT_OCPT1_PTOR2                                                                                    REG32(OCPT_BASE_ADDR_ARM+OCPT_OCPT1_PTOR2_OFFSET)


//R/W

#define            OCPT_OCPT1_PTOR2_DSP_POS                                                                              16
#define            OCPT_OCPT1_PTOR2_DSP_NUMB                                                                             8
#define            OCPT_OCPT1_PTOR2_DSP_RES_VAL                                                                          0x0
//R/W

//R/W

#define            OCPT_OCPT1_PTOR2_LCD_POS                                                                              0
#define            OCPT_OCPT1_PTOR2_LCD_NUMB                                                                             9
#define            OCPT_OCPT1_PTOR2_LCD_RES_VAL                                                                          0x0
//R/W


//OCPT_OCPT1_PTOR3
//-------------------
#define            OCPT_OCPT1_PTOR3                                                                                    REG32(OCPT_BASE_ADDR_ARM+OCPT_OCPT1_PTOR3_OFFSET)


//R/W

#define            OCPT_OCPT1_PTOR3_OCPI_POS                                                                             0
#define            OCPT_OCPT1_PTOR3_OCPI_NUMB                                                                            9
#define            OCPT_OCPT1_PTOR3_OCPI_RES_VAL                                                                         0x0
//R/W


//OCPT_OCPT1_ATOR
//-------------------
#define            OCPT_OCPT1_ATOR                                                                                     REG32(OCPT_BASE_ADDR_ARM+OCPT_OCPT1_ATOR_OFFSET)


//R/W

#define            OCPT_OCPT1_ATOR_TIMEOUT_EN_POS                                                                        8
#define            OCPT_OCPT1_ATOR_TIMEOUT_EN_NUMB                                                                       1
#define            OCPT_OCPT1_ATOR_TIMEOUT_EN_RES_VAL                                                                    0x1
//R/W

#define            OCPT_OCPT1_ATOR_TIMEOUT_POS                                                                           0
#define            OCPT_OCPT1_ATOR_TIMEOUT_NUMB                                                                          8
#define            OCPT_OCPT1_ATOR_TIMEOUT_RES_VAL                                                                       0xFF
//R/W


//OCPT_OCPT1_AADDR
//-------------------
#define            OCPT_OCPT1_AADDR                                                                                    REG32(OCPT_BASE_ADDR_ARM+OCPT_OCPT1_AADDR_OFFSET)


#define            OCPT_OCPT1_AADDR_ADDRESS_POS                                                                          0
#define            OCPT_OCPT1_AADDR_ADDRESS_NUMB                                                                         32
#define            OCPT_OCPT1_AADDR_ADDRESS_RES_VAL                                                                      0x0
//R


//OCPT_OCPT1_ATYPER
//-------------------
#define            OCPT_OCPT1_ATYPER                                                                                   REG32(OCPT_BASE_ADDR_ARM+OCPT_OCPT1_ATYPER_OFFSET)


//R/W

#define            OCPT_OCPT1_ATYPER_TIMEOUT_ERR_POS                                                                     4
#define            OCPT_OCPT1_ATYPER_TIMEOUT_ERR_NUMB                                                                    1
#define            OCPT_OCPT1_ATYPER_TIMEOUT_ERR_RES_VAL                                                                 0x0
//R

#define            OCPT_OCPT1_ATYPER_BUS_ERR_POS                                                                         3
#define            OCPT_OCPT1_ATYPER_BUS_ERR_NUMB                                                                        1
#define            OCPT_OCPT1_ATYPER_BUS_ERR_RES_VAL                                                                     0x0
//R