errorcodes.h~

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

// -------------------------
#define  GPIO3_GPIO_REVISION_32_BAD_RESET_VALUE         0X809F
#define  GPIO3_GPIO_SYSCONFIG_32_BAD_RESET_VALUE        0X80A0
#define  GPIO3_GPIO_SYSSTATUS_32_BAD_RESET_VALUE        0X80A1
#define  GPIO3_GPIO_IRQSTATUS1_32_BAD_RESET_VALUE       0X80A2
#define  GPIO3_GPIO_IRQENABLE1_32_BAD_RESET_VALUE       0X80A3
#define  GPIO3_GPIO_IRQSTATUS2_32_BAD_RESET_VALUE       0X80A4
#define  GPIO3_GPIO_IRQENABLE2_32_BAD_RESET_VALUE       0X80A5
#define  GPIO3_GPIO_WAKEUPENABLE_32_BAD_RESET_VALUE     0X80A6
#define  GPIO3_GPIO_DATAIN_32_BAD_RESET_VALUE           0X80A7
#define  GPIO3_GPIO_DATAOUT_32_BAD_RESET_VALUE          0X80A8
#define  GPIO3_GPIO_DIRECTION_32_BAD_RESET_VALUE        0X80A9
#define  GPIO3_GPIO_EDGE_CTRL1_32_BAD_RESET_VALUE       0X80AA
#define  GPIO3_GPIO_EDGE_CTRL2_32_BAD_RESET_VALUE       0X80AB
#define  GPIO3_GPIO_CLEAR_IRQENABLE1_32_BAD_RESET_VALUE 0X80AC
#define  GPIO3_GPIO_CLEAR_IRQENABLE2_32_BAD_RESET_VALUE 0X80AD
#define  GPIO3_GPIO_CLEAR_WAKEUPENA_32_BAD_RESET_VALUE  0X80AE
#define  GPIO3_GPIO_CLEAR_DATAOUT_32_BAD_RESET_VALUE    0X80AF
#define  GPIO3_GPIO_SET_IRQENABLE1_32_BAD_RESET_VALUE   0X80B0
#define  GPIO3_GPIO_SET_IRQENABLE2_32_BAD_RESET_VALUE   0X80B1
#define  GPIO3_GPIO_SET_WAKEUPENA_32_BAD_RESET_VALUE    0X80B2
#define  GPIO3_GPIO_SET_DATAOUT_32_BAD_RESET_VALUE      0X80B3


// -------------------------
// Error codes for the GPIO4
// -------------------------
#define  GPIO4_GPIO_REVISION_32_BAD_RESET_VALUE         0X80B4
#define  GPIO4_GPIO_SYSCONFIG_32_BAD_RESET_VALUE        0X80B5
#define  GPIO4_GPIO_SYSSTATUS_32_BAD_RESET_VALUE        0X80B6
#define  GPIO4_GPIO_IRQSTATUS1_32_BAD_RESET_VALUE       0X80B7
#define  GPIO4_GPIO_IRQENABLE1_32_BAD_RESET_VALUE       0X80B8
#define  GPIO4_GPIO_IRQSTATUS2_32_BAD_RESET_VALUE       0X80B9
#define  GPIO4_GPIO_IRQENABLE2_32_BAD_RESET_VALUE       0X80BA
#define  GPIO4_GPIO_WAKEUPENABLE_32_BAD_RESET_VALUE     0X80BB
#define  GPIO4_GPIO_DATAIN_32_BAD_RESET_VALUE           0X80BC
#define  GPIO4_GPIO_DATAOUT_32_BAD_RESET_VALUE          0X80BD
#define  GPIO4_GPIO_DIRECTION_32_BAD_RESET_VALUE        0X80BE
#define  GPIO4_GPIO_EDGE_CTRL1_32_BAD_RESET_VALUE       0X80BF
#define  GPIO4_GPIO_EDGE_CTRL2_32_BAD_RESET_VALUE       0X80C0
#define  GPIO4_GPIO_CLEAR_IRQENABLE1_32_BAD_RESET_VALUE 0X80C1
#define  GPIO4_GPIO_CLEAR_IRQENABLE2_32_BAD_RESET_VALUE 0X80C2
#define  GPIO4_GPIO_CLEAR_WAKEUPENA_32_BAD_RESET_VALUE  0X80C3
#define  GPIO4_GPIO_CLEAR_DATAOUT_32_BAD_RESET_VALUE    0X80C4
#define  GPIO4_GPIO_SET_IRQENABLE1_32_BAD_RESET_VALUE   0X80C5
#define  GPIO4_GPIO_SET_IRQENABLE2_32_BAD_RESET_VALUE   0X80C6
#define  GPIO4_GPIO_SET_WAKEUPENA_32_BAD_RESET_VALUE    0X80C7
#define  GPIO4_GPIO_SET_DATAOUT_32_BAD_RESET_VALUE      0X80C8

// -------------------------
// Error codes for the GPIO
// -------------------------
//Reset value errors
#define DATA_INPUT_REG_BAD_RESET_VALUE                  0X80C9
#define DATA_OUTPUT_REG_BAD_RESET_VALUE                 0X80CA
#define DIR_CTRL_REG_BAD_RESET_VALUE                    0X80CB
#define IT_CTRL_REG_BAD_RESET_VALUE                     0X80CC
#define IT_MASK_REG_BAD_RESET_VALUE                     0X80CD
#define IT_STS_REG_BAD_RESET_VALUE                      0X80CE
#define ARM_PIN_CTRL_REG_BAD_RESET_VALUE                0X80CF

//Test module errors
#define GPIO_BAD_DATA_REREAD_IN_MEMORY                  0X80D0


// -----------------------------
// Error codes for the NANDFLASH
// -----------------------------
#define  NDFLASH_NND_REVISION_32_BAD_RESET_VALUE        0X80D1
#define  NDFLASH_NND_ACCESS_32_BAD_RESET_VALUE          0X80D2
#define  NDFLASH_NND_ADDR_SRC_32_BAD_RESET_VALUE        0X80D3
#define  NDFLASH_NND_RESVD_32_BAD_RESET_VALUE           0X80D4
#define  NDFLASH_NND_CTRL_32_BAD_RESET_VALUE            0X80D5
#define  NDFLASH_NND_MASK_32_BAD_RESET_VALUE            0X80D6
#define  NDFLASH_NND_STATUS_32_BAD_RESET_VALUE          0X80D7
#define  NDFLASH_NND_READY_32_BAD_RESET_VALUE           0X80D8
#define  NDFLASH_NND_COMMAND_32_BAD_RESET_VALUE         0X80D9
#define  NDFLASH_NND_COMMAND_SEC_32_BAD_RESET_VALUE     0X80DA
#define  NDFLASH_NND_ECC_SELECT_32_BAD_RESET_VALUE      0X80DB
#define  NDFLASH_NND_ECC1_32_BAD_RESET_VALUE            0X80DC
#define  NDFLASH_NND_ECC2_32_BAD_RESET_VALUE            0X80DD
#define  NDFLASH_NND_ECC3_32_BAD_RESET_VALUE            0X80DE
#define  NDFLASH_NND_ECC4_32_BAD_RESET_VALUE            0X80DF
#define  NDFLASH_NND_ECC5_32_BAD_RESET_VALUE            0X80E0
#define  NDFLASH_NND_ECC6_32_BAD_RESET_VALUE            0X80E1
#define  NDFLASH_NND_ECC7_32_BAD_RESET_VALUE            0X80E2
#define  NDFLASH_NND_ECC8_32_BAD_RESET_VALUE            0X80E3
#define  NDFLASH_NND_ECC9_32_BAD_RESET_VALUE            0X80E4
#define  NDFLASH_NND_RESET_32_BAD_RESET_VALUE           0X80E5
#define  NDFLASH_NND_FIFO_32_BAD_RESET_VALUE            0X80E6
#define  NDFLASH_NND_FIFOCTRL_32_BAD_RESET_VALUE        0X80E7
#define  NDFLASH_NND_PSC_CLK_32_BAD_RESET_VALUE         0X80E8
#define  NDFLASH_NND_SYSTEST_32_BAD_RESET_VALUE         0X80E9
#define  NDFLASH_NND_SYSCFG_32_BAD_RESET_VALUE          0X80EA
#define  NDFLASH_NND_SYSSTATUS_32_BAD_RESET_VALUE       0X80EB
#define  NDFLASH_NND_FIFOTEST1_32_BAD_RESET_VALUE       0X80EC
#define  NDFLASH_NND_FIFOTEST2_32_BAD_RESET_VALUE       0X80ED
#define  NDFLASH_NND_FIFOTEST3_32_BAD_RESET_VALUE       0X80EE
#define  NDFLASH_NND_FIFOTEST4_32_BAD_RESET_VALUE       0X80EF
#define  NDFLASH_NND_BAD_DATA                           0X80F0
#define  NDFLASH_NND_BAD_ID                             0X80F1

// -----------------------
// Error codes for the SPI
// -----------------------
#define  SPI_REV_32_BAD_RESET_VALUE                     0X80F2
#define  SPI_SCR_32_BAD_RESET_VALUE                     0X80F3
#define  SPI_SSR_32_BAD_RESET_VALUE                     0X80F4
#define  SPI_ISR_32_BAD_RESET_VALUE                     0X80F5
#define  SPI_IER_32_BAD_RESET_VALUE                     0X80F6
#define  SPI_SET1_32_BAD_RESET_VALUE                    0X80F7
#define  SPI_SET2_32_BAD_RESET_VALUE                    0X80F8
#define  SPI_CTRL_32_BAD_RESET_VALUE                    0X80F9
#define  SPI_DSR_32_BAD_RESET_VALUE                     0X80FA
#define  SPI_TX_32_BAD_RESET_VALUE                      0X80FB
#define  SPI_RX_32_BAD_RESET_VALUE                      0X80FC
#define  SPI_TEST_32_BAD_RESET_VALUE                    0X80FD
#define	 ERR_SPI_WE_IT                                  0X80FE
#define	 ERR_SPI_RE_IT                                  0X80FF
#define	 ERR_SPI_OVERF_IT                               0X8100
#define	 ERR_SPI_UNDERF_IT                              0X8101

// -----------------------
// Error codes for the SST
// -----------------------
#define  SST_ID_32_BAD_RESET_VALUE                      0X8102
#define  SST_MODE_32_BAD_RESET_VALUE                    0X8103
#define  SST_FRAMESIZE_32_BAD_RESET_VALUE               0X8104
#define  SST_TXSTATE_32_BAD_RESET_VALUE                 0X8105
#define  SST_BUFSTATE_32_BAD_RESET_VALUE                0X8106
#define  SST_DIVISOR_32_BAD_RESET_VALUE                 0X8107
#define  SST_BREAK_32_BAD_RESET_VALUE                   0X8108
#define  SST_CHANNELS_32_BAD_RESET_VALUE                0X8109
#define  SST_ARBMODE_32_BAD_RESET_VALUE                 0X810A
#define  SST_BUFFER_CH0_32_BAD_RESET_VALUE              0X810B
#define  SST_BUFFER_CH1_32_BAD_RESET_VALUE              0X810C
#define  SST_BUFFER_CH2_32_BAD_RESET_VALUE              0X810D
#define  SST_BUFFER_CH3_32_BAD_RESET_VALUE              0X810E
#define  SST_BUFFER_CH4_32_BAD_RESET_VALUE              0X810F
#define  SST_BUFFER_CH5_32_BAD_RESET_VALUE              0X8110
#define  SST_BUFFER_CH6_32_BAD_RESET_VALUE              0X8111
#define  SST_BUFFER_CH7_32_BAD_RESET_VALUE              0X8112
#define  SST_SWAPBUFFER_CH0_32_BAD_RESET_VALUE          0X8113
#define  SST_SWAPBUFFER_CH1_32_BAD_RESET_VALUE          0X8114
#define  SST_SWAPBUFFER_CH2_32_BAD_RESET_VALUE          0X8115
#define  SST_SWAPBUFFER_CH3_32_BAD_RESET_VALUE          0X8116
#define  SST_SWAPBUFFER_CH4_32_BAD_RESET_VALUE          0X8117
#define  SST_SWAPBUFFER_CH5_32_BAD_RESET_VALUE          0X8118
#define  SST_SWAPBUFFER_CH6_32_BAD_RESET_VALUE          0X8119
#define  SST_SWAPBUFFER_CH7_32_BAD_RESET_VALUE          0X811A

#define  ERR_SST_IT_FIFO_EMPT_CH0                       0X811B
#define  ERR_SST_IT_FIFO_EMPT_CH1                       0X811C
#define  ERR_SST_IT_FIFO_EMPT_CH2                       0X811D
#define  ERR_SST_IT_FIFO_EMPT_CH3                       0X811E
#define  ERR_SST_IT_FIFO_EMPT_CH4                       0X811F
#define  ERR_SST_IT_FIFO_EMPT_CH5                       0X8120
#define  ERR_SST_IT_FIFO_EMPT_CH6                       0X8121
#define  ERR_SST_IT_FIFO_EMPT_CH7                       0X8122


#define  ERR_SSI_TX_RX_CH0                              0X8123
#define  ERR_SSI_TX_RX_CH1                              0X8124
#define  ERR_SSI_TX_RX_CH2                              0X8125
#define  ERR_SSI_TX_RX_CH3                              0X8126
#define  ERR_SSI_TX_RX_CH4                              0X8127
#define  ERR_SSI_TX_RX_CH5                              0X8128
#define  ERR_SSI_TX_RX_CH6                              0X8129
#define  ERR_SSI_TX_RX_CH7                              0X812A

#define  SSI_ERROR_DMA_TRANSFERT		     	              0X812B


// -----------------------
// Error codes for the SSR
// -----------------------
#define  SSR_ID_32_BAD_RESET_VALUE                      0X812C
#define  SSR_MODE_32_BAD_RESET_VALUE                    0X812D
#define  SSR_FRAMESIZE_32_BAD_RESET_VALUE               0X812E
#define  SSR_RXSTATE_32_BAD_RESET_VALUE                 0X812F
#define  SSR_BUFSTATE_32_BAD_RESET_VALUE                0X8130
#define  SSR_BREAK_32_BAD_RESET_VALUE                   0X8131
#define  SSR_ERROR_32_BAD_RESET_VALUE                   0X8132
#define  SSR_ERRORACK_32_BAD_RESET_VALUE                0X8133
#define  SSR_CHANNELS_32_BAD_RESET_VALUE                0X8134
#define  SSR_OVERRUN_32_BAD_RESET_VALUE                 0X8135
#define  SSR_OVERRUNACK_32_BAD_RESET_VALUE              0X8136
#define  SSR_TIMEOUT_32_BAD_RESET_VALUE                 0X8137
#define  SSR_BUFFER_CH0_32_BAD_RESET_VALUE              0X8138
#define  SSR_BUFFER_CH1_32_BAD_RESET_VALUE              0X8139
#define  SSR_BUFFER_CH2_32_BAD_RESET_VALUE              0X813A
#define  SSR_BUFFER_CH3_32_BAD_RESET_VALUE              0X813B
#define  SSR_BUFFER_CH4_32_BAD_RESET_VALUE              0X813C
#define  SSR_BUFFER_CH5_32_BAD_RESET_VALUE              0X813D
#define  SSR_BUFFER_CH6_32_BAD_RESET_VALUE              0X813E
#define  SSR_BUFFER_CH7_32_BAD_RESET_VALUE              0X813F
#define  SSR_SWAPBUFFER_CH0_32_BAD_RESET_VALUE          0X8140
#define  SSR_SWAPBUFFER_CH1_32_BAD_RESET_VALUE          0X8141
#define  SSR_SWAPBUFFER_CH2_32_BAD_RESET_VALUE          0X8142
#define  SSR_SWAPBUFFER_CH3_32_BAD_RESET_VALUE          0X8143
#define  SSR_SWAPBUFFER_CH4_32_BAD_RESET_VALUE          0X8144
#define  SSR_SWAPBUFFER_CH5_32_BAD_RESET_VALUE          0X8145
#define  SSR_SWAPBUFFER_CH6_32_BAD_RESET_VALUE          0X8146
#define  SSR_SWAPBUFFER_CH7_32_BAD_RESET_VALUE          0X8147

#define  ERR_SSR_IT_FIFO_FULL_CH0                       0X8148
#define  ERR_SSR_IT_FIFO_FULL_CH1                       0X8149
#define  ERR_SSR_IT_FIFO_FULL_CH2                       0X814A
#define  ERR_SSR_IT_FIFO_FULL_CH3                       0X814B
#define  ERR_SSR_IT_FIFO_FULL_CH4                       0X814C
#define  ERR_SSR_IT_FIFO_FULL_CH5                       0X814D
#define  ERR_SSR_IT_FIFO_FULL_CH6                       0X814E
#define  ERR_SSR_IT_FIFO_FULL_CH7                       0X814F

#define  ERR_SSR_IT_OVERR_CH0                           0X8150
#define  ERR_SSR_IT_OVERR_CH1                           0X8151
#define  ERR_SSR_IT_OVERR_CH2                           0X8152
#define  ERR_SSR_IT_OVERR_CH3                           0X8153
#define  ERR_SSR_IT_OVERR_CH4                           0X8154
#define  ERR_SSR_IT_OVERR_CH5                           0X8155
#define  ERR_SSR_IT_OVERR_CH6                           0X8156
#define  ERR_SSR_IT_OVERR_CH7                           0X8157

// -------------------------------
// Error codes for the UART_MODEM1
// -------------------------------
#define  UART_MODEM1_RHR_BAD_RESET_VALUE                0X8158
#define  UART_MODEM1_THR_BAD_RESET_VALUE                0X8159
#define  UART_MODEM1_DLL_BAD_RESET_VALUE                0X815A
#define  UART_MODEM1_DLH_BAD_RESET_VALUE                0X815B
#define  UART_MODEM1_IER_BAD_RESET_VALUE                0X815C