errorcodes.h~

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

//========================================================================
//          TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
//   Property of Texas Instruments
//   For Unrestricted Internal Use Only
//   Unauthorized reprofuction and/or distribution is strictly prohibited.
//   This product is protected under copyright law and trade secret law
//   as an unpublished work
//   Created 2000,  (C) Copyright 2000 Texas Instruments. All rights reserved
//
//
//   Filename           :errorcodes.h
//
//   Date of Generation :4/24/02
//
//
//========================================================================


// General errors
#define GENERAL_EXT_FIQ_UNEXPECTED           0X8000
#define GENERAL_EXT_IRQ_UNEXPECTED           0X8001
#define GENERAL_FIQ_UNEXPECTED               0X8002
#define GENERAL_IRQ_UNEXPECTED               0X8003
#define GENERAL_ABORT_UNEXPECTED             0X8004

// ----------------------------------
// Error codes for the DUALMODETIMER1
// ----------------------------------
#define  DUALMODETIMER1_TIDR_32_BAD_RESET_VALUE 	      0X8005
#define  DUALMODETIMER1_TIOCP_CFG_32_BAD_RESET_VALUE    0X8006
#define  DUALMODETIMER1_TISTAT_32_BAD_RESET_VALUE  	    0X8007
#define  DUALMODETIMER1_TISR_32_BAD_RESET_VALUE         0X8008
#define  DUALMODETIMER1_TIER_32_BAD_RESET_VALUE         0X8009
#define  DUALMODETIMER1_TWER_32_BAD_RESET_VALUE         0X800A
#define  DUALMODETIMER1_TCLR_32_BAD_RESET_VALUE         0X800B
#define  DUALMODETIMER1_TCRR_32_BAD_RESET_VALUE         0X800C
#define  DUALMODETIMER1_TLDR_32_BAD_RESET_VALUE         0X800D
#define  DUALMODETIMER1_TTGR_32_BAD_RESET_VALUE         0X800E
#define  DUALMODETIMER1_TWPS_32_BAD_RESET_VALUE         0X800F
#define  DUALMODETIMER1_TMAR_32_BAD_RESET_VALUE         0X8010
#define  DUALMODETIMER1_TCAR_32_BAD_RESET_VALUE         0X8011
#define  DUALMODETIMER1_TSICR_32_BAD_RESET_VALUE  	    0X8012


// ----------------------------------
// Error codes for the DUALMODETIMER2
// ----------------------------------
#define  DUALMODETIMER2_TIDR_32_BAD_RESET_VALUE 	      0X8013
#define  DUALMODETIMER2_TIOCP_CFG_32_BAD_RESET_VALUE    0X8014
#define  DUALMODETIMER2_TISTAT_32_BAD_RESET_VALUE  	    0X8015
#define  DUALMODETIMER2_TISR_32_BAD_RESET_VALUE         0X8016
#define  DUALMODETIMER2_TIER_32_BAD_RESET_VALUE         0X8017
#define  DUALMODETIMER2_TWER_32_BAD_RESET_VALUE         0X8018
#define  DUALMODETIMER2_TCLR_32_BAD_RESET_VALUE         0X8019
#define  DUALMODETIMER2_TCRR_32_BAD_RESET_VALUE         0X801A
#define  DUALMODETIMER2_TLDR_32_BAD_RESET_VALUE         0X801B
#define  DUALMODETIMER2_TTGR_32_BAD_RESET_VALUE         0X801C
#define  DUALMODETIMER2_TWPS_32_BAD_RESET_VALUE         0X801D
#define  DUALMODETIMER2_TMAR_32_BAD_RESET_VALUE         0X801E
#define  DUALMODETIMER2_TCAR_32_BAD_RESET_VALUE         0X801F
#define  DUALMODETIMER2_TSICR_32_BAD_RESET_VALUE  	    0X8020


// ----------------------------------
// Error codes for the DUALMODETIMER3
// ----------------------------------
#define  DUALMODETIMER3_TIDR_32_BAD_RESET_VALUE 	      0X8021
#define  DUALMODETIMER3_TIOCP_CFG_32_BAD_RESET_VALUE    0X8022
#define  DUALMODETIMER3_TISTAT_32_BAD_RESET_VALUE  	    0X8023
#define  DUALMODETIMER3_TISR_32_BAD_RESET_VALUE         0X8024
#define  DUALMODETIMER3_TIER_32_BAD_RESET_VALUE         0X8025
#define  DUALMODETIMER3_TWER_32_BAD_RESET_VALUE         0X8026
#define  DUALMODETIMER3_TCLR_32_BAD_RESET_VALUE         0X8027
#define  DUALMODETIMER3_TCRR_32_BAD_RESET_VALUE         0X8028
#define  DUALMODETIMER3_TLDR_32_BAD_RESET_VALUE         0X8029
#define  DUALMODETIMER3_TTGR_32_BAD_RESET_VALUE         0X802A
#define  DUALMODETIMER3_TWPS_32_BAD_RESET_VALUE         0X802B
#define  DUALMODETIMER3_TMAR_32_BAD_RESET_VALUE         0X802C
#define  DUALMODETIMER3_TCAR_32_BAD_RESET_VALUE         0X802D
#define  DUALMODETIMER3_TSICR_32_BAD_RESET_VALUE  	    0X802E


// ----------------------------------
// Error codes for the DUALMODETIMER4
// ----------------------------------
#define  DUALMODETIMER4_TIDR_32_BAD_RESET_VALUE 	      0X802F
#define  DUALMODETIMER4_TIOCP_CFG_32_BAD_RESET_VALUE    0X8030
#define  DUALMODETIMER4_TISTAT_32_BAD_RESET_VALUE  	    0X8031
#define  DUALMODETIMER4_TISR_32_BAD_RESET_VALUE         0X8032
#define  DUALMODETIMER4_TIER_32_BAD_RESET_VALUE         0X8033
#define  DUALMODETIMER4_TWER_32_BAD_RESET_VALUE         0X8034
#define  DUALMODETIMER4_TCLR_32_BAD_RESET_VALUE         0X8035
#define  DUALMODETIMER4_TCRR_32_BAD_RESET_VALUE         0X8036
#define  DUALMODETIMER4_TLDR_32_BAD_RESET_VALUE         0X8037
#define  DUALMODETIMER4_TTGR_32_BAD_RESET_VALUE         0X8038
#define  DUALMODETIMER4_TWPS_32_BAD_RESET_VALUE         0X8039
#define  DUALMODETIMER4_TMAR_32_BAD_RESET_VALUE         0X803A
#define  DUALMODETIMER4_TCAR_32_BAD_RESET_VALUE         0X803B
#define  DUALMODETIMER4_TSICR_32_BAD_RESET_VALUE  	    0X803C


// ----------------------------------
// Error codes for the DUALMODETIMER5
// ----------------------------------
#define  DUALMODETIMER5_TIDR_32_BAD_RESET_VALUE 	      0X803D
#define  DUALMODETIMER5_TIOCP_CFG_32_BAD_RESET_VALUE    0X803E
#define  DUALMODETIMER5_TISTAT_32_BAD_RESET_VALUE  	    0X803F
#define  DUALMODETIMER5_TISR_32_BAD_RESET_VALUE         0X8040
#define  DUALMODETIMER5_TIER_32_BAD_RESET_VALUE         0X8041
#define  DUALMODETIMER5_TWER_32_BAD_RESET_VALUE         0X8042
#define  DUALMODETIMER5_TCLR_32_BAD_RESET_VALUE         0X8043
#define  DUALMODETIMER5_TCRR_32_BAD_RESET_VALUE         0X8044
#define  DUALMODETIMER5_TLDR_32_BAD_RESET_VALUE         0X8045
#define  DUALMODETIMER5_TTGR_32_BAD_RESET_VALUE         0X8046
#define  DUALMODETIMER5_TWPS_32_BAD_RESET_VALUE         0X8047
#define  DUALMODETIMER5_TMAR_32_BAD_RESET_VALUE         0X8048
#define  DUALMODETIMER5_TCAR_32_BAD_RESET_VALUE         0X8049
#define  DUALMODETIMER5_TSICR_32_BAD_RESET_VALUE  	    0X804A


// ----------------------------------
// Error codes for the DUALMODETIMER6
// ----------------------------------
#define  DUALMODETIMER6_TIDR_32_BAD_RESET_VALUE 	      0X804B
#define  DUALMODETIMER6_TIOCP_CFG_32_BAD_RESET_VALUE    0X804C
#define  DUALMODETIMER6_TISTAT_32_BAD_RESET_VALUE  	    0X804D
#define  DUALMODETIMER6_TISR_32_BAD_RESET_VALUE         0X804E
#define  DUALMODETIMER6_TIER_32_BAD_RESET_VALUE         0X804F
#define  DUALMODETIMER6_TWER_32_BAD_RESET_VALUE         0X8050
#define  DUALMODETIMER6_TCLR_32_BAD_RESET_VALUE         0X8051
#define  DUALMODETIMER6_TCRR_32_BAD_RESET_VALUE         0X8052
#define  DUALMODETIMER6_TLDR_32_BAD_RESET_VALUE         0X8053
#define  DUALMODETIMER6_TTGR_32_BAD_RESET_VALUE         0X8054
#define  DUALMODETIMER6_TWPS_32_BAD_RESET_VALUE         0X8055
#define  DUALMODETIMER6_TMAR_32_BAD_RESET_VALUE         0X8056
#define  DUALMODETIMER6_TCAR_32_BAD_RESET_VALUE         0X8057
#define  DUALMODETIMER6_TSICR_32_BAD_RESET_VALUE  	    0X8058


// ----------------------------------
// Error codes for the DUALMODETIMER7
// ----------------------------------
#define  DUALMODETIMER7_TIDR_32_BAD_RESET_VALUE 	      0X8059
#define  DUALMODETIMER7_TIOCP_CFG_32_BAD_RESET_VALUE    0X805A
#define  DUALMODETIMER7_TISTAT_32_BAD_RESET_VALUE  	    0X805B
#define  DUALMODETIMER7_TISR_32_BAD_RESET_VALUE         0X805C
#define  DUALMODETIMER7_TIER_32_BAD_RESET_VALUE         0X805D
#define  DUALMODETIMER7_TWER_32_BAD_RESET_VALUE         0X805E
#define  DUALMODETIMER7_TCLR_32_BAD_RESET_VALUE         0X805F
#define  DUALMODETIMER7_TCRR_32_BAD_RESET_VALUE         0X8060
#define  DUALMODETIMER7_TLDR_32_BAD_RESET_VALUE         0X8061
#define  DUALMODETIMER7_TTGR_32_BAD_RESET_VALUE         0X8062
#define  DUALMODETIMER7_TWPS_32_BAD_RESET_VALUE         0X8063
#define  DUALMODETIMER7_TMAR_32_BAD_RESET_VALUE         0X8064
#define  DUALMODETIMER7_TCAR_32_BAD_RESET_VALUE         0X8065
#define  DUALMODETIMER7_TSICR_32_BAD_RESET_VALUE  	    0X8066


// ----------------------------------
// Error codes for the DUALMODETIMER8
// ----------------------------------
#define  DUALMODETIMER8_TIDR_32_BAD_RESET_VALUE 	      0X8067
#define  DUALMODETIMER8_TIOCP_CFG_32_BAD_RESET_VALUE    0X8068
#define  DUALMODETIMER8_TISTAT_32_BAD_RESET_VALUE  	    0X8069
#define  DUALMODETIMER8_TISR_32_BAD_RESET_VALUE         0X806A
#define  DUALMODETIMER8_TIER_32_BAD_RESET_VALUE         0X806B
#define  DUALMODETIMER8_TWER_32_BAD_RESET_VALUE         0X806C
#define  DUALMODETIMER8_TCLR_32_BAD_RESET_VALUE         0X806D
#define  DUALMODETIMER8_TCRR_32_BAD_RESET_VALUE         0X806E
#define  DUALMODETIMER8_TLDR_32_BAD_RESET_VALUE         0X806F
#define  DUALMODETIMER8_TTGR_32_BAD_RESET_VALUE         0X8070
#define  DUALMODETIMER8_TWPS_32_BAD_RESET_VALUE         0X8071
#define  DUALMODETIMER8_TMAR_32_BAD_RESET_VALUE         0X8072
#define  DUALMODETIMER8_TCAR_32_BAD_RESET_VALUE         0X8073
#define  DUALMODETIMER8_TSICR_32_BAD_RESET_VALUE  	    0X8074


// -------------------------
// Error codes for the GPIO1
// -------------------------
#define  GPIO1_GPIO_REVISION_32_BAD_RESET_VALUE         0X8075
#define  GPIO1_GPIO_SYSCONFIG_32_BAD_RESET_VALUE        0X8076
#define  GPIO1_GPIO_SYSSTATUS_32_BAD_RESET_VALUE        0X8077
#define  GPIO1_GPIO_IRQSTATUS1_32_BAD_RESET_VALUE       0X8078
#define  GPIO1_GPIO_IRQENABLE1_32_BAD_RESET_VALUE       0X8079
#define  GPIO1_GPIO_IRQSTATUS2_32_BAD_RESET_VALUE       0X807A
#define  GPIO1_GPIO_IRQENABLE2_32_BAD_RESET_VALUE       0X807B
#define  GPIO1_GPIO_WAKEUPENABLE_32_BAD_RESET_VALUE     0X807C
#define  GPIO1_GPIO_DATAIN_32_BAD_RESET_VALUE           0X807D
#define  GPIO1_GPIO_DATAOUT_32_BAD_RESET_VALUE          0X807E
#define  GPIO1_GPIO_DIRECTION_32_BAD_RESET_VALUE        0X807F
#define  GPIO1_GPIO_EDGE_CTRL1_32_BAD_RESET_VALUE       0X8080
#define  GPIO1_GPIO_EDGE_CTRL2_32_BAD_RESET_VALUE       0X8081
#define  GPIO1_GPIO_CLEAR_IRQENABLE1_32_BAD_RESET_VALUE 0X8082
#define  GPIO1_GPIO_CLEAR_IRQENABLE2_32_BAD_RESET_VALUE 0X8083
#define  GPIO1_GPIO_CLEAR_WAKEUPENA_32_BAD_RESET_VALUE  0X8084
#define  GPIO1_GPIO_CLEAR_DATAOUT_32_BAD_RESET_VALUE    0X8085
#define  GPIO1_GPIO_SET_IRQENABLE1_32_BAD_RESET_VALUE   0X8086
#define  GPIO1_GPIO_SET_IRQENABLE2_32_BAD_RESET_VALUE   0X8087
#define  GPIO1_GPIO_SET_WAKEUPENA_32_BAD_RESET_VALUE    0X8088
#define  GPIO1_GPIO_SET_DATAOUT_32_BAD_RESET_VALUE      0X8089


// -------------------------
// Error codes for the GPIO2
// -------------------------
#define  GPIO2_GPIO_REVISION_32_BAD_RESET_VALUE         0X808A
#define  GPIO2_GPIO_SYSCONFIG_32_BAD_RESET_VALUE        0X808B
#define  GPIO2_GPIO_SYSSTATUS_32_BAD_RESET_VALUE        0X808C
#define  GPIO2_GPIO_IRQSTATUS1_32_BAD_RESET_VALUE       0X808D
#define  GPIO2_GPIO_IRQENABLE1_32_BAD_RESET_VALUE       0X808E
#define  GPIO2_GPIO_IRQSTATUS2_32_BAD_RESET_VALUE       0X808F
#define  GPIO2_GPIO_IRQENABLE2_32_BAD_RESET_VALUE       0X8090
#define  GPIO2_GPIO_WAKEUPENABLE_32_BAD_RESET_VALUE     0X8091
#define  GPIO2_GPIO_DATAIN_32_BAD_RESET_VALUE           0X8092
#define  GPIO2_GPIO_DATAOUT_32_BAD_RESET_VALUE          0X8093
#define  GPIO2_GPIO_DIRECTION_32_BAD_RESET_VALUE        0X8094
#define  GPIO2_GPIO_EDGE_CTRL1_32_BAD_RESET_VALUE       0X8095
#define  GPIO2_GPIO_EDGE_CTRL2_32_BAD_RESET_VALUE       0X8096
#define  GPIO2_GPIO_CLEAR_IRQENABLE1_32_BAD_RESET_VALUE 0X8097
#define  GPIO2_GPIO_CLEAR_IRQENABLE2_32_BAD_RESET_VALUE 0X8098
#define  GPIO2_GPIO_CLEAR_WAKEUPENA_32_BAD_RESET_VALUE  0X8099
#define  GPIO2_GPIO_CLEAR_DATAOUT_32_BAD_RESET_VALUE    0X809A
#define  GPIO2_GPIO_SET_IRQENABLE1_32_BAD_RESET_VALUE   0X809B
#define  GPIO2_GPIO_SET_IRQENABLE2_32_BAD_RESET_VALUE   0X809C
#define  GPIO2_GPIO_SET_WAKEUPENA_32_BAD_RESET_VALUE    0X809D
#define  GPIO2_GPIO_SET_DATAOUT_32_BAD_RESET_VALUE      0X809E


// -------------------------
// Error codes for the GPIO3