⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 io_configuration.h

📁 OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器
💻 H
📖 第 1 页 / 共 5 页
字号:
#define        IO_CONFIGURATION_CONF_CAM_D_7_PUPD_EN_RES_VAL                                    0x1

#define        IO_CONFIGURATION_CONF_CAM_D_7_PUPD_VAL_POS                                       4
#define        IO_CONFIGURATION_CONF_CAM_D_7_PUPD_VAL_NUMB                                      1
#define        IO_CONFIGURATION_CONF_CAM_D_7_PUPD_VAL_RES_VAL                                   0x0



//----------------------------------------------------------------------------------------------------------------------------------------------------------------
//IO_CONFIGURATION_CONF_CAM_D_8                                                    :
//----------------------------------------------------------------------------------------------------------------------------------------------------------------
#define        IO_CONFIGURATION_CONF_CAM_D_8                                                    REG32(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_CAM_D_8_OFFSET)

#define        IO_CONFIGURATION_CONF_CAM_D_8_MODE_POS                                           0
#define        IO_CONFIGURATION_CONF_CAM_D_8_MODE_NUMB                                          3
#define        IO_CONFIGURATION_CONF_CAM_D_8_MODE_RES_VAL                                       0x0



//----------------------------------------------------------------------------------------------------------------------------------------------------------------
//IO_CONFIGURATION_CONF_CAM_D_9                                                    :
//----------------------------------------------------------------------------------------------------------------------------------------------------------------
#define        IO_CONFIGURATION_CONF_CAM_D_9                                                    REG32(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_CAM_D_9_OFFSET)

#define        IO_CONFIGURATION_CONF_CAM_D_9_MODE_POS                                           0
#define        IO_CONFIGURATION_CONF_CAM_D_9_MODE_NUMB                                          3
#define        IO_CONFIGURATION_CONF_CAM_D_9_MODE_RES_VAL                                       0x0



//----------------------------------------------------------------------------------------------------------------------------------------------------------------
//IO_CONFIGURATION_CONF_CAM_HS                                                     :
//----------------------------------------------------------------------------------------------------------------------------------------------------------------
#define        IO_CONFIGURATION_CONF_CAM_HS                                                     REG32(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_CAM_HS_OFFSET)

#define        IO_CONFIGURATION_CONF_CAM_HS_MODE_POS                                            0
#define        IO_CONFIGURATION_CONF_CAM_HS_MODE_NUMB                                           3
#define        IO_CONFIGURATION_CONF_CAM_HS_MODE_RES_VAL                                        0x0

#define        IO_CONFIGURATION_CONF_CAM_HS_PUPD_EN_POS                                         3
#define        IO_CONFIGURATION_CONF_CAM_HS_PUPD_EN_NUMB                                        1
#define        IO_CONFIGURATION_CONF_CAM_HS_PUPD_EN_RES_VAL                                     0x1

#define        IO_CONFIGURATION_CONF_CAM_HS_PUPD_VAL_POS                                        4
#define        IO_CONFIGURATION_CONF_CAM_HS_PUPD_VAL_NUMB                                       1
#define        IO_CONFIGURATION_CONF_CAM_HS_PUPD_VAL_RES_VAL                                    0x0



//----------------------------------------------------------------------------------------------------------------------------------------------------------------
//IO_CONFIGURATION_CONF_CAM_LCLK                                                   :
//----------------------------------------------------------------------------------------------------------------------------------------------------------------
#define        IO_CONFIGURATION_CONF_CAM_LCLK                                                   REG32(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_CAM_LCLK_OFFSET)

#define        IO_CONFIGURATION_CONF_CAM_LCLK_MODE_POS                                          0
#define        IO_CONFIGURATION_CONF_CAM_LCLK_MODE_NUMB                                         3
#define        IO_CONFIGURATION_CONF_CAM_LCLK_MODE_RES_VAL                                      0x0

#define        IO_CONFIGURATION_CONF_CAM_LCLK_PUPD_EN_POS                                       3
#define        IO_CONFIGURATION_CONF_CAM_LCLK_PUPD_EN_NUMB                                      1
#define        IO_CONFIGURATION_CONF_CAM_LCLK_PUPD_EN_RES_VAL                                   0x1

#define        IO_CONFIGURATION_CONF_CAM_LCLK_PUPD_VAL_POS                                      4
#define        IO_CONFIGURATION_CONF_CAM_LCLK_PUPD_VAL_NUMB                                     1
#define        IO_CONFIGURATION_CONF_CAM_LCLK_PUPD_VAL_RES_VAL                                  0x0



//----------------------------------------------------------------------------------------------------------------------------------------------------------------
//IO_CONFIGURATION_CONF_CAM_VS                                                     :
//----------------------------------------------------------------------------------------------------------------------------------------------------------------
#define        IO_CONFIGURATION_CONF_CAM_VS                                                     REG32(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_CAM_VS_OFFSET)

#define        IO_CONFIGURATION_CONF_CAM_VS_MODE_POS                                            0
#define        IO_CONFIGURATION_CONF_CAM_VS_MODE_NUMB                                           3
#define        IO_CONFIGURATION_CONF_CAM_VS_MODE_RES_VAL                                        0x0

#define        IO_CONFIGURATION_CONF_CAM_VS_PUPD_EN_POS                                         3
#define        IO_CONFIGURATION_CONF_CAM_VS_PUPD_EN_NUMB                                        1
#define        IO_CONFIGURATION_CONF_CAM_VS_PUPD_EN_RES_VAL                                     0x1

#define        IO_CONFIGURATION_CONF_CAM_VS_PUPD_VAL_POS                                        4
#define        IO_CONFIGURATION_CONF_CAM_VS_PUPD_VAL_NUMB                                       1
#define        IO_CONFIGURATION_CONF_CAM_VS_PUPD_VAL_RES_VAL                                    0x0



//----------------------------------------------------------------------------------------------------------------------------------------------------------------
//IO_CONFIGURATION_CONF_CAM_XCLK                                                   :
//----------------------------------------------------------------------------------------------------------------------------------------------------------------
#define        IO_CONFIGURATION_CONF_CAM_XCLK                                                   REG32(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_CAM_XCLK_OFFSET)

#define        IO_CONFIGURATION_CONF_CAM_XCLK_MODE_POS                                          0
#define        IO_CONFIGURATION_CONF_CAM_XCLK_MODE_NUMB                                         3
#define        IO_CONFIGURATION_CONF_CAM_XCLK_MODE_RES_VAL                                      0x0

#define        IO_CONFIGURATION_CONF_CAM_XCLK_PUPD_EN_POS                                       3
#define        IO_CONFIGURATION_CONF_CAM_XCLK_PUPD_EN_NUMB                                      1
#define        IO_CONFIGURATION_CONF_CAM_XCLK_PUPD_EN_RES_VAL                                   0x1

#define        IO_CONFIGURATION_CONF_CAM_XCLK_PUPD_VAL_POS                                      4
#define        IO_CONFIGURATION_CONF_CAM_XCLK_PUPD_VAL_NUMB                                     1
#define        IO_CONFIGURATION_CONF_CAM_XCLK_PUPD_VAL_RES_VAL                                  0x0



//----------------------------------------------------------------------------------------------------------------------------------------------------------------
//IO_CONFIGURATION_CONF_DIGITALRF_DATA                                             :
//----------------------------------------------------------------------------------------------------------------------------------------------------------------
#define        IO_CONFIGURATION_CONF_DIGITALRF_DATA                                             REG32(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_DIGITALRF_DATA_OFFSET)

#define        IO_CONFIGURATION_CONF_DIGITALRF_DATA_MODE_POS                                    0
#define        IO_CONFIGURATION_CONF_DIGITALRF_DATA_MODE_NUMB                                   3
#define        IO_CONFIGURATION_CONF_DIGITALRF_DATA_MODE_RES_VAL                                0x0

#define        IO_CONFIGURATION_CONF_DIGITALRF_DATA_PUPD_EN_POS                                 3
#define        IO_CONFIGURATION_CONF_DIGITALRF_DATA_PUPD_EN_NUMB                                1
#define        IO_CONFIGURATION_CONF_DIGITALRF_DATA_PUPD_EN_RES_VAL                             0x1

#define        IO_CONFIGURATION_CONF_DIGITALRF_DATA_PUPD_VAL_POS                                4
#define        IO_CONFIGURATION_CONF_DIGITALRF_DATA_PUPD_VAL_NUMB                               1
#define        IO_CONFIGURATION_CONF_DIGITALRF_DATA_PUPD_VAL_RES_VAL                            0x0



//----------------------------------------------------------------------------------------------------------------------------------------------------------------
//IO_CONFIGURATION_CONF_DIGITALRF_ENABLE                                           :
//----------------------------------------------------------------------------------------------------------------------------------------------------------------
#define        IO_CONFIGURATION_CONF_DIGITALRF_ENABLE                                           REG32(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_DIGITALRF_ENABLE_OFFSET)

#define        IO_CONFIGURATION_CONF_DIGITALRF_ENABLE_MODE_POS                                  0
#define        IO_CONFIGURATION_CONF_DIGITALRF_ENABLE_MODE_NUMB                                 3
#define        IO_CONFIGURATION_CONF_DIGITALRF_ENABLE_MODE_RES_VAL                              0x0

#define        IO_CONFIGURATION_CONF_DIGITALRF_ENABLE_PUPD_EN_POS                               3
#define        IO_CONFIGURATION_CONF_DIGITALRF_ENABLE_PUPD_EN_NUMB                              1
#define        IO_CONFIGURATION_CONF_DIGITALRF_ENABLE_PUPD_EN_RES_VAL                           0x1

#define        IO_CONFIGURATION_CONF_DIGITALRF_ENABLE_PUPD_VAL_POS                              4
#define        IO_CONFIGURATION_CONF_DIGITALRF_ENABLE_PUPD_VAL_NUMB                             1
#define        IO_CONFIGURATION_CONF_DIGITALRF_ENABLE_PUPD_VAL_RES_VAL                          0x0



//----------------------------------------------------------------------------------------------------------------------------------------------------------------
//IO_CONFIGURATION_CONF_DIGITALRF_ENR                                              :
//----------------------------------------------------------------------------------------------------------------------------------------------------------------
#define        IO_CONFIGURATION_CONF_DIGITALRF_ENR                                              REG32(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_DIGITALRF_ENR_OFFSET)

#define        IO_CONFIGURATION_CONF_DIGITALRF_ENR_MODE_POS                                     0
#define        IO_CONFIGURATION_CONF_DIGITALRF_ENR_MODE_NUMB                                    3
#define        IO_CONFIGURATION_CONF_DIGITALRF_ENR_MODE_RES_VAL                                 0x0

#define        IO_CONFIGURATION_CONF_DIGITALRF_ENR_PUPD_EN_POS                                  3
#define        IO_CONFIGURATION_CONF_DIGITALRF_ENR_PUPD_EN_NUMB                                 1
#define        IO_CONFIGURATION_CONF_DIGITALRF_ENR_PUPD_EN_RES_VAL                              0x0

#define        IO_CONFIGURATION_CONF_DIGITALRF_ENR_PUPD_VAL_POS                                 4
#define        IO_CONFIGURATION_CONF_DIGITALRF_ENR_PUPD_VAL_NUMB                                1
#define        IO_CONFIGURATION_CONF_DIGITALRF_ENR_PUPD_VAL_RES_VAL                             0x0



//----------------------------------------------------------------------------------------------------------------------------------------------------------------
//IO_CONFIGURATION_CONF_DIGITALRF_RF_CLK                                           :

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -