flextt.h.s

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

;*******************************************************************************
;*
;* The confidential and proprietary information contained in this file may
;* only be used by a person authorised under and to the extent permitted
;* by a subsisting licensing agreement from ARM Limited.
;*
;*		   (C) COPYRIGHT 2001 ARM Limited.
;*			 ALL RIGHTS RESERVED
;*
;* This entire notice must be reproduced on all copies of this file
;* and copies of this file may only be made by a person if such person is
;* permitted to do so under the terms of a subsisting license agreement
;* from ARM Limited.
;*
;*		FlexTT - Flexible Translation Table
;*		===================================
;*
;*		Origin: arm926ej
;*		Author:	Dan Brook
;*	       $Author: dbrook $
;*	     $Revision: 1.1 $
;*		 $Date: Wed Oct 24 10:19:50 2001 $
;*
;******************************************************************************

;-------------------------------------------------------------------------------
;	Description:	
;
;	Generates MMU translation tables from a simple Level 1 description
;
;	Basic Functionality:
;
;	All addresses are flat mapped, and within 1Mb bounds sets of smaller
;	pages all have identical Access Permissions and Cacheability & Bufferability.
;
;	Advanced Functionality & Caveats:
;
;	In addition to the basic functionality, Custom Level 2 tables may be
;	defined with any valid combination of page sizes, access permissions and
;	cacheability / bufferability. Custom tables are in fact templates, so the
;	same table definition can be used many times.
;	Calling the same custom table more than once does NOT alias any memory.
;
;	The Virtual Address -> Physical Address mapping is still flat, unless the
;	parameter ALIASPAIRS is added to one or more entries in the Custom Level 2
;	description.
;	If ALIASPAIRS is specified, each pair of pages created by that macro swap
;	their PA mappings. This makes is possible to create simple non-flat, non-
;	contiguous VA->PA mappings. Because only adjacent pages are swapped, there
; 	is still correlation within 1Mb blocks.
;	Because PAIRS of pages get swapped, don't try this while requesting an odd
;	number of pages!!
;	At the moment there is no (simple) way to alias 1Mb sections.
;
;
;	Because this code only gets a single pass through the assembler, it may
;	not generate the most compact tables; where there are a mix of coarse and
;	fine level 2 tables, padding may be inserted to make the Fine tables sit
;	on 4k boundaries. The worst case would be Fine, Coarse, Fine, which would
;	incurr 3k of padding.
; 
; 
;	Usage:
;
;	TTB_BASE must be defined to set the Translation Table Base Address
;
;	A translation table file uses these macros as follows;
;
; ===============================================================================
;
;	 GET	FlexTT
;	 
;
;	 ;;	  0xFFFFFFFF	+----------+
;	 ;;			|          |
;	 ;;			| ncnb     |
;	 ;;			~          ~
;	 ;;			|          |
;	 ;;	  0x01400000	+----------+
;	 ;;			| ncnb     |	Tube / Trickbox
;	 ;;	  0x01300000	+----------+
;	 ;;			|          |
;	 ;;			~ ncnb	   ~
;	 ;;			|          |
;	 ;;	  0x00900000	+----------+
;	 ;;			| ncnb     |
;	 ;;	  0x00800000	+----------+
;	 ;;			| cb       |
;	 ;;	  0x00700000	+----------+
;	 ;;			| ncnb     |
;	 ;;	  0x00600000	+----------+
;	 ;;			| cnb      |
;	 ;;	  0x00500000	+----------+
;	 ;;			| ncnb     |
;	 ;;	  0x00400000	+----------+
;	 ;;			| ncb      |
;	 ;;	  0x00300000	+----------+
;	 ;;			| ncnb     |
;	 ;;	  0x00200000	+----------+
;	 ;;			| ncnb     |
;	 ;;	  0x00100000	+----------+
;	 ;;			| ncnb     |
;	 ;;	  0x00000000	+----------+				
;	 ;;		  
;
;	 ;; 0x00000000	- Simple 1 Mb Section
;	 CreateL1TableEntry	SECTION, ALL_ACCESS, DOMAIN0, UPDATEABLE
;
;	 ;; 0x00100000	- A Set of 1k Tiny pages, with a Fine 2nd Level table
;	 CreateL1TableEntry	FTINY, ALL_ACCESS, DOMAIN0, UPDATEABLE
;
;	 ;; 0x00200000	- A Set of 4k Small pages, with a Fine 2nd Level table
;	 CreateL1TableEntry	FSMALL, ALL_ACCESS, DOMAIN0, UPDATEABLE
;
;	 ;; 0x00300000	- A Set of 64k Large pages, with a Fine 2nd Level table
;	 CreateL1TableEntry	FLARGE, ALL_ACCESS, DOMAIN0, UPDATEABLE+BUFFERABLE
;
;	 ;; 0x00400000	- A Set of 4k Small pages, with a Coarse 2nd Level table
;	 CreateL1TableEntry	CSMALL, ALL_ACCESS, DOMAIN0, UPDATEABLE
;
;	 ;; 0x00500000	- A Set of 64k Large pages, with a Coarse 2nd Level table
;	 CreateL1TableEntry	CLARGE, ALL_ACCESS, DOMAIN0, UPDATEABLE+CACHEABLE
;
;	 ;; 0x00600000	- Simple 1 Mb Section
;	 CreateL1TableEntry	SECTION, ALL_ACCESS, DOMAIN0, UPDATEABLE
;
;	 ;; 0x00700000	- Simple 1 Mb Section
;	 CreateL1TableEntry	SECTION, ALL_ACCESS, DOMAIN0, UPDATEABLE+CACHEABLE+BUFFERABLE
;	 
;	 
;	 ;; 0x00800000 to 0xfff00000 is NCNB, Section mapped
;        GBLA	counter
;counter	SETA	0x008
;	 WHILE	counter < 0x1000
;	 CreateL1TableEntry	SECTION, ALL_ACCESS, DOMAIN0, UPDATEABLE
;counter	SETA	counter + 1
;	 WEND
;
;	 FlexTT_END
;
; ===============================================================================
;
;	If Custom Level 2 Pages are required, these must be defined as below;
;
;	Variable Names & the Macro name take the form "CUSTOM_L2_TABLE_n"
;	Each Custom table that is defined must set up its SIZE_ and DOMAIN_
;	variables as below.
;	The MACRO body defines the table pages. Each type is followed by
;	a count - the number of pages to create - then the access permissions
;	and cacheability / bufferability attributes for those pages.
;	The assembler should warn you about page misalignments. It won't warn you
;	if you overrun the size of the L2 table (by creating too many pages).
;
;	To instantiate a Custom L2 Page, simply pass its name as a single
;	argument to CreateL1TableEntry when defining the L1 table (see sample
;	code above).
;
;	e.g.
;	CreateL1TableEntry	SECTION, ALL_ACCESS, DOMAIN0, UPDATEABLE
;	CreateL1TableEntry	CUSTOM_L2_TABLE_1
;	CreateL1TableEntry	CUSTOM_L2_TABLE_2
;	CreateL1TableEntry	SECTION, ALL_ACCESS, DOMAIN0, UPDATEABLE
;	CreateL1TableEntry	CUSTOM_L2_TABLE_1
;
;
; ===============================================================================
;
;	;; CUSTOM_L2_TABLE_1
;
;	GBLS	SIZE_CUSTOM_L2_TABLE_1
;	GBLA	DOMAIN_CUSTOM_L2_TABLE_1
;	
;SIZE_CUSTOM_L2_TABLE_1		SETS	"COARSE"
;DOMAIN_CUSTOM_L2_TABLE_1	SETA	0
;			
;	MACRO
;	CUSTOM_L2_TABLE_1
;
;	CLT_SMALL	16, ALL_ACCESS, ALL_ACCESS, ALL_ACCESS, ALL_ACCESS, UPDATEABLE
;	CLT_LARGE	1,  ALL_ACCESS, ALL_ACCESS, ALL_ACCESS, ALL_ACCESS, UPDATEABLE
;	CLT_SMALL	32, ALL_ACCESS, ALL_ACCESS, ALL_ACCESS, ALL_ACCESS, UPDATEABLE, ALIASPAIRS
;	CLT_LARGE	12, ALL_ACCESS, ALL_ACCESS, ALL_ACCESS, ALL_ACCESS, UPDATEABLE
;	
;	MEND
;
;
;	;; CUSTOM_L2_TABLE_2
;	
;	GBLS	SIZE_CUSTOM_L2_TABLE_2
;	GBLA	DOMAIN_CUSTOM_L2_TABLE_2
;	     
;SIZE_CUSTOM_L2_TABLE_2		SETS	"FINE"
;DOMAIN_CUSTOM_L2_TABLE_2	SETA	0
;	     
;	MACRO
;	CUSTOM_L2_TABLE_2
;
;	CLT_TINY	4,  ALL_ACCESS, UPDATEABLE, ALIASPAIRS
;	CLT_SMALL	1,  ALL_ACCESS, ALL_ACCESS, ALL_ACCESS, ALL_ACCESS, UPDATEABLE
;	CLT_TINY	12, ALL_ACCESS, UPDATEABLE
;	CLT_SMALL	10, ALL_ACCESS, ALL_ACCESS, ALL_ACCESS, ALL_ACCESS, UPDATEABLE
;	CLT_TINY	4,  ALL_ACCESS, UPDATEABLE
;	CLT_LARGE	15, ALL_ACCESS, ALL_ACCESS, ALL_ACCESS, ALL_ACCESS, UPDATEABLE
;    
;	MEND
;
; ===============================================================================


	GET	Test-Macros.h.s		; For LOCAL macros
	GET	System-Macros.h.s	; For L1Val, L2Val
	
	;; Warning: Don't put anything between the AREA start and "ZERO_LABEL"!!
	
	AREA	tt_AREA,CODE
ZERO_LABEL


	;; Check Translation Table Base has been setup
		
	[ :DEF:TTB_BASE
L1TABLE_BASE	EQU	0x$TTB_BASE ; Must be 0x1000 aligned
	|
	INFO 1, "TTB_BASE has not been defined!!"
	]

	;; Keep track of the Level 2 Tables that get generated
	GBLA	L2TABLE_PTR
	GBLA	L2TABLE_COUNT
	
L2TABLE_PTR	SETA	L1TABLE_BASE + 0x4000 ; L1 Table fills 0x4000 locations
L2TABLE_COUNT	SETA	0	; Number of L2 tables used


	;; Some global variables for CUSTOM_L2_TABLEs
	GBLA	CLT_ADDR
	GBLS	CLT_SIZE

	
;----------------------------------------------------------------------------
; Macro:        CreateL1TableEntry
; Function:	Fills in an entry (in place) in the Level 1 translation table  
; Parameters:   type, access, domain, cb_bits
; Operation:    type = SECTION | CLARGE | CSMALL | FLARGE | FSMALL | FTINY | CUSTOM_L2_TABLE_n
;		access = ALL_ACCESS | NO_USR_W | SVC_RW | SVC_R | NO_ACCESS
;		domain = DOMAIN0 ... DOMAIN15
;		cb_bits = UPDATEABLE | CACHEABLE | BUFFERABLE | combinations of these
; Assumptions:	Calls the basic macros in System-Macros
;		Where a 1 Mb L1 region is defined to be a set of pages,
;		all pages will have the same access, domain, cb etc.
;		Addresses are still flat-mapped.
;		CLARGE, CSMALL -> Coarse 2nd Level Page Tables
;		FLARGE, FSMALL, FTINY -> Fine 2nd Level Page Tables
;		CUSTOM_L2_TABLE_n -> takes on attributes as defined by the user
;----------------------------------------------------------------------------
	
	MACRO
	CreateL1TableEntry $type, $access, $domain, $cb_bits
	LOCAL
here$l
	[ "$type" = "SECTION"
	L1Section	(here$l-ZERO_LABEL):SHL:18, $access, $domain, $cb_bits
	|

	;; If it wasn't a SECTION, we'll need to write a Level 2 page table later
	;; Calculate and store all the necessary details...

L2TABLE_COUNT	SETA	L2TABLE_COUNT + 1

	GBLS	L2TABLE_TYPE_$L2TABLE_COUNT ; what type of table
	GBLA	L2TABLE_BASE_$L2TABLE_COUNT ; the base of the table itself
	GBLA	L2TABLE_L1BASE_$L2TABLE_COUNT ; the PA that the table will refer to
	GBLS	L2TABLE_ACCESS_$L2TABLE_COUNT ; access permissions
	GBLS	L2TABLE_CB_BITS_$L2TABLE_COUNT ; cacheability / bufferability

L2TABLE_TYPE_$L2TABLE_COUNT	SETS	"$type"
L2TABLE_L1BASE_$L2TABLE_COUNT	SETA	(here$l-ZERO_LABEL):SHL:18	
L2TABLE_ACCESS_$L2TABLE_COUNT	SETS	"$access"
L2TABLE_CB_BITS_$L2TABLE_COUNT	SETS	"$cb_bits"


	;; If it was a CUSTOM_L2_TABLE, dereference its SIZE and DOMAIN here
	[ "$type":LEFT:4 = "CUST"
	LCLS	deref_size
	LCLA	deref_domain
deref_size	SETS	SIZE_$type
deref_domain	SETA	DOMAIN_$type
	]


	;; The L2 Table must be aligned to a boundary relative to its size
	;; Force correct alignement, if necessary
	[ "$type":LEFT:4 /= "CUST"

	;; Not a custom table...
	[ "$type" = "CLARGE"  :LOR:  "$type" = "CSMALL"
	;; 1k alignment - it always will be 1k aligned
	|
	;; 4k alignment
	[ (L2TABLE_PTR:AND:0x00000FFF) <> 0
L2TABLE_PTR SETA (L2TABLE_PTR:AND:0xFFFFF000) + 0x1000
	]
	]

	|

	;; A custom table
	[ "$deref_size" = "COARSE"
	;; Should already be 1k aligned
	|
	;; 4k alignment required
	[ (L2TABLE_PTR:AND:0x00000FFF) <> 0
L2TABLE_PTR SETA (L2TABLE_PTR:AND:0xFFFFF000) + 0x1000
	]
	]

	]


L2TABLE_BASE_$L2TABLE_COUNT	SETA	L2TABLE_PTR 


	;; update the table ptr ready for the next L2 table
	[ "$type":LEFT:4 /= "CUST"

	;; Not a custom table
	[ "$type" = "CLARGE"  :LOR:  "$type" = "CSMALL"
L2TABLE_PTR	SETA	L2TABLE_PTR + 0x0400
	|
L2TABLE_PTR	SETA	L2TABLE_PTR + 0x1000
	]

	|
	;; A custom table
	[ "$deref_size" = "COARSE"	
L2TABLE_PTR	SETA	L2TABLE_PTR + 0x0400
	|
L2TABLE_PTR	SETA	L2TABLE_PTR + 0x1000
	]
	]

	]


	;; If this is a pointer to an L2 table, let's point
	[ "$type" = "CLARGE"  :LOR:  "$type" = "CSMALL"
	L1Page		L2TABLE_BASE_$L2TABLE_COUNT, $domain
	]
	[ "$type" = "FLARGE" :LOR: "$type" = "FSMALL" :LOR: "$type" = "FTINY"	
	L1TinyPage	L2TABLE_BASE_$L2TABLE_COUNT, $domain
	]

	[ ("$type":LEFT:4) = "CUST"
	[ "$deref_size" = "COARSE"
	L1Page		L2TABLE_BASE_$L2TABLE_COUNT, $deref_domain
	]
	[ "$deref_size" = "FINE"
	L1TinyPage	L2TABLE_BASE_$L2TABLE_COUNT, $deref_domain
	]
	]

	DCD	L1Val

L1Val	SETA	0xbad1bad0	; Set to faulting value, to stop accidental misuse
	
	LOCAL_END
	MEND
	

;----------------------------------------------------------------------------
; Macro:        CreateL2PageTable
; Function:	Fills an entire 2nd Level Page Table
; Parameters:   type, baseaddr, access, cb_bits
; Operation:    type = CLARGE | CSMALL | FLARGE | FSMALL | FTINY
;		baseaddr = Base of Physical Memory the table maps to
;		access = ALL_ACCESS | NO_USR_W | SVC_RW | SVC_R | NO_ACCESS
;		cb_bits = UPDATEABLE | CACHEABLE | BUFFERABLE | combinations of these
; Assumptions:	Calls the basic macros in System-Macros