ndflash.h

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/*Header modified by DSP-CONVERT V1.01 Script on  Tue Aug 13 14:51:44 MEST 2002*/
//========================================================================
//          TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION  
//   Property of Texas Instruments
//   For Unrestricted Internal Use Only
//   Unauthorized reprofuction and/or distribution is strictly prohibited.
//   This product is protected under copyright law and trade secret law
//   as an unpublished work
//   Created 2000,  (C) Copyright 2000 Texas Instruments. All rights reserved
//
//
//   Filename           :ndflash.h
//
//   Date of Module Modification:4/18/02
//   Date of Generation :4/18/02
//
//
//========================================================================
#include "mapping.h"
#ifndef _NDFLASH__H
#define _NDFLASH__H

//BEGIN INC GENERATION
//--------------------------------------


#ifndef DSP_ADJUST              /* If DSP_ADJUST is not defined, we are using */
#define DSP_ADJUST              /* include file for ARM code, we do not need any */
#endif                          /* modufucations. If this file is used for DSP code, */

//Register Offset
//-------------------
#define coeff8_arm   1
#define coeff16_arm  1
#define coeff32_arm  1

//-------------------

#define            NDFLASH_NND_REVISION_OFFSET                                                                         (0x00 DSP_ADJUST)
#define            NDFLASH_NND_ACCESS_OFFSET                                                                           (0x04 DSP_ADJUST)
#define            NDFLASH_NND_ADDR_SRC_OFFSET                                                                         (0x08 DSP_ADJUST)
#define            NDFLASH_NND_RESVD_OFFSET                                                                            (0x0C DSP_ADJUST)
#define            NDFLASH_NND_CTRL_OFFSET                                                                             (0x10 DSP_ADJUST)
#define            NDFLASH_NND_MASK_OFFSET                                                                             (0x14 DSP_ADJUST)
#define            NDFLASH_NND_STATUS_OFFSET                                                                           (0x18 DSP_ADJUST)
#define            NDFLASH_NND_READY_OFFSET                                                                            (0x1C DSP_ADJUST)
#define            NDFLASH_NND_COMMAND_OFFSET                                                                          (0x20 DSP_ADJUST)
#define            NDFLASH_NND_COMMAND_SEC_OFFSET                                                                      (0x24 DSP_ADJUST)
#define            NDFLASH_NND_ECC_SELECT_OFFSET                                                                       (0x28 DSP_ADJUST)
#define            NDFLASH_NND_ECC1_OFFSET                                                                             (0x2C DSP_ADJUST)
#define            NDFLASH_NND_ECC2_OFFSET                                                                             (0x30 DSP_ADJUST)
#define            NDFLASH_NND_ECC3_OFFSET                                                                             (0x34 DSP_ADJUST)
#define            NDFLASH_NND_ECC4_OFFSET                                                                             (0x38 DSP_ADJUST)
#define            NDFLASH_NND_ECC5_OFFSET                                                                             (0x3C DSP_ADJUST)
#define            NDFLASH_NND_ECC6_OFFSET                                                                             (0x40 DSP_ADJUST)
#define            NDFLASH_NND_ECC7_OFFSET                                                                             (0x44 DSP_ADJUST)
#define            NDFLASH_NND_ECC8_OFFSET                                                                             (0x48 DSP_ADJUST)
#define            NDFLASH_NND_ECC9_OFFSET                                                                             (0x4C DSP_ADJUST)
#define            NDFLASH_NND_RESET_OFFSET                                                                            (0x50 DSP_ADJUST)
#define            NDFLASH_NND_FIFO_OFFSET                                                                             (0x54 DSP_ADJUST)
#define            NDFLASH_NND_FIFOCTRL_OFFSET                                                                         (0x58 DSP_ADJUST)
#define            NDFLASH_NND_PSC_CLK_OFFSET                                                                          (0x5C DSP_ADJUST)
#define            NDFLASH_NND_SYSTEST_OFFSET                                                                          (0x60 DSP_ADJUST)
#define            NDFLASH_NND_SYSCFG_OFFSET                                                                           (0x64 DSP_ADJUST)
#define            NDFLASH_NND_SYSSTATUS_OFFSET                                                                        (0x68 DSP_ADJUST)
#define            NDFLASH_NND_FIFOTEST1_OFFSET                                                                        (0x6C DSP_ADJUST)
#define            NDFLASH_NND_FIFOTEST2_OFFSET                                                                        (0x70 DSP_ADJUST)
#define            NDFLASH_NND_FIFOTEST3_OFFSET                                                                        (0x74 DSP_ADJUST)
#define            NDFLASH_NND_FIFOTEST4_OFFSET                                                                        (0x78 DSP_ADJUST)
#define            NDFLASH_NND_FIFOTEST5_OFFSET                                                                        (0x7C DSP_ADJUST)
#define            NDFLASH_NND_FIFOTEST6_OFFSET                                                                        (0x80 DSP_ADJUST)
#define            NDFLASH_NND_FIFOTEST7_OFFSET                                                                        (0x84 DSP_ADJUST)
#define            NDFLASH_NND_FIFOTEST8_OFFSET                                                                        (0x88 DSP_ADJUST)
#define            NDFLASH_NND_PSC1_CLK_OFFSET                                                                         (0x8C DSP_ADJUST)
#define            NDFLASH_NND_PSC2_CLK_OFFSET                                                                         (0x90 DSP_ADJUST)


#ifndef DSP_ACCESS



//NDFLASH_NND_REVISION
//-------------------
#define            NDFLASH_NND_REVISION_8_0                                                                            REG8(NDFLASH_BASE_ADDR_ARM+NDFLASH_NND_REVISION_OFFSET*coeff8_arm+0)


#define            NDFLASH_NND_REVISION_8_0_RESERVED_POS                                                                 8
#define            NDFLASH_NND_REVISION_8_0_RESERVED_NUMB                                                                24
#define            NDFLASH_NND_REVISION_8_0_RESERVED_RES_VAL                                                             0x0
//R

#define            NDFLASH_NND_REVISION_8_0_NND_REVISION_POS                                                             0
#define            NDFLASH_NND_REVISION_8_0_NND_REVISION_NUMB                                                            8
#define            NDFLASH_NND_REVISION_8_0_NND_REVISION_RES_VAL                                                         0x00
//R

#define            NDFLASH_NND_REVISION_8_1                                                                            REG8(NDFLASH_BASE_ADDR_ARM+NDFLASH_NND_REVISION_OFFSET*coeff8_arm+1)


#define            NDFLASH_NND_REVISION_8_1_RESERVED_POS                                                                 8
#define            NDFLASH_NND_REVISION_8_1_RESERVED_NUMB                                                                24
#define            NDFLASH_NND_REVISION_8_1_RESERVED_RES_VAL                                                             0x0
//R

#define            NDFLASH_NND_REVISION_8_1_NND_REVISION_POS                                                             0
#define            NDFLASH_NND_REVISION_8_1_NND_REVISION_NUMB                                                            8
#define            NDFLASH_NND_REVISION_8_1_NND_REVISION_RES_VAL                                                         0x00
//R

#define            NDFLASH_NND_REVISION_8_2                                                                            REG8(NDFLASH_BASE_ADDR_ARM+NDFLASH_NND_REVISION_OFFSET*coeff8_arm+2)


#define            NDFLASH_NND_REVISION_8_2_RESERVED_POS                                                                 8
#define            NDFLASH_NND_REVISION_8_2_RESERVED_NUMB                                                                24
#define            NDFLASH_NND_REVISION_8_2_RESERVED_RES_VAL                                                             0x0
//R

#define            NDFLASH_NND_REVISION_8_2_NND_REVISION_POS                                                             0
#define            NDFLASH_NND_REVISION_8_2_NND_REVISION_NUMB                                                            8
#define            NDFLASH_NND_REVISION_8_2_NND_REVISION_RES_VAL                                                         0x00
//R

#define            NDFLASH_NND_REVISION_8_3                                                                            REG8(NDFLASH_BASE_ADDR_ARM+NDFLASH_NND_REVISION_OFFSET*coeff8_arm+3)


#define            NDFLASH_NND_REVISION_8_3_RESERVED_POS                                                                 8
#define            NDFLASH_NND_REVISION_8_3_RESERVED_NUMB                                                                24
#define            NDFLASH_NND_REVISION_8_3_RESERVED_RES_VAL                                                             0x0
//R

#define            NDFLASH_NND_REVISION_8_3_NND_REVISION_POS                                                             0
#define            NDFLASH_NND_REVISION_8_3_NND_REVISION_NUMB                                                            8
#define            NDFLASH_NND_REVISION_8_3_NND_REVISION_RES_VAL                                                         0x00
//R

#endif /* DSP_ACCESS */


#ifndef DSP_ACCESS
#define            NDFLASH_NND_REVISION_16_0                                                                           REG16(NDFLASH_BASE_ADDR_ARM+NDFLASH_NND_REVISION_OFFSET*coeff16_arm+0)
#else
#define            NDFLASH_NND_REVISION_16_0                                                                           REG16(NDFLASH_BASE_ADDR_DSP+NDFLASH_NND_REVISION_OFFSET)
#endif


#define            NDFLASH_NND_REVISION_16_0_RESERVED_POS                                                                8
#define            NDFLASH_NND_REVISION_16_0_RESERVED_NUMB                                                               24
#define            NDFLASH_NND_REVISION_16_0_RESERVED_RES_VAL                                                            0x0
//R

#define            NDFLASH_NND_REVISION_16_0_NND_REVISION_POS                                                            0
#define            NDFLASH_NND_REVISION_16_0_NND_REVISION_NUMB                                                           8
#define            NDFLASH_NND_REVISION_16_0_NND_REVISION_RES_VAL                                                        0x00
//R



#ifndef DSP_ACCESS
#define            NDFLASH_NND_REVISION_16_2                                                                           REG16(NDFLASH_BASE_ADDR_ARM+NDFLASH_NND_REVISION_OFFSET*coeff16_arm+2)
#else
#define            NDFLASH_NND_REVISION_16_2                                                                           REG16(NDFLASH_BASE_ADDR_DSP+NDFLASH_NND_REVISION_OFFSET+1)
#endif


#define            NDFLASH_NND_REVISION_16_2_RESERVED_POS                                                                8
#define            NDFLASH_NND_REVISION_16_2_RESERVED_NUMB                                                               24
#define            NDFLASH_NND_REVISION_16_2_RESERVED_RES_VAL                                                            0x0
//R

#define            NDFLASH_NND_REVISION_16_2_NND_REVISION_POS                                                            0
#define            NDFLASH_NND_REVISION_16_2_NND_REVISION_NUMB                                                           8
#define            NDFLASH_NND_REVISION_16_2_NND_REVISION_RES_VAL                                                        0x00

#ifndef DSP_ACCESS

#define            NDFLASH_NND_REVISION_32                                                                             REG32(NDFLASH_BASE_ADDR_ARM+NDFLASH_NND_REVISION_OFFSET*coeff32_arm)


#define            NDFLASH_NND_REVISION_32_RESERVED_POS                                                                  8
#define            NDFLASH_NND_REVISION_32_RESERVED_NUMB                                                                 24
#define            NDFLASH_NND_REVISION_32_RESERVED_RES_VAL                                                              0x0
//R

#define            NDFLASH_NND_REVISION_32_NND_REVISION_POS                                                              0