wcdma_scm.h

来自「OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI」· C头文件 代码 · 共 231 行

//========================================================================
//        TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
// Property of Texas Instruments
// For Unrestricted Internal Use Only
// Unauthorized reproduction and/or distribution is strictly prohibited.
// This product is protected under copyright law and trade secret law
// as an unpublished work
// Created 2001,  (C) Copyright 2001 Texas Instruments. All rights reserved
//
//========================================================================


#include "wcdma_mapping.h"
#ifndef _wcdma_scm__H
#define _wcdma_scm__H

//Standard Register offset list


#define            SCM_RESET_OFFSET                     0x00
#define            SCM_CONTROL_OFFSET                     0x01
#define            SCM_START_SRCH_A_NOW_OFFSET                     0x04
#define            SCM_START_SRCH_B_NOW_OFFSET                     0x05
#define            SCM_START_SRCH_A_LATER_OFFSET                     0x06
#define            SCM_START_SRCH_B_LATER_OFFSET                     0x07
#define            SCM_START_OFFLINE_SRCH_OFFSET                     0x08
#define            SCM_START_FILL_NOW_OFFSET                     0x09
#define            SCM_START_FILL_LATER_OFFSET                     0x0A
#define            SCM_FILL_DONE_STATUS_CLEAR_OFFSET                     0x10
#define            SCM_FILL_DONE_STATUS_OFFSET                     0x11
#define            SCM_DEBUG_VERSION_ID_OFFSET                     0x25
//SCM_RESET
//-------------------------
#define            SCM_RESET                        REG32(WCDMA_CS_LB+((WCDMA_SCM_BASE_ADDR+SCM_RESET_OFFSET) << 2))
#define            SCM_RESET_RES_VAL                0x00000000
//R/W
//-------------------------



//SCM_CONTROL
//-------------------------
#define            SCM_CONTROL                        REG32(WCDMA_CS_LB+((WCDMA_SCM_BASE_ADDR+SCM_CONTROL_OFFSET) << 2))
#define            SCM_CONTROL_RES_VAL                0x00000000
//R/W
//-------------------------



//SCM_START_SRCH_A_NOW
//-------------------------
#define            SCM_START_SRCH_A_NOW                        REG32(WCDMA_CS_LB+((WCDMA_SCM_BASE_ADDR+SCM_START_SRCH_A_NOW_OFFSET) << 2))
#define            SCM_START_SRCH_A_NOW_RES_VAL                0x00000000
//R/W
//-------------------------



//SCM_START_SRCH_B_NOW
//-------------------------
#define            SCM_START_SRCH_B_NOW                        REG32(WCDMA_CS_LB+((WCDMA_SCM_BASE_ADDR+SCM_START_SRCH_B_NOW_OFFSET) << 2))
#define            SCM_START_SRCH_B_NOW_RES_VAL                0x00000000
//R/W
//-------------------------



//SCM_START_SRCH_A_LATER
//-------------------------
#define            SCM_START_SRCH_A_LATER                        REG32(WCDMA_CS_LB+((WCDMA_SCM_BASE_ADDR+SCM_START_SRCH_A_LATER_OFFSET) << 2))
#define            SCM_START_SRCH_A_LATER_RES_VAL                0x00000000
//R/W
//-------------------------



//SCM_START_SRCH_B_LATER
//-------------------------
#define            SCM_START_SRCH_B_LATER                        REG32(WCDMA_CS_LB+((WCDMA_SCM_BASE_ADDR+SCM_START_SRCH_B_LATER_OFFSET) << 2))
#define            SCM_START_SRCH_B_LATER_RES_VAL                0x00000000
//R/W
//-------------------------



//SCM_START_OFFLINE_SRCH
//-------------------------
#define            SCM_START_OFFLINE_SRCH                        REG32(WCDMA_CS_LB+((WCDMA_SCM_BASE_ADDR+SCM_START_OFFLINE_SRCH_OFFSET) << 2))
#define            SCM_START_OFFLINE_SRCH_RES_VAL                0x00000000
//R/W
//-------------------------



//SCM_START_FILL_NOW
//-------------------------
#define            SCM_START_FILL_NOW                        REG32(WCDMA_CS_LB+((WCDMA_SCM_BASE_ADDR+SCM_START_FILL_NOW_OFFSET) << 2))
#define            SCM_START_FILL_NOW_RES_VAL                0x00000000
//R/W
//-------------------------



//SCM_START_FILL_LATER
//-------------------------
#define            SCM_START_FILL_LATER                        REG32(WCDMA_CS_LB+((WCDMA_SCM_BASE_ADDR+SCM_START_FILL_LATER_OFFSET) << 2))
#define            SCM_START_FILL_LATER_RES_VAL                0x00000000
//R/W
//-------------------------



//SCM_FILL_DONE_STATUS_CLEAR
//-------------------------
#define            SCM_FILL_DONE_STATUS_CLEAR                        REG32(WCDMA_CS_LB+((WCDMA_SCM_BASE_ADDR+SCM_FILL_DONE_STATUS_CLEAR_OFFSET) << 2))
#define            SCM_FILL_DONE_STATUS_CLEAR_RES_VAL                0x00000000
//R/W
//-------------------------



//SCM_FILL_DONE_STATUS
//-------------------------
#define            SCM_FILL_DONE_STATUS                        REG32(WCDMA_CS_LB+((WCDMA_SCM_BASE_ADDR+SCM_FILL_DONE_STATUS_OFFSET) << 2))
#define            SCM_FILL_DONE_STATUS_RES_VAL                0x00000000
//R/W
//No write to this reg are allowed
//-------------------------



//SCM_DEBUG_VERSION_ID
//-------------------------
#define            SCM_DEBUG_VERSION_ID                        REG32(WCDMA_CS_LB+((WCDMA_SCM_BASE_ADDR+SCM_DEBUG_VERSION_ID_OFFSET) << 2))
#define            SCM_DEBUG_VERSION_ID_RES_VAL                0x00000107
//R/W
//No write to this reg are allowed
//-------------------------







#define             SCM_RESET_RD_MASK    0x00000001

#define             SCM_RESET_WR_MASK    0x00000001


#define             SCM_CONTROL_RD_MASK    0xC173FFFF

#define             SCM_CONTROL_WR_MASK    0xC173FFFF


#define             SCM_START_SRCH_A_NOW_RD_MASK    0x00000001

#define             SCM_START_SRCH_A_NOW_WR_MASK    0x00000001


#define             SCM_START_SRCH_B_NOW_RD_MASK    0x00000001

#define             SCM_START_SRCH_B_NOW_WR_MASK    0x00000001


#define             SCM_START_SRCH_A_LATER_RD_MASK    0x00000001

#define             SCM_START_SRCH_A_LATER_WR_MASK    0x00000001


#define             SCM_START_SRCH_B_LATER_RD_MASK    0x00000001

#define             SCM_START_SRCH_B_LATER_WR_MASK    0x00000001


#define             SCM_START_OFFLINE_SRCH_RD_MASK    0x00000003

#define             SCM_START_OFFLINE_SRCH_WR_MASK    0x00000003


#define             SCM_START_FILL_NOW_RD_MASK    0x00000001

#define             SCM_START_FILL_NOW_WR_MASK    0x00000001


#define             SCM_START_FILL_LATER_RD_MASK    0x00000001

#define             SCM_START_FILL_LATER_WR_MASK    0x00000001


#define             SCM_FILL_DONE_STATUS_CLEAR_RD_MASK    0x00000001

#define             SCM_FILL_DONE_STATUS_CLEAR_WR_MASK    0x00000001


#define             SCM_FILL_DONE_STATUS_RD_MASK    0x00000001
//The SCM_FILL_DONE_STATUS reg has no write-able bits


#define             SCM_DEBUG_VERSION_ID_RD_MASK    0x0000FFFF
//The SCM_DEBUG_VERSION_ID reg has no write-able bits

#define             SCM_DEBUG_VERSION_ID_RES_VAL    0x00000107

//RAM Locations


//SCM_SAMPLE_MEM_ADDR
#define           SCM_SAMPLE_MEM_ADDR_OFFSET           0x18
#define           SCM_SAMPLE_MEM_ADDR                  REG32(WCDMA_CS_LB+((WCDMA_SCM_BASE_ADDR+SCM_SAMPLE_MEM_ADDR_OFFSET) << 2))

#define             SCM_SAMPLE_MEM_ADDR_RD_MASK    0x00003FFF
#define             SCM_SAMPLE_MEM_ADDR_WR_MASK    0x00003FFF
//-------------------------
//SCM_SAMPLE_MEM_DATA
#define           SCM_SAMPLE_MEM_DATA_OFFSET           0x19
#define           SCM_SAMPLE_MEM_DATA                  REG32(WCDMA_CS_LB+((WCDMA_SCM_BASE_ADDR+SCM_SAMPLE_MEM_DATA_OFFSET) << 2))

#define             SCM_SAMPLE_MEM_DATA_RD_MASK    0x00003FF
#define             SCM_SAMPLE_MEM_DATA_WR_MASK    0x00003FF
//-------------------------

// Function prototype
void WCDMA_ScmTestResetValue(void);
void WCDMA_ScmTestRegistersAccess(void);

#endif