setup_memories.asm

来自「OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI」· 汇编 代码 · 共 78 行

;-----------------------------------------------------------------
;--								--
;--              File: macro_init_Flash_asynch.asm		--
;--              Author: Sebastien Sabatier			--
;--              TI rep.: Eric Desmarchelier			--
;--              Date: 15 December 1998				--
;--								--
;--	Content: macro used to program Traffic Controller, 	--
;--		 Flash (in asynchronous mode) and SDRAM.	--
;--              Language: TMS470R1x Assembly (ARM)		--
;--								--
;--	To use this macro in a main program:			--
;--	1) include the macro definition at beginning of program	--
;--		.include "macro_init_Flash_asynch.asm"  	--
;--	2) Call this macro as following:			--
;--		init_TC_Flash_asynch				--
;--								--
;-----------------------------------------------------------------	

setup_memories	.macro
	
	B	Start 		; Branch to the beginning of configuration
;-----------------------------------------------------------------
;--      		Definition of values			--
;--	These values should be modified here if you want to 	--
;--	modify the configuration.				--
;-----------------------------------------------------------------
AdrDMACtrlBase	.word 0x04000000

ValIntCtrlReg	.word 0x00000037

ValDMACtrlReg	.word 0x0037F900

ValFlashConf1	.word 0x0008D1D0

; With this value, flash1 is configured in asynchronous mode and with 
; no clock division.

ValFlashConf2	.word 0x0008D1D0
; With this value, flash2 is configured in asynchronous mode and with 
; no clock division.

ValFlashConf3	.word 0x0008D1D0
; With this value, flash3 is configured in asynchronous mode and with 
; no clock division.
			
AdrFlashConf1   .word 0x04000010
;-----------------------------------------------------------------	
;--	Program Internal Control Registers of DMA controller	--
;----------------------------------------------------------------- 
Start	LDR	R1, AdrDMACtrlBase	; AdrDMACtrlBase : 0x04000000
	
;--	Program Flash1 Configuration		--	
	LDR	R2, ValFlashConf1	
	STR	R2, [R1,#0x10]		; AdrFlashConf1 : 0x04000010

	LDR     R2, AdrFlashConf1
	LDR     R4, [R2]

;--	Program the SDRAM mode			--	
	LDR	R2, ValIntCtrlReg	
	STR	R2, [R1,#8]		; AdrIntCtrlReg : 0x04000008
	
;--	Program the DMA Control Register	--		
	LDR	R2, ValDMACtrlReg	
	STR	R2, [R1]		; AdrDMACtrlReg : 0x04000000
	
;--	Program Flash2 Configuration		--	
	LDR	R2, ValFlashConf2	
	STR	R2, [R1,#0x14]		; AdrFlashConf2 : 0x04000014
	
;--	Program Flash3 Configuration		--	
	LDR	R2, ValFlashConf3	
	STR	R2, [R1,#0x18]		; AdrFlashConf3 : 0x04000018	
	
	.endm