omap_32_wt.h

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

//========================================================================
//          TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION  
//   Property of Texas Instruments
//   For Unrestricted Internal Use Only
//   Unauthorized reprofuction and/or distribution is strictly prohibited.
//   This product is protected under copyright law and trade secret law
//   as an unpublished work
//   Created 2000,  (C) Copyright 2000 Texas Instruments. All rights reserved
//
//
//   Filename           :omap_32_wt.h
//
//   Date of Module Modification:4/26/02
//   Date of Generation :5/3/02
//
//
//========================================================================
#include "omap_32_mapping.h"
#ifndef _WT__H
#define _WT__H

//BEGIN INC GENERATION
//--------------------------------------


//Register Offset
//-------------------
#define            WT_EMIFF_W1_TOPADDR_OFFSET                                                                          0x0
#define            WT_EMIFF_W1_BOTADDR_OFFSET                                                                          0x04
#define            WT_EMIFF_W2_TOPADDR_OFFSET                                                                          0x08
#define            WT_EMIFF_W2_BOTADDR_OFFSET                                                                          0x0C
#define            WT_EMIFS_W1_TOPADDR_OFFSET                                                                          0x10
#define            WT_EMIFS_W1_BOTADDR_OFFSET                                                                          0x14
#define            WT_EMIFS_W2_TOPADDR_OFFSET                                                                          0x18
#define            WT_EMIFS_W2_BOTADDR_OFFSET                                                                          0x1C
#define            WT_OCPT1_W1_TOPADDR_OFFSET                                                                          0x20
#define            WT_OCPT1_W1_BOTADDR_OFFSET                                                                          0x24
#define            WT_OCPT1_W2_TOPADDR_OFFSET                                                                          0x28
#define            WT_OCPT1_W2_BOTADDR_OFFSET                                                                          0x2C
#define            WT_OCPT2_W1_TOPADDR_OFFSET                                                                          0x30
#define            WT_OCPT2_W1_BOTADDR_OFFSET                                                                          0x34
#define            WT_OCPT2_W2_TOPADDR_OFFSET                                                                          0x38
#define            WT_OCPT2_W2_BOTADDR_OFFSET                                                                          0x3C
#define            WT_WT_WINENR_OFFSET                                                                                 0x40




//WT_EMIFF_W1_TOPADDR
//-------------------
#define            WT_EMIFF_W1_TOPADDR                                                                                 REG32(WT_BASE_ADDR_ARM+WT_EMIFF_W1_TOPADDR_OFFSET)


#define            WT_EMIFF_W1_TOPADDR_ADDRESS_POS                                                                       0
#define            WT_EMIFF_W1_TOPADDR_ADDRESS_NUMB                                                                      32
#define            WT_EMIFF_W1_TOPADDR_ADDRESS_RES_VAL                                                                   0x0
//R/W


//WT_EMIFF_W1_BOTADDR
//-------------------
#define            WT_EMIFF_W1_BOTADDR                                                                                 REG32(WT_BASE_ADDR_ARM+WT_EMIFF_W1_BOTADDR_OFFSET)


#define            WT_EMIFF_W1_BOTADDR_ADDRESS_POS                                                                       0
#define            WT_EMIFF_W1_BOTADDR_ADDRESS_NUMB                                                                      32
#define            WT_EMIFF_W1_BOTADDR_ADDRESS_RES_VAL                                                                   0x0
//R/W


//WT_EMIFF_W2_TOPADDR
//-------------------
#define            WT_EMIFF_W2_TOPADDR                                                                                 REG32(WT_BASE_ADDR_ARM+WT_EMIFF_W2_TOPADDR_OFFSET)


#define            WT_EMIFF_W2_TOPADDR_ADDRESS_POS                                                                       0
#define            WT_EMIFF_W2_TOPADDR_ADDRESS_NUMB                                                                      32
#define            WT_EMIFF_W2_TOPADDR_ADDRESS_RES_VAL                                                                   0x0
//R/W


//WT_EMIFF_W2_BOTADDR
//-------------------
#define            WT_EMIFF_W2_BOTADDR                                                                                 REG32(WT_BASE_ADDR_ARM+WT_EMIFF_W2_BOTADDR_OFFSET)


#define            WT_EMIFF_W2_BOTADDR_ADDRESS_POS                                                                       0
#define            WT_EMIFF_W2_BOTADDR_ADDRESS_NUMB                                                                      32
#define            WT_EMIFF_W2_BOTADDR_ADDRESS_RES_VAL                                                                   0x0
//R/W


//WT_EMIFS_W1_TOPADDR
//-------------------
#define            WT_EMIFS_W1_TOPADDR                                                                                 REG32(WT_BASE_ADDR_ARM+WT_EMIFS_W1_TOPADDR_OFFSET)


#define            WT_EMIFS_W1_TOPADDR_ADDRESS_POS                                                                       0
#define            WT_EMIFS_W1_TOPADDR_ADDRESS_NUMB                                                                      32
#define            WT_EMIFS_W1_TOPADDR_ADDRESS_RES_VAL                                                                   0x0
//R/W


//WT_EMIFS_W1_BOTADDR
//-------------------
#define            WT_EMIFS_W1_BOTADDR                                                                                 REG32(WT_BASE_ADDR_ARM+WT_EMIFS_W1_BOTADDR_OFFSET)


#define            WT_EMIFS_W1_BOTADDR_ADDRESS_POS                                                                       0
#define            WT_EMIFS_W1_BOTADDR_ADDRESS_NUMB                                                                      32
#define            WT_EMIFS_W1_BOTADDR_ADDRESS_RES_VAL                                                                   0x0
//R/W


//WT_EMIFS_W2_TOPADDR
//-------------------
#define            WT_EMIFS_W2_TOPADDR                                                                                 REG32(WT_BASE_ADDR_ARM+WT_EMIFS_W2_TOPADDR_OFFSET)


#define            WT_EMIFS_W2_TOPADDR_ADDRESS_POS                                                                       0
#define            WT_EMIFS_W2_TOPADDR_ADDRESS_NUMB                                                                      32
#define            WT_EMIFS_W2_TOPADDR_ADDRESS_RES_VAL                                                                   0x0
//R/W


//WT_EMIFS_W2_BOTADDR
//-------------------
#define            WT_EMIFS_W2_BOTADDR                                                                                 REG32(WT_BASE_ADDR_ARM+WT_EMIFS_W2_BOTADDR_OFFSET)


#define            WT_EMIFS_W2_BOTADDR_ADDRESS_POS                                                                       0
#define            WT_EMIFS_W2_BOTADDR_ADDRESS_NUMB                                                                      32
#define            WT_EMIFS_W2_BOTADDR_ADDRESS_RES_VAL                                                                   0x0
//R/W