mmcsd.h

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//===============================================================================
//            TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION           
//                                                                             
//   Property of Texas Instruments 
//   For  Unrestricted  Internal  Use  Only 
//   Unauthorized reproduction and/or distribution is strictly prohibited.  
//   This product is protected under copyright law and trade secret law 
//   as an unpublished work.  
//   Created 1999, (C) Copyright 1999 Texas Instruments.  All rights reserved.
//
//   Filename             : mmc.h
//   Description          : Header file for the Multi Media Card Security Data Adapter functions
//                          in mmc.c
//
//   Project              : Helen
//
//
//   Author               : FRANCK FERRIZ
//  
//===============================================================================


#include "global_types.h"
#include "mapping.h"
#include "mem.h"
#include "result.h"
#include "clkrst.h"
#include "test.h"
#include "tb_regs.h"

/* ALIGNOrNotOn32Bits_from8bits is a macro defined in mapping.h 
      to adapt register's offsets for 16 or 32 bits addressing mode */

#define MMCSD_ADP_CMD_REG_OFFSET        ((0x00)<<1)
#define MMCSD_ADP_ARG1_REG_OFFSET       ((0x01)<<1)
#define MMCSD_ADP_ARG2_REG_OFFSET       ((0x02)<<1)
#define MMCSD_ADP_CON_REG_OFFSET        ((0x03)<<1)
#define MMCSD_ADP_STAT_REG_OFFSET       ((0x04)<<1)
#define MMCSD_ADP_IE_REG_OFFSET         ((0x05)<<1)
#define MMCSD_ADP_CTO_REG_OFFSET        ((0x06)<<1)
#define MMCSD_ADP_DTO_REG_OFFSET        ((0x07)<<1)
#define MMCSD_ADP_DATA_REG_OFFSET       ((0x08)<<1)
#define MMCSD_ADP_BLEN_REG_OFFSET       ((0x09)<<1)
#define MMCSD_ADP_NBLK_REG_OFFSET       ((0x0A)<<1)
#define MMCSD_ADP_BUF_REG_OFFSET        ((0x0B)<<1)
#define MMCSD_ADP_SPI_REG_OFFSET        ((0x0C)<<1)
#define MMCSD_SDIO_REG_OFFSET           ((0x0D)<<1)
#define MMCSD_ADP_SYST_REG_OFFSET       ((0x0E)<<1)
#define MMCSD_ADP_REV_REG_OFFSET        ((0x0F)<<1)
#define MMCSD_ADP_RSP0_REG_OFFSET       ((0x10)<<1)
#define MMCSD_ADP_RSP1_REG_OFFSET       ((0x11)<<1)
#define MMCSD_ADP_RSP2_REG_OFFSET       ((0x12)<<1)
#define MMCSD_ADP_RSP3_REG_OFFSET       ((0x13)<<1)
#define MMCSD_ADP_RSP4_REG_OFFSET       ((0x14)<<1)
#define MMCSD_ADP_RSP5_REG_OFFSET       ((0x15)<<1)
#define MMCSD_ADP_RSP6_REG_OFFSET       ((0x16)<<1)
#define MMCSD_ADP_RSP7_REG_OFFSET       ((0x17)<<1)
#define MMCSD_ADP_IOSR_REG_OFFSET       ((0x18)<<1)
#define MMCSD_ADP_SYSC_REG_OFFSET       ((0x19)<<1)
#define MMCSD_ADP_SYSS_REG_OFFSET       ((0x1A)<<1)


#define MMCSD_ADP_CMD_REG_ADDR        (MMC_BASE_ADDR + MMCSD_ADP_CMD_REG_OFFSET)
#define MMCSD_ADP_ARG1_REG_ADDR       (MMC_BASE_ADDR + MMCSD_ADP_ARG1_REG_OFFSET)
#define MMCSD_ADP_ARG2_REG_ADDR       (MMC_BASE_ADDR + MMCSD_ADP_ARG2_REG_OFFSET)
#define MMCSD_ADP_CON_REG_ADDR        (MMC_BASE_ADDR + MMCSD_ADP_CON_REG_OFFSET)
#define MMCSD_ADP_STAT_REG_ADDR       (MMC_BASE_ADDR + MMCSD_ADP_STAT_REG_OFFSET)
#define MMCSD_ADP_IE_REG_ADDR         (MMC_BASE_ADDR + MMCSD_ADP_IE_REG_OFFSET)
#define MMCSD_ADP_CTO_REG_ADDR        (MMC_BASE_ADDR + MMCSD_ADP_CTO_REG_OFFSET)
#define MMCSD_ADP_DTO_REG_ADDR        (MMC_BASE_ADDR + MMCSD_ADP_DTO_REG_OFFSET)
#define MMCSD_ADP_DATA_REG_ADDR       (MMC_BASE_ADDR + MMCSD_ADP_DATA_REG_OFFSET)
#define MMCSD_ADP_BLEN_REG_ADDR       (MMC_BASE_ADDR + MMCSD_ADP_BLEN_REG_OFFSET)
#define MMCSD_ADP_NBLK_REG_ADDR       (MMC_BASE_ADDR + MMCSD_ADP_NBLK_REG_OFFSET)
#define MMCSD_ADP_BUF_REG_ADDR        (MMC_BASE_ADDR + MMCSD_ADP_BUF_REG_OFFSET)      
#define MMCSD_ADP_SPI_REG_ADDR        (MMC_BASE_ADDR + MMCSD_ADP_SPI_REG_OFFSET)       
#define MMCSD_SDIO_REG_ADDR           (MMC_BASE_ADDR + MMCSD_SDIO_REG_OFFSET)
#define MMCSD_ADP_SYST_REG_ADDR       (MMC_BASE_ADDR + MMCSD_ADP_SYST_REG_OFFSET)
#define MMCSD_ADP_REV_REG_ADDR        (MMC_BASE_ADDR + MMCSD_ADP_REV_REG_OFFSET)
#define MMCSD_ADP_RSP0_REG_ADDR       (MMC_BASE_ADDR + MMCSD_ADP_RSP0_REG_OFFSET)
#define MMCSD_ADP_RSP1_REG_ADDR       (MMC_BASE_ADDR + MMCSD_ADP_RSP1_REG_OFFSET)
#define MMCSD_ADP_RSP2_REG_ADDR       (MMC_BASE_ADDR + MMCSD_ADP_RSP2_REG_OFFSET)
#define MMCSD_ADP_RSP3_REG_ADDR       (MMC_BASE_ADDR + MMCSD_ADP_RSP3_REG_OFFSET)
#define MMCSD_ADP_RSP4_REG_ADDR       (MMC_BASE_ADDR + MMCSD_ADP_RSP4_REG_OFFSET)
#define MMCSD_ADP_RSP5_REG_ADDR       (MMC_BASE_ADDR + MMCSD_ADP_RSP5_REG_OFFSET)
#define MMCSD_ADP_RSP6_REG_ADDR       (MMC_BASE_ADDR + MMCSD_ADP_RSP6_REG_OFFSET)
#define MMCSD_ADP_RSP7_REG_ADDR       (MMC_BASE_ADDR + MMCSD_ADP_RSP7_REG_OFFSET)
#define MMCSD_ADP_IOSR_REG_ADDR       (MMC_BASE_ADDR + MMCSD_ADP_IOSR_REG_OFFSET)
#define MMCSD_ADP_SYSC_REG_ADDR       (MMC_BASE_ADDR + MMCSD_ADP_SYSC_REG_OFFSET)
#define MMCSD_ADP_SYSS_REG_ADDR       (MMC_BASE_ADDR + MMCSD_ADP_SYSS_REG_OFFSET)

// Beginging of registers field description
//MMCSD_ADP_CMD_REG
//-------------------
#define            MMCSD_ADP_CMD_REG                                                                                REG16(MMC_SDIO_BASE_ADDR_ARM+MMCSD_ADP_CMD_REG_OFFSET)


#define            MMCSD_ADP_CMD_REG_DDIR_POS                                                                         15
#define            MMCSD_ADP_CMD_REG_DDIR_NUMB                                                                        1
#define            MMCSD_ADP_CMD_REG_DDIR_RES_VAL                                                                     0x0
//R/W

#define            MMCSD_ADP_CMD_REG_SHR_POS                                                                          14
#define            MMCSD_ADP_CMD_REG_SHR_NUMB                                                                         1
#define            MMCSD_ADP_CMD_REG_SHR_RES_VAL                                                                      0x0
//R/W

#define            MMCSD_ADP_CMD_REG_TYPE_POS                                                                         12
#define            MMCSD_ADP_CMD_REG_TYPE_NUMB                                                                        2
#define            MMCSD_ADP_CMD_REG_TYPE_RES_VAL                                                                     0x00
//R/W

#define            MMCSD_ADP_CMD_REG_BUSY_POS                                                                         11
#define            MMCSD_ADP_CMD_REG_BUSY_NUMB                                                                        1
#define            MMCSD_ADP_CMD_REG_BUSY_RES_VAL                                                                     0x00
//R/W

#define            MMCSD_ADP_CMD_REG_RSP_POS                                                                          8
#define            MMCSD_ADP_CMD_REG_RSP_NUMB                                                                         3
#define            MMCSD_ADP_CMD_REG_RSP_RES_VAL                                                                      0x0
//R/W

#define            MMCSD_ADP_CMD_REG_INAB_POS                                                                         7
#define            MMCSD_ADP_CMD_REG_INAB_NUMB                                                                        1
#define            MMCSD_ADP_CMD_REG_INAB_RES_VAL                                                                     0x0
//R/W

#define            MMCSD_ADP_CMD_REG_ODTO_POS                                                                         6
#define            MMCSD_ADP_CMD_REG_ODTO_NUMB                                                                        1
#define            MMCSD_ADP_CMD_REG_ODTO_RES_VAL                                                                     0x0
//R/W

#define            MMCSD_ADP_CMD_REG_INDX_POS                                                                         0
#define            MMCSD_ADP_CMD_REG_INDX_NUMB                                                                        6
#define            MMCSD_ADP_CMD_REG_INDX_RES_VAL                                                                     0x00
//R/W


//MMCSD_ADP_ARGL_REG
//-------------------
#define            MMCSD_ADP_ARGL_REG                                                                               REG16(MMC_SDIO_BASE_ADDR_ARM+MMCSD_ADP_ARGL_REG_OFFSET)


#define            MMCSD_ADP_ARGL_REG_ARGL_POS                                                                        0
#define            MMCSD_ADP_ARGL_REG_ARGL_NUMB                                                                       16
#define            MMCSD_ADP_ARGL_REG_ARGL_RES_VAL                                                                    0x0000
//R/W


//MMCSD_ADP_ARGH_REG
//-------------------
#define            MMCSD_ADP_ARGH_REG                                                                               REG16(MMC_SDIO_BASE_ADDR_ARM+MMCSD_ADP_ARGH_REG_OFFSET)


#define            MMCSD_ADP_ARGH_REG_ARGH_POS                                                                        0
#define            MMCSD_ADP_ARGH_REG_ARGH_NUMB                                                                       16
#define            MMCSD_ADP_ARGH_REG_ARGH_RES_VAL                                                                    0x0
//R/W


//MMCSD_ADP_CON_REG
//-------------------
#define            MMCSD_ADP_CON_REG                                                                                REG16(MMC_SDIO_BASE_ADDR_ARM+MMCSD_ADP_CON_REG_OFFSET)


#define            MMCSD_ADP_CON_REG_DW_POS                                                                           15
#define            MMCSD_ADP_CON_REG_DW_NUMB                                                                          1
#define            MMCSD_ADP_CON_REG_DW_RES_VAL                                                                       0x0
//R/W

#define            MMCSD_ADP_CON_REG_RESERVED_POS                                                                     14
#define            MMCSD_ADP_CON_REG_RESERVED_NUMB                                                                    1
#define            MMCSD_ADP_CON_REG_RESERVED_RES_VAL                                                                 0x0
//R

#define            MMCSD_ADP_CON_REG_MODE_POS                                                                         12
#define            MMCSD_ADP_CON_REG_MODE_NUMB                                                                        2
#define            MMCSD_ADP_CON_REG_MODE_RES_VAL                                                                     0x0
//R/W

#define            MMCSD_ADP_CON_REG_POW_POS                                                                          11
#define            MMCSD_ADP_CON_REG_POW_NUMB                                                                         1
#define            MMCSD_ADP_CON_REG_POW_RES_VAL                                                                      0x0
//R/W

#define            MMCSD_ADP_CON_REG_BE_POS                                                                           10
#define            MMCSD_ADP_CON_REG_BE_NUMB                                                                          1
#define            MMCSD_ADP_CON_REG_BE_RES_VAL                                                                       0x00
//R/W

#define            MMCSD_ADP_CON_REG_CLKD_POS                                                                         0
#define            MMCSD_ADP_CON_REG_CLKD_NUMB                                                                        10
#define            MMCSD_ADP_CON_REG_CLKD_RES_VAL                                                                     0x00
//R/W


//MMCSD_ADP_STAT_REG
//-------------------
#define            MMCSD_ADP_STAT_REG                                                                               REG16(MMC_SDIO_BASE_ADDR_ARM+MMCSD_ADP_STAT_REG_OFFSET)