sti.h
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/*Header modified by DSP-CONVERT V1.01 Script on Tue Aug 13 14:51:46 MEST 2002*/
//========================================================================
// TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
// Property of Texas Instruments
// For Unrestricted Internal Use Only
// Unauthorized reprofuction and/or distribution is strictly prohibited.
// This product is protected under copyright law and trade secret law
// as an unpublished work
// Created 2000, (C) Copyright 2000 Texas Instruments. All rights reserved
//
//
// Filename :sti.h
//
// Date of Module Modification:6/26/02
// Date of Generation :6/26/02
//
//
//========================================================================
#include "mapping.h"
#ifndef _STI__H
#define _STI__H
//BEGIN INC GENERATION
//--------------------------------------
#ifndef DSP_ADJUST /* If DSP_ADJUST is not defined, we are using */
#define DSP_ADJUST /* include file for ARM code, we do not need any */
#endif /* modufucations. If this file is used for DSP code, */
//Register Offset
//-------------------
#define coeff8_arm 1
#define coeff16_arm 1
#define coeff32_arm 1
//-------------------
#define STI_STI_REV_OFFSET (0x000 DSP_ADJUST)
#define STI_STI_SYSCONFIG_OFFSET (0x010 DSP_ADJUST)
#define STI_STI_SYSSTATUS_OFFSET (0x014 DSP_ADJUST)
#define STI_STI_IRQSTATUS_OFFSET (0x018 DSP_ADJUST)
#define STI_STI_IRQSETENA_OFFSET (0x01C DSP_ADJUST)
#define STI_STI_IRQCLRENA_OFFSET (0x020 DSP_ADJUST)
#define STI_STI_ER_OFFSET (0x024 DSP_ADJUST)
#define STI_STI_DR_OFFSET (0x028 DSP_ADJUST)
#define STI_STI_RXDR_OFFSET (0x02C DSP_ADJUST)
#define STI_STI_RXSR_OFFSET (0x030 DSP_ADJUST)
#define STI_STI_SCLKCTRL_OFFSET (0x034 DSP_ADJUST)
#define STI_STI_STATMATCH0_OFFSET (0x038 DSP_ADJUST)
#define STI_STI_STATMATCH1_OFFSET (0x03C DSP_ADJUST)
#define STI_STI_STATMATCH2_OFFSET (0x040 DSP_ADJUST)
#define STI_STI_STATMATCH3_OFFSET (0x044 DSP_ADJUST)
#define STI_STI_STATMATCH4_OFFSET (0x048 DSP_ADJUST)
#define STI_STI_IOBOTT0_OFFSET (0x04C DSP_ADJUST)
#define STI_STI_IOTOP0_OFFSET (0x050 DSP_ADJUST)
#define STI_STI_IOBOTT1_OFFSET (0x054 DSP_ADJUST)
#define STI_STI_IOTOP1_OFFSET (0x058 DSP_ADJUST)
#define STI_STI_FIFOSTAT_OFFSET (0x05C DSP_ADJUST)
#define STI_STI_SCFG_OFFSET (0x060 DSP_ADJUST)
#define STI_STI_DUMPTHLD_OFFSET (0x064 DSP_ADJUST)
#define STI_RTDX_REC_CNTL_OFFSET (0x080 DSP_ADJUST)
#define STI_RTDX_XMIT_CNTL_OFFSET (0x084 DSP_ADJUST)
#define STI_RTDX_CFG_OFFSET (0x098 DSP_ADJUST)
#define STI_RTDX_ID_OFFSET (0x09C DSP_ADJUST)
#define STI_STI_FIFODUMP_OFFSET (0x100 DSP_ADJUST)
#define STI_DSPWRITECMD_AREA_OFFSET (0x200 DSP_ADJUST)
#define STI_MCUWRITECMD_AREA_OFFSET (0x400 DSP_ADJUST)
#ifndef DSP_ACCESS
//STI_STI_REV
//-------------------
#define STI_STI_REV_8_0 REG8(STI_BASE_ADDR_ARM+STI_STI_REV_OFFSET*coeff8_arm+0)
#define STI_STI_REV_8_0_STI_REV1_POS 4
#define STI_STI_REV_8_0_STI_REV1_NUMB 4
#define STI_STI_REV_8_0_STI_REV1_RES_VAL 0x1
//R
#define STI_STI_REV_8_0_STI_REV0_POS 0
#define STI_STI_REV_8_0_STI_REV0_NUMB 4
#define STI_STI_REV_8_0_STI_REV0_RES_VAL 0x0
//R
#define STI_STI_REV_8_1 REG8(STI_BASE_ADDR_ARM+STI_STI_REV_OFFSET*coeff8_arm+1)
#define STI_STI_REV_8_1_STI_REV1_POS 4
#define STI_STI_REV_8_1_STI_REV1_NUMB 4
#define STI_STI_REV_8_1_STI_REV1_RES_VAL 0x1
//R
#define STI_STI_REV_8_1_STI_REV0_POS 0
#define STI_STI_REV_8_1_STI_REV0_NUMB 4
#define STI_STI_REV_8_1_STI_REV0_RES_VAL 0x0
//R
#define STI_STI_REV_8_2 REG8(STI_BASE_ADDR_ARM+STI_STI_REV_OFFSET*coeff8_arm+2)
#define STI_STI_REV_8_2_STI_REV1_POS 4
#define STI_STI_REV_8_2_STI_REV1_NUMB 4
#define STI_STI_REV_8_2_STI_REV1_RES_VAL 0x1
//R
#define STI_STI_REV_8_2_STI_REV0_POS 0
#define STI_STI_REV_8_2_STI_REV0_NUMB 4
#define STI_STI_REV_8_2_STI_REV0_RES_VAL 0x0
//R
#define STI_STI_REV_8_3 REG8(STI_BASE_ADDR_ARM+STI_STI_REV_OFFSET*coeff8_arm+3)
#define STI_STI_REV_8_3_STI_REV1_POS 4
#define STI_STI_REV_8_3_STI_REV1_NUMB 4
#define STI_STI_REV_8_3_STI_REV1_RES_VAL 0x1
//R
#define STI_STI_REV_8_3_STI_REV0_POS 0
#define STI_STI_REV_8_3_STI_REV0_NUMB 4
#define STI_STI_REV_8_3_STI_REV0_RES_VAL 0x0
//R
#endif /* DSP_ACCESS */
#ifndef DSP_ACCESS
#define STI_STI_REV_16_0 REG16(STI_BASE_ADDR_ARM+STI_STI_REV_OFFSET*coeff16_arm+0)
#else
#define STI_STI_REV_16_0 REG16(STI_BASE_ADDR_DSP+STI_STI_REV_OFFSET)
#endif
#define STI_STI_REV_16_0_STI_REV1_POS 4
#define STI_STI_REV_16_0_STI_REV1_NUMB 4
#define STI_STI_REV_16_0_STI_REV1_RES_VAL 0x1
//R
#define STI_STI_REV_16_0_STI_REV0_POS 0
#define STI_STI_REV_16_0_STI_REV0_NUMB 4
#define STI_STI_REV_16_0_STI_REV0_RES_VAL 0x0
//R
#ifndef DSP_ACCESS
#define STI_STI_REV_16_2 REG16(STI_BASE_ADDR_ARM+STI_STI_REV_OFFSET*coeff16_arm+2)
#else
#define STI_STI_REV_16_2 REG16(STI_BASE_ADDR_DSP+STI_STI_REV_OFFSET+1)
#endif
#define STI_STI_REV_16_2_STI_REV1_POS 4
#define STI_STI_REV_16_2_STI_REV1_NUMB 4
#define STI_STI_REV_16_2_STI_REV1_RES_VAL 0x1
//R
#define STI_STI_REV_16_2_STI_REV0_POS 0
#define STI_STI_REV_16_2_STI_REV0_NUMB 4
#define STI_STI_REV_16_2_STI_REV0_RES_VAL 0x0
#ifndef DSP_ACCESS
#define STI_STI_REV_32 REG32(STI_BASE_ADDR_ARM+STI_STI_REV_OFFSET*coeff32_arm)
#define STI_STI_REV_32_STI_REV1_POS 4
#define STI_STI_REV_32_STI_REV1_NUMB 4
#define STI_STI_REV_32_STI_REV1_RES_VAL 0x1
//R
#define STI_STI_REV_32_STI_REV0_POS 0
#define STI_STI_REV_32_STI_REV0_NUMB 4
#define STI_STI_REV_32_STI_REV0_RES_VAL 0x0
//R
//STI_STI_SYSCONFIG
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