📄 flashintel.h
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//===============================================================================
// TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
//
// Property of Texas Instruments
// For Unrestricted Internal Use Only
// Unauthorized reproduction and/or distribution is strictly prohibited.
// This product is protected under copyright law and trade secret law
// as an unpublished work.
// Created 1999, (C) Copyright 1999 Texas Instruments. All rights reserved.
//
// Filename : flashintel.h
//
// Description : Header file for the Intel Flash memory
// (burst flash 28F160F3 or strata flash 28F128J3A)
//
// Project : TI925MM
//
// Author : Daniel BLANC
// Adapted by : Francis HUGUENIN
//===============================================================================
#ifndef _FLASH__HH
#define _FLASH__HH
#include "top.h"
//----------------------------------------------
// Intel Flash Pair memory command values -
//----------------------------------------------
#define FPAIR_UNDEFINEDADDRESS1 0x00000000
#define FPAIR_UNDEFINEDADDRESS2 0x00000004
#define FPAIR_READARRAYDATA 0x00FF00FF
#define FPAIR_READIDCODES 0x00900090
#define FPAIR_READSTATUSDATA 0x00700070
#define FPAIR_CLEARSTATUS 0x00500050
#define FPAIR_ERASEBLOCK 0x00200020
#define FPAIR_ERASEBLOCKCONFIRM 0x00D000D0
#define FPAIR_PROGRAMDATA 0x00400040
#define FPAIR_BERAS_PROGSUPEND 0x00B000B0
#define FPAIR_BERAS_PROGRESUM 0x00D000D0
#define FPAIR_SETREADCONF 0x00600060
#define FPAIR_CONFIRMSETUP 0x00030003
//----------------------------------------------
// Intel Flash memory command values -
//----------------------------------------------
#define FLASH_READARRAYDATA 0x00FF
#define FLASH_READIDCODES 0x0090
#define FLASH_READSTATUSDATA 0x0070
#define FLASH_CLEARSTATUS 0x0050
#define FLASH_ERASEBLOCK 0x0020
#define FLASH_ERASEBLOCKCONFIRM 0x00D0
#define FLASH_PROGRAMDATA 0x0040
#define FLASH_BERAS_PROGSUPEND 0x00B0
#define FLASH_BERAS_PROGRESUM 0x00D0
#define FLASH_SETREADCONF 0x0060
#define FLASH_CONFIRMSETUP 0x0003
#define STATUSVALIDBITS 0xFE
/* Read Configuration register values */
// RM
typedef enum {
SYNCHRONOUS_BURST=0,
PAGE_MODE=1
} Intel_read_mode_t;
// DOC
#define HOLD_DATA_ONE_CLOCK 0x0 // hold data for one Clock
#define HOLD_DATA_TWO_CLOCK 0x1
// FC
#define FC_CODE2 0x2
#define FC_CODE3 0x3
#define FC_CODE4 0x4
#define FC_CODE5 0x5
#define FC_CODE6 0x6
// WC
#define WAIT_ONE_DELAY 0x0 // Wait asserted during delay
#define WAIT_TWO_DELAY 0x1
// BS
#define INTEL_BURST 0x0 // Intel Burst ORDER
#define LINEAR_BURST 0x1 // Linear Burst ORDER
// CC
#define BURST_START_FALLEDGE 0x0 // Burst start and data output on falling edge
#define BURST_START_RISEDGE 0x1 // Burst start and data output on rising edge
//BL2-0
typedef enum { WORD_BURST_4 = 1,
WORD_BURST_8 = 2,
CONTINUOUS_BURST = 7} Burst_length_t;
//--------------------------------------------------------------------------------------
#define FPAIR_WSMS_READY_MASK 0x00800080
#define FPAIR_ERASE_STATUS_MASK 0x00800080
#define FLASH_WSMS_READY_MASK 0x0080
#define FLASH_ERASE_STATUS_MASK 0x0080
#define MANUFACTERER_ID_REQ TRUE
#define DEV16MBITBOTTOM_ID_REQ FALSE
#define DEVICE_ID_REQ FALSE
#define PROGRAM_LEVEL TRUE
#define PROTECT_LEVEL FALSE
#define MANUFACTURER_ID_PAIR 0x00890089
#define DEV16MBITBOTTOM_ID_PAIR 0x88F488F4
#define MANUFACTURER_ID_PAIRADDRESS 0xC000000
#define DEV16MBITBOTTOM_ID_PAIRADDRESS 0x00010001
#define INTEL_MANUFACTURER_ID 0x0089
#define DEVICE_INTEL_STRATA_128MBIT 0x18
#define DEVICE_INTEL_BURST_16MBIT_TOP 0x88F4
#define MANUFACTURER_ID_PAIRADDRESS 0xC000000
#define DEV16MBITBOTTOM_ID_PAIRADDRESS 0x00010001
#define EMPTY_WORD32 0xFFFFFFFF
#define EMPTY_WORD16 0xFFFF
//---------------------------------------------------------------------
// NAME : FLASH_lashIntelPairSetupRead
//
// DESCRIPTION : Setup the protocol in which the flash pair is read
//
// SYNOPSYS : void FLASH_lashIntelPairSetupRead(UWORD32 Address,
// BOOL intel_read_mode,
// BOOL data_hold,
// BOOL wait_delay,
// BOOL burst_mode,
// BOOL start_edge,
// Burst_length_t burst_length)
//
//
// PARAMETERS : Address, Base Address of the flash package
// intel_read_mode SYNCHRONOUS_BURST or PAGE_MODE
// code_frequency
// FC_CODE2
// FC_CODE3
// FC_CODE4
// FC_CODE5
// FC_CODE6
//
// data_hold, HOLD_DATA_ONE_CLOCK or HOLD_DATA_TWO_CLOCK
// wait_delay, WAIT_ONE_DELAY or WAIT_TWO_DELAY
// burst_mode, INTEL_BURST or LINEAR_BURST
// start_edge, BURST_START_FALLEDGE or BURST_START_RISEDGE
// burst_length, WORD_BURST_4, WORD_BURST_8 or CONTINUOUS_BURST
//
// RETURN VALUE: None
//
// LIMITATIONS : Use only for Intel burst Flash flash
//---------------------------------------------------------------------
void FLASH_lashIntelPairSetupRead(UWORD32 Address,
BOOL intel_read_mode,
UWORD8 code_frequency,
BOOL data_hold,
BOOL wait_delay,
BOOL burst_mode,
BOOL start_edge,
Burst_length_t burst_length);
//---------------------------------------------------------------------
// NAME : FLASH_FlashIntelSetupRead
//
// DESCRIPTION : Setup the protocol in which the flash pair is read
//
// SYNOPSYS : void FLASH_lashIntelPairSetupRead(UWORD32 Address,
// BOOL intel_read_mode,
// BOOL data_hold,
// BOOL wait_delay,
// BOOL burst_mode,
// BOOL start_edge,
// Burst_length_t burst_length)
//
//
// PARAMETERS : Address, Base Address of the flash package
// intel_read_mode SYNCHRONOUS_BURST or PAGE_MODE
// code_frequency
// FC_CODE2
// FC_CODE3
// FC_CODE4
// FC_CODE5
// FC_CODE6
//
// data_hold, HOLD_DATA_ONE_CLOCK or HOLD_DATA_TWO_CLOCK
// wait_delay, WAIT_ONE_DELAY or WAIT_TWO_DELAY
// burst_mode, INTEL_BURST or LINEAR_BURST
// start_edge, BURST_START_FALLEDGE or BURST_START_RISEDGE
// burst_length, WORD_BURST_4, WORD_BURST_8 or CONTINUOUS_BURST
//
// RETURN VALUE: None
//
// LIMITATIONS : Use only for Intel burst Flash flash
//---------------------------------------------------------------------
void FLASH_FlashIntelSetupRead(UWORD32 Address,
BOOL intel_read_mode,
UWORD8 code_frequency,
BOOL data_hold,
BOOL wait_delay,
BOOL burst_mode,
BOOL start_edge,
Burst_length_t burst_length);
//---------------------------------------------------------------------
// NAME : FLASH_StrataFlashIntelSetupRead
//
// DESCRIPTION : Configure strata flash mode read (asynchronous or page mode)
//
// PARAMETERS : Address, Base Address of the flash package
// PageModeReadEnable: True if enable page mode read
// : False asynchronous read
// RETURN VALUE: None
//
// LIMITATIONS : Use only for strata flash
//---------------------------------------------------------------------
void FLASH_StrataFlashIntelSetupRead(UWORD32 Address,
BOOL PageModeReadEnable);
//---------------------------------------------------------------------
// NAME : FLASH_FlashIntelReadPairStatus
//
// DESCRIPTION : Get the status register of the flash
//
// SYNOPSYS : UWORD32 FLASH_FlashIntelReadPairStatus (UWORD32 Address)
//
//
// PARAMETERS : Address, Base Address of the flash package
//
// RETURN VALUE: UWORD32 the half MSB contains the status of the MSB flash package
// the half LSB contains the status of the LSB flash package
//
// LIMITATIONS : Setup the MIF block before access to flash
//---------------------------------------------------------------------
UWORD32 FLASH_FlashIntelReadPairStatus (UWORD32 Address);
//---------------------------------------------------------------------
// NAME : FLASH_FlashIntelReadStatus
//
// DESCRIPTION : Get the status register of the flash
//
// SYNOPSYS : UWORD16 FLASH_FlashIntelReadStatus (UWORD32 Address)
//
//
// PARAMETERS : Address, Base Address of the flash package
//
// RETURN VALUE: UWORD16 contains the status of the flash package
//
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