📄 mmc_sdio2.h
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#define MMC_SDIO2_IE_8_0_AE_POS 11
#define MMC_SDIO2_IE_8_0_AE_NUMB 1
#define MMC_SDIO2_IE_8_0_AE_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_0_AF_POS 10
#define MMC_SDIO2_IE_8_0_AF_NUMB 1
#define MMC_SDIO2_IE_8_0_AF_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_0_CRW_POS 9
#define MMC_SDIO2_IE_8_0_CRW_NUMB 1
#define MMC_SDIO2_IE_8_0_CRW_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_0_CCRC_POS 8
#define MMC_SDIO2_IE_8_0_CCRC_NUMB 1
#define MMC_SDIO2_IE_8_0_CCRC_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_0_CTO_POS 7
#define MMC_SDIO2_IE_8_0_CTO_NUMB 1
#define MMC_SDIO2_IE_8_0_CTO_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_0_DCRC_POS 6
#define MMC_SDIO2_IE_8_0_DCRC_NUMB 1
#define MMC_SDIO2_IE_8_0_DCRC_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_0_DTO_POS 5
#define MMC_SDIO2_IE_8_0_DTO_NUMB 1
#define MMC_SDIO2_IE_8_0_DTO_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_0_EOFB_POS 4
#define MMC_SDIO2_IE_8_0_EOFB_NUMB 1
#define MMC_SDIO2_IE_8_0_EOFB_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_0_BRS_POS 3
#define MMC_SDIO2_IE_8_0_BRS_NUMB 1
#define MMC_SDIO2_IE_8_0_BRS_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_0_CB_POS 2
#define MMC_SDIO2_IE_8_0_CB_NUMB 1
#define MMC_SDIO2_IE_8_0_CB_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_0_CD_POS 1
#define MMC_SDIO2_IE_8_0_CD_NUMB 1
#define MMC_SDIO2_IE_8_0_CD_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_0_EOC_POS 0
#define MMC_SDIO2_IE_8_0_EOC_NUMB 1
#define MMC_SDIO2_IE_8_0_EOC_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_1 REG8(MMC_SDIO2_BASE_ADDR_ARM+MMC_SDIO2_IE_OFFSET+1)
#define MMC_SDIO2_IE_8_1_RESERVED_POS 15
#define MMC_SDIO2_IE_8_1_RESERVED_NUMB 1
#define MMC_SDIO2_IE_8_1_RESERVED_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_1_CERR_POS 14
#define MMC_SDIO2_IE_8_1_CERR_NUMB 1
#define MMC_SDIO2_IE_8_1_CERR_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_1_CIRQ_POS 13
#define MMC_SDIO2_IE_8_1_CIRQ_NUMB 1
#define MMC_SDIO2_IE_8_1_CIRQ_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_1_OCRB_POS 12
#define MMC_SDIO2_IE_8_1_OCRB_NUMB 1
#define MMC_SDIO2_IE_8_1_OCRB_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_1_AE_POS 11
#define MMC_SDIO2_IE_8_1_AE_NUMB 1
#define MMC_SDIO2_IE_8_1_AE_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_1_AF_POS 10
#define MMC_SDIO2_IE_8_1_AF_NUMB 1
#define MMC_SDIO2_IE_8_1_AF_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_1_CRW_POS 9
#define MMC_SDIO2_IE_8_1_CRW_NUMB 1
#define MMC_SDIO2_IE_8_1_CRW_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_1_CCRC_POS 8
#define MMC_SDIO2_IE_8_1_CCRC_NUMB 1
#define MMC_SDIO2_IE_8_1_CCRC_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_1_CTO_POS 7
#define MMC_SDIO2_IE_8_1_CTO_NUMB 1
#define MMC_SDIO2_IE_8_1_CTO_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_1_DCRC_POS 6
#define MMC_SDIO2_IE_8_1_DCRC_NUMB 1
#define MMC_SDIO2_IE_8_1_DCRC_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_1_DTO_POS 5
#define MMC_SDIO2_IE_8_1_DTO_NUMB 1
#define MMC_SDIO2_IE_8_1_DTO_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_1_EOFB_POS 4
#define MMC_SDIO2_IE_8_1_EOFB_NUMB 1
#define MMC_SDIO2_IE_8_1_EOFB_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_1_BRS_POS 3
#define MMC_SDIO2_IE_8_1_BRS_NUMB 1
#define MMC_SDIO2_IE_8_1_BRS_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_1_CB_POS 2
#define MMC_SDIO2_IE_8_1_CB_NUMB 1
#define MMC_SDIO2_IE_8_1_CB_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_1_CD_POS 1
#define MMC_SDIO2_IE_8_1_CD_NUMB 1
#define MMC_SDIO2_IE_8_1_CD_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_1_EOC_POS 0
#define MMC_SDIO2_IE_8_1_EOC_NUMB 1
#define MMC_SDIO2_IE_8_1_EOC_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_2 REG8(MMC_SDIO2_BASE_ADDR_ARM+MMC_SDIO2_IE_OFFSET+2)
#define MMC_SDIO2_IE_8_2_RESERVED_POS 15
#define MMC_SDIO2_IE_8_2_RESERVED_NUMB 1
#define MMC_SDIO2_IE_8_2_RESERVED_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_2_CERR_POS 14
#define MMC_SDIO2_IE_8_2_CERR_NUMB 1
#define MMC_SDIO2_IE_8_2_CERR_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_2_CIRQ_POS 13
#define MMC_SDIO2_IE_8_2_CIRQ_NUMB 1
#define MMC_SDIO2_IE_8_2_CIRQ_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_2_OCRB_POS 12
#define MMC_SDIO2_IE_8_2_OCRB_NUMB 1
#define MMC_SDIO2_IE_8_2_OCRB_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_2_AE_POS 11
#define MMC_SDIO2_IE_8_2_AE_NUMB 1
#define MMC_SDIO2_IE_8_2_AE_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_2_AF_POS 10
#define MMC_SDIO2_IE_8_2_AF_NUMB 1
#define MMC_SDIO2_IE_8_2_AF_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_2_CRW_POS 9
#define MMC_SDIO2_IE_8_2_CRW_NUMB 1
#define MMC_SDIO2_IE_8_2_CRW_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_2_CCRC_POS 8
#define MMC_SDIO2_IE_8_2_CCRC_NUMB 1
#define MMC_SDIO2_IE_8_2_CCRC_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_2_CTO_POS 7
#define MMC_SDIO2_IE_8_2_CTO_NUMB 1
#define MMC_SDIO2_IE_8_2_CTO_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_2_DCRC_POS 6
#define MMC_SDIO2_IE_8_2_DCRC_NUMB 1
#define MMC_SDIO2_IE_8_2_DCRC_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_2_DTO_POS 5
#define MMC_SDIO2_IE_8_2_DTO_NUMB 1
#define MMC_SDIO2_IE_8_2_DTO_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_2_EOFB_POS 4
#define MMC_SDIO2_IE_8_2_EOFB_NUMB 1
#define MMC_SDIO2_IE_8_2_EOFB_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_2_BRS_POS 3
#define MMC_SDIO2_IE_8_2_BRS_NUMB 1
#define MMC_SDIO2_IE_8_2_BRS_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_2_CB_POS 2
#define MMC_SDIO2_IE_8_2_CB_NUMB 1
#define MMC_SDIO2_IE_8_2_CB_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_2_CD_POS 1
#define MMC_SDIO2_IE_8_2_CD_NUMB 1
#define MMC_SDIO2_IE_8_2_CD_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_2_EOC_POS 0
#define MMC_SDIO2_IE_8_2_EOC_NUMB 1
#define MMC_SDIO2_IE_8_2_EOC_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_3 REG8(MMC_SDIO2_BASE_ADDR_ARM+MMC_SDIO2_IE_OFFSET+3)
#define MMC_SDIO2_IE_8_3_RESERVED_POS 15
#define MMC_SDIO2_IE_8_3_RESERVED_NUMB 1
#define MMC_SDIO2_IE_8_3_RESERVED_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_3_CERR_POS 14
#define MMC_SDIO2_IE_8_3_CERR_NUMB 1
#define MMC_SDIO2_IE_8_3_CERR_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_3_CIRQ_POS 13
#define MMC_SDIO2_IE_8_3_CIRQ_NUMB 1
#define MMC_SDIO2_IE_8_3_CIRQ_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_3_OCRB_POS 12
#define MMC_SDIO2_IE_8_3_OCRB_NUMB 1
#define MMC_SDIO2_IE_8_3_OCRB_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_3_AE_POS 11
#define MMC_SDIO2_IE_8_3_AE_NUMB 1
#define MMC_SDIO2_IE_8_3_AE_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_3_AF_POS 10
#define MMC_SDIO2_IE_8_3_AF_NUMB 1
#define MMC_SDIO2_IE_8_3_AF_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_3_CRW_POS 9
#define MMC_SDIO2_IE_8_3_CRW_NUMB 1
#define MMC_SDIO2_IE_8_3_CRW_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_3_CCRC_POS 8
#define MMC_SDIO2_IE_8_3_CCRC_NUMB 1
#define MMC_SDIO2_IE_8_3_CCRC_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_3_CTO_POS 7
#define MMC_SDIO2_IE_8_3_CTO_NUMB 1
#define MMC_SDIO2_IE_8_3_CTO_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_3_DCRC_POS 6
#define MMC_SDIO2_IE_8_3_DCRC_NUMB 1
#define MMC_SDIO2_IE_8_3_DCRC_RES_VAL 0x0
//R/W
#define MMC_SDIO2_IE_8_3_DTO_POS 5
#define MMC_SDIO2_IE_8_3_DTO_NUMB 1
#define MMC_SDIO2_IE_8_3_DTO_RES_VAL 0x0
//R/W
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