omap_32_sysdma.h

来自「OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI」· C头文件 代码 · 共 833 行 · 第 1/5 页

#define            SYSDMA_DMA_CSDP_CH1_DATA_TYPE_POS                                                0
#define            SYSDMA_DMA_CSDP_CH1_DATA_TYPE_NUMB                                               2
#define            SYSDMA_DMA_CSDP_CH1_DATA_TYPE_RES_VAL                                            0x00
//R/W


//SYSDMA_DMA_CSDP_CH2
//-------------------
#define            SYSDMA_DMA_CSDP_CH2                                                            REG16(SYSDMA_BASE_ADDR_ARM+SYSDMA_DMA_CSDP_CH2_OFFSET)


//R/W

#define            SYSDMA_DMA_CSDP_CH2_DST_BURST_EN_POS                                             14
#define            SYSDMA_DMA_CSDP_CH2_DST_BURST_EN_NUMB                                            2
#define            SYSDMA_DMA_CSDP_CH2_DST_BURST_EN_RES_VAL                                         0x00
//R/W

#define            SYSDMA_DMA_CSDP_CH2_DST_PACK_POS                                                 13
#define            SYSDMA_DMA_CSDP_CH2_DST_PACK_NUMB                                                1
#define            SYSDMA_DMA_CSDP_CH2_DST_PACK_RES_VAL                                             0x0
//R/W

#define            SYSDMA_DMA_CSDP_CH2_DST_POS                                                      9
#define            SYSDMA_DMA_CSDP_CH2_DST_NUMB                                                     4
#define            SYSDMA_DMA_CSDP_CH2_DST_RES_VAL                                                  0x0000
//R/W

#define            SYSDMA_DMA_CSDP_CH2_SRC_BURST_EN_POS                                             7
#define            SYSDMA_DMA_CSDP_CH2_SRC_BURST_EN_NUMB                                            2
#define            SYSDMA_DMA_CSDP_CH2_SRC_BURST_EN_RES_VAL                                         0x00
//R/W

#define            SYSDMA_DMA_CSDP_CH2_SRC_PACK_POS                                                 6
#define            SYSDMA_DMA_CSDP_CH2_SRC_PACK_NUMB                                                1
#define            SYSDMA_DMA_CSDP_CH2_SRC_PACK_RES_VAL                                             0x0
//R/W

#define            SYSDMA_DMA_CSDP_CH2_SRC_POS                                                      2
#define            SYSDMA_DMA_CSDP_CH2_SRC_NUMB                                                     4
#define            SYSDMA_DMA_CSDP_CH2_SRC_RES_VAL                                                  0x0000
//R/W

#define            SYSDMA_DMA_CSDP_CH2_DATA_TYPE_POS                                                0
#define            SYSDMA_DMA_CSDP_CH2_DATA_TYPE_NUMB                                               2
#define            SYSDMA_DMA_CSDP_CH2_DATA_TYPE_RES_VAL                                            0x00
//R/W


//SYSDMA_DMA_CSDP_CH3
//-------------------
#define            SYSDMA_DMA_CSDP_CH3                                                            REG16(SYSDMA_BASE_ADDR_ARM+SYSDMA_DMA_CSDP_CH3_OFFSET)


//R/W

#define            SYSDMA_DMA_CSDP_CH3_DST_BURST_EN_POS                                             14
#define            SYSDMA_DMA_CSDP_CH3_DST_BURST_EN_NUMB                                            2
#define            SYSDMA_DMA_CSDP_CH3_DST_BURST_EN_RES_VAL                                         0x00
//R/W

#define            SYSDMA_DMA_CSDP_CH3_DST_PACK_POS                                                 13
#define            SYSDMA_DMA_CSDP_CH3_DST_PACK_NUMB                                                1
#define            SYSDMA_DMA_CSDP_CH3_DST_PACK_RES_VAL                                             0x0
//R/W

#define            SYSDMA_DMA_CSDP_CH3_DST_POS                                                      9
#define            SYSDMA_DMA_CSDP_CH3_DST_NUMB                                                     4
#define            SYSDMA_DMA_CSDP_CH3_DST_RES_VAL                                                  0x0000
//R/W

#define            SYSDMA_DMA_CSDP_CH3_SRC_BURST_EN_POS                                             7
#define            SYSDMA_DMA_CSDP_CH3_SRC_BURST_EN_NUMB                                            2
#define            SYSDMA_DMA_CSDP_CH3_SRC_BURST_EN_RES_VAL                                         0x00
//R/W

#define            SYSDMA_DMA_CSDP_CH3_SRC_PACK_POS                                                 6
#define            SYSDMA_DMA_CSDP_CH3_SRC_PACK_NUMB                                                1
#define            SYSDMA_DMA_CSDP_CH3_SRC_PACK_RES_VAL                                             0x0
//R/W

#define            SYSDMA_DMA_CSDP_CH3_SRC_POS                                                      2
#define            SYSDMA_DMA_CSDP_CH3_SRC_NUMB                                                     4
#define            SYSDMA_DMA_CSDP_CH3_SRC_RES_VAL                                                  0x0000
//R/W

#define            SYSDMA_DMA_CSDP_CH3_DATA_TYPE_POS                                                0
#define            SYSDMA_DMA_CSDP_CH3_DATA_TYPE_NUMB                                               2
#define            SYSDMA_DMA_CSDP_CH3_DATA_TYPE_RES_VAL                                            0x00
//R/W


//SYSDMA_DMA_CSDP_CH4
//-------------------
#define            SYSDMA_DMA_CSDP_CH4                                                            REG16(SYSDMA_BASE_ADDR_ARM+SYSDMA_DMA_CSDP_CH4_OFFSET)


//R/W

#define            SYSDMA_DMA_CSDP_CH4_DST_BURST_EN_POS                                             14
#define            SYSDMA_DMA_CSDP_CH4_DST_BURST_EN_NUMB                                            2
#define            SYSDMA_DMA_CSDP_CH4_DST_BURST_EN_RES_VAL                                         0x00
//R/W

#define            SYSDMA_DMA_CSDP_CH4_DST_PACK_POS                                                 13
#define            SYSDMA_DMA_CSDP_CH4_DST_PACK_NUMB                                                1
#define            SYSDMA_DMA_CSDP_CH4_DST_PACK_RES_VAL                                             0x0
//R/W

#define            SYSDMA_DMA_CSDP_CH4_DST_POS                                                      9
#define            SYSDMA_DMA_CSDP_CH4_DST_NUMB                                                     4
#define            SYSDMA_DMA_CSDP_CH4_DST_RES_VAL                                                  0x0000
//R/W

#define            SYSDMA_DMA_CSDP_CH4_SRC_BURST_EN_POS                                             7
#define            SYSDMA_DMA_CSDP_CH4_SRC_BURST_EN_NUMB                                            2
#define            SYSDMA_DMA_CSDP_CH4_SRC_BURST_EN_RES_VAL                                         0x00
//R/W

#define            SYSDMA_DMA_CSDP_CH4_SRC_PACK_POS                                                 6
#define            SYSDMA_DMA_CSDP_CH4_SRC_PACK_NUMB                                                1
#define            SYSDMA_DMA_CSDP_CH4_SRC_PACK_RES_VAL                                             0x0
//R/W

#define            SYSDMA_DMA_CSDP_CH4_SRC_POS                                                      2
#define            SYSDMA_DMA_CSDP_CH4_SRC_NUMB                                                     4
#define            SYSDMA_DMA_CSDP_CH4_SRC_RES_VAL                                                  0x0000
//R/W

#define            SYSDMA_DMA_CSDP_CH4_DATA_TYPE_POS                                                0
#define            SYSDMA_DMA_CSDP_CH4_DATA_TYPE_NUMB                                               2
#define            SYSDMA_DMA_CSDP_CH4_DATA_TYPE_RES_VAL                                            0x00
//R/W


//SYSDMA_DMA_CSDP_CH5
//-------------------
#define            SYSDMA_DMA_CSDP_CH5                                                            REG16(SYSDMA_BASE_ADDR_ARM+SYSDMA_DMA_CSDP_CH5_OFFSET)


//R/W

#define            SYSDMA_DMA_CSDP_CH5_DST_BURST_EN_POS                                             14
#define            SYSDMA_DMA_CSDP_CH5_DST_BURST_EN_NUMB                                            2
#define            SYSDMA_DMA_CSDP_CH5_DST_BURST_EN_RES_VAL                                         0x00
//R/W

#define            SYSDMA_DMA_CSDP_CH5_DST_PACK_POS                                                 13
#define            SYSDMA_DMA_CSDP_CH5_DST_PACK_NUMB                                                1
#define            SYSDMA_DMA_CSDP_CH5_DST_PACK_RES_VAL                                             0x0
//R/W

#define            SYSDMA_DMA_CSDP_CH5_DST_POS                                                      9
#define            SYSDMA_DMA_CSDP_CH5_DST_NUMB                                                     4
#define            SYSDMA_DMA_CSDP_CH5_DST_RES_VAL                                                  0x0000
//R/W

#define            SYSDMA_DMA_CSDP_CH5_SRC_BURST_EN_POS                                             7
#define            SYSDMA_DMA_CSDP_CH5_SRC_BURST_EN_NUMB                                            2
#define            SYSDMA_DMA_CSDP_CH5_SRC_BURST_EN_RES_VAL                                         0x00
//R/W

#define            SYSDMA_DMA_CSDP_CH5_SRC_PACK_POS                                                 6
#define            SYSDMA_DMA_CSDP_CH5_SRC_PACK_NUMB                                                1
#define            SYSDMA_DMA_CSDP_CH5_SRC_PACK_RES_VAL                                             0x0
//R/W