📄 mailbox.h
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//===============================================================================
// TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
//
// Property of Texas Instruments
// For Unrestricted Internal Use Only
// Unauthorized reproduction and/or distribution is strictly prohibited.
// This product is protected under copyright law and trade secret law
// as an unpublished work.
// Created 2000, (C) Copyright 2000 Texas Instruments. All rights reserved.
//
// Description : Header file for the DSP to ARM Mailbox
//
// Project : OMAP3
//
// Author : Arnaud Balmelle (a-balmelle@ti.com)
//
//===============================================================================
#ifndef __MAILBOX_H__
#define __MAILBOX_H__
#define MB_ARM2DSP1_REG_OFFSET 0x00
#define MB_ARM2DSP1B_REG_OFFSET 0x04
#define MB_DSP2ARM1_REG_OFFSET 0x08
#define MB_DSP2ARM1B_REG_OFFSET 0x0C
#define MB_DSP2ARM2_REG_OFFSET 0x10
#define MB_DSP2ARM2B_REG_OFFSET 0x14
#define MB_ARM2DSP1_FLAG_REG_OFFSET 0x18
#define MB_DSP2ARM1_FLAG_REG_OFFSET 0x1C
#define MB_DSP2ARM2_FLAG_REG_OFFSET 0x20
#define MB_ARM2DSP2_REG_OFFSET 0x24
#define MB_ARM2DSP2B_REG_OFFSET 0x28
#define MB_ARM2DSP2_FLAG_REG_OFFSET 0x2C
#define MB_ARM2DSP1_REG_ADDR (MAILBOX_BASE_ADDR_ARM + MB_ARM2DSP1_REG_OFFSET)
#define MB_ARM2DSP1B_REG_ADDR (MAILBOX_BASE_ADDR_ARM + MB_ARM2DSP1B_REG_OFFSET)
#define MB_DSP2ARM1_REG_ADDR (MAILBOX_BASE_ADDR_ARM + MB_DSP2ARM1_REG_OFFSET)
#define MB_DSP2ARM1B_REG_ADDR (MAILBOX_BASE_ADDR_ARM + MB_DSP2ARM1B_REG_OFFSET)
#define MB_DSP2ARM2_REG_ADDR (MAILBOX_BASE_ADDR_ARM + MB_DSP2ARM2_REG_OFFSET)
#define MB_DSP2ARM2B_REG_ADDR (MAILBOX_BASE_ADDR_ARM + MB_DSP2ARM2B_REG_OFFSET)
#define MB_ARM2DSP1_FLAG_REG_ADDR (MAILBOX_BASE_ADDR_ARM + MB_ARM2DSP1_FLAG_REG_OFFSET)
#define MB_DSP2ARM1_FLAG_REG_ADDR (MAILBOX_BASE_ADDR_ARM + MB_DSP2ARM1_FLAG_REG_OFFSET)
#define MB_DSP2ARM2_FLAG_REG_ADDR (MAILBOX_BASE_ADDR_ARM + MB_DSP2ARM2_FLAG_REG_OFFSET)
#define MB_ARM2DSP2_REG_ADDR (MAILBOX_BASE_ADDR_ARM + MB_ARM2DSP2_REG_OFFSET)
#define MB_ARM2DSP2B_REG_ADDR (MAILBOX_BASE_ADDR_ARM + MB_ARM2DSP2B_REG_OFFSET)
#define MB_ARM2DSP2_FLAG_REG_ADDR (MAILBOX_BASE_ADDR_ARM + MB_ARM2DSP2_FLAG_REG_OFFSET)
#define MB_ARM2DSP1_REG REG16(MB_ARM2DSP1_REG_ADDR)
#define MB_ARM2DSP1B_REG REG16(MB_ARM2DSP1B_REG_ADDR)
#define MB_DSP2ARM1_REG REG16(MB_DSP2ARM1_REG_ADDR)
#define MB_DSP2ARM1B_REG REG16(MB_DSP2ARM1B_REG_ADDR)
#define MB_DSP2ARM2_REG REG16(MB_DSP2ARM2_REG_ADDR)
#define MB_DSP2ARM2B_REG REG16(MB_DSP2ARM2B_REG_ADDR)
#define MB_ARM2DSP1_FLAG_REG REG16(MB_ARM2DSP1_FLAG_REG_ADDR)
#define MB_DSP2ARM1_FLAG_REG REG16(MB_DSP2ARM1_FLAG_REG_ADDR)
#define MB_DSP2ARM2_FLAG_REG REG16(MB_DSP2ARM2_FLAG_REG_ADDR)
#define MB_ARM2DSP2_REG REG16(MB_ARM2DSP2_REG_ADDR)
#define MB_ARM2DSP2B_REG REG16(MB_ARM2DSP2B_REG_ADDR)
#define MB_ARM2DSP2_FLAG_REG REG16(MB_ARM2DSP2_FLAG_REG_ADDR)
#define MB_ARM2DSP1_RESET_VALUE 0x0000
#define MB_ARM2DSP1B_RESET_VALUE 0x0000
#define MB_DSP2ARM1_RESET_VALUE 0x0000
#define MB_DSP2ARM1B_RESET_VALUE 0x0000
#define MB_DSP2ARM2_RESET_VALUE 0x0000
#define MB_DSP2ARM2B_RESET_VALUE 0x0000
#define MB_ARM2DSP2_RESET_VALUE 0x0000
#define MB_ARM2DSP2B_RESET_VALUE 0x0000
#define MB_ARM2DSP_FLAG_MASK 0x0001
#define MB_DSP2ARM_FLAG_MASK 0x0001
typedef enum
{
ARM2DSP1 = 0,
DSP2ARM1 = 1,
DSP2ARM2 = 2,
ARM2DSP2 = 3
} Mailbox_Enum_t;
//---------------------------------------------------------------------
// NAME : MBOX_MailboxWrite
//
// DESCRIPTION : Write data to Mailbox registers :
// - ARM2DSP1 and ARM2DSP1B if ARM2DSP1_FLAG[0] == 0
// - ARM2DSP2 and ARM2DSP2B if ARM2DSP2_FLAG[0] == 0
//
// SYNOPSYS : BOOL MBOX_MailboxWrite(Mailbox_Enum_t, UWORD16, UWORD16)
//
// PARAMETERS : Mailbox ARM2DSP1 or ARM2DSP2
// Data1 data to first register
// Data2 data to second register
//
// RETURN VALUE: TRUE if write done successfully, otherwise FALSE
//
// LIMITATIONS : None
//
//---------------------------------------------------------------------
extern BOOL MBOX_MailboxWrite(Mailbox_Enum_t Mailbox, UWORD16 Data1, UWORD16 Data2);
//---------------------------------------------------------------------
// NAME : MBOX_MailboxRead
//
// DESCRIPTION : Read data from Mailbox registers :
// - ARM2DSP1 and ARM2DSP1B
// - ARM2DSP2 and ARM2DSP2B
// - DSP2ARM1 and DSP2ARM1B
// - DSP2ARM2 and DSP2ARM2B
//
// SYNOPSYS : void MBOX_MailboxRead(Mailbox_Enum_t, UWORD16 *, UWORD16 *)
//
// PARAMETERS : Mailbox ARM2DSP1, ARM2DSP2, DSP2ARM1 or DSP2ARM2
// *Ptr1 pointer on data from first register
// *Ptr2 pointer on data from second register
//
// RETURN VALUE: None
//
// LIMITATIONS : None
//
//---------------------------------------------------------------------
extern void MBOX_MailboxRead(Mailbox_Enum_t Mailbox, UWORD16 *Ptr1, UWORD16 *Ptr2);
extern UWORD16 MAILBOX_GetFlag(Mailbox_Enum_t Mailbox);
//---------------------------------------------------------------------
// NAME : MBOX_MailboxClear
//
// DESCRIPTION : Clear the interrupt send by the DSP :
// - DSP2ARM_INT1B
// - DSP2ARM_INT2B
//
// SYNOPSYS : BOOL Mailbox_Clear(Mailbox_Enum_t)
//
// PARAMETERS : Mailbox DSP2ARM1 or DSP2ARM2
//
// RETURN VALUE: None
//
// LIMITATIONS : None
//
//---------------------------------------------------------------------
void MBOX_MailboxClear(Mailbox_Enum_t Mailbox);
#endif /* __MAILBOX_H__ */
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