⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 configuration-generic.h.s

📁 OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器
💻 S
📖 第 1 页 / 共 2 页
字号:
;*******************************************************************************
;*
;* The confidential and proprietary information contained in this file may
;* only be used by a person authorised under and to the extent permitted
;* by a subsisting licensing agreement from ARM Limited.
;*
;*                 (C) COPYRIGHT 1994-1999 ARM Limited.
;*                       ALL RIGHTS RESERVED
;*
;* This entire notice must be reproduced on all copies of this file
;* and copies of this file may only be made by a person if such person is
;* permitted to do so under the terms of a subsisting license agreement
;* from ARM Limited.
;*
;*		Generic Configuration
;*		=====================
;*						
;*	Origin: ARM9 Validation Suite		
;*	Author: Jon Rijk 16/02/1999	
;*     $Author: pmarchay $
;*   $Revision: 1.25 $
;*       $Date: Wed Sep 12 15:02:34 2001 $
;*						
;*******************************************************************************
		
;--------------------------------------------------------------------------------
; Macro:	CONFIG_START
;
; Function:	Start each Configuration file with this macro
;--------------------------------------------------------------------------------

		MACRO
		CONFIG_START
		[	:LNOT::DEF: TARGET
		!	1, "Variable TARGET is not defined, please define."
		GBLS	TARGET
TARGET		SETS	"UNKNOWN"
		|
		[	"$TARGET" = ""
		!	1, "Variable TARGET is null, please specify."
		]
		]
		GBLL	KNOWN_TARGET
		MEND

;--------------------------------------------------------------------------------
; Macro:	CONFIG_END
;
; Function:	End each Configuration file with this macro
;--------------------------------------------------------------------------------

		MACRO
		CONFIG_END
		[	KNOWN_TARGET = {FALSE}
		!	1, "\n\n********** Target $TARGET was not recognised **********\n"
		GENERIC_CFG
		]
		MEND

;--------------------------------------------------------------------------------
; Macro:	GENERIC_CFG
;
; Function:	Defines the absolute minimum set of variables for all target
;		types such that test compilation should always be possible.
;		If a new variable is to be added it should be done so here,
;		unless it truely is specific to a particular ARM variant or
;		device; in which case one of the generic variables must be
;		conditionally checked before the non-generic one can be used.
;--------------------------------------------------------------------------------

			MACRO
			GENERIC_CFG
; Architecture
PROC			CONFIG_SETS	"$TARGET"	; must remove this sometime

DEVICE			CONFIG_SETS	"UNDEFINED"	; this will allow the assembler to
							; compile in the ARM9E world.
ARM_ARCH                CONFIG_SETA    	4
VARIANT			CONFIG_SETS	"UNDEFINED"
		
HARVARD                 CONFIG_SETL    	{TRUE}
SUPPORTS_ELSEGUNDO      CONFIG_SETL     {FALSE}
SUPPORTS_26BIT          CONFIG_SETL    	{FALSE}
SUPPORTS_THUMB          CONFIG_SETL    	{TRUE}
SUPPORTS_MIXED_ENDIAN   CONFIG_SETL     {FALSE}
SUPPORTS_SYSTEM_ERROR   CONFIG_SETL     {FALSE}
SUPPORTS_NON_STOP_DEBUG CONFIG_SETL     {FALSE}
COPROC_SUPPORT          CONFIG_SETL    	{TRUE}
SUPPORTS_MIXED_ENDIAN   CONFIG_SETL     {FALSE}
SUPPORTS_SYSTEM_ERROR   CONFIG_SETL     {FALSE}

HAS_CACHES		CONFIG_SETL	{FALSE}
HAS_MMU			CONFIG_SETL	{FALSE}
HAS_PU			CONFIG_SETL	{FALSE}
LOCKING_TLB             CONFIG_SETL     {FALSE}         ;MMU has a locking TLB separate from the main TLB
UNIFIED_TLB             CONFIG_SETL     {FALSE}	        ;TLBs are unified -- cannot flush I or D alone

COHERENT_ISTREAM        CONFIG_SETL    	{FALSE}
PC_FULL                 CONFIG_SETL    	{TRUE}
PC_BIT1SET              CONFIG_SETL    	{FALSE}
PC_OFFSET               CONFIG_SETA    	12
			
DEVICE_ID		CONFIG_SETA	0
ID_MASK			CONFIG_SETA	0xffffffff	; mask for removing revisions for DEVICE_ID


;------------------------------------------------------------
; debug support

;--------------------------------------------------
; Variable:	DEBUG_DBGRQ
;
; Function:	informs SCHEDULE_DBGRQ how to assert EDBGRQ
;
; Values:	UNDEFINED   - not available
;		TRICKBOX    - memory-mapped trickbox
;		CP_TRICKBOX - validation copro trickbox
;		ARM9TDMI    - ARM9TDMI specific
;--------------------------------------------------
		
DEBUG_DBGRQ		CONFIG_SETS	"UNDEFINED"
DEBUG_VERSION		CONFIG_SETS	"0"


AHB_WRAPPED		CONFIG_SETL	{FALSE}			
DEBUG_BST               CONFIG_SETL     {FALSE}

; Abort Handling
BASE_RESTORATION_SINGLE CONFIG_SETL    	{TRUE}
BASE_RESTORATION_MULTI  CONFIG_SETL    	{TRUE}
STM_WB_REG_IN_LIST	CONFIG_SETS	"Final Value"

; Coprocessor
CP_BUSY_WAIT            CONFIG_SETL    	{TRUE}
CP_RESET		CONFIG_SETL	{FALSE}

;------------------------------------------------------------
; Interrupt

;--------------------------------------------------
; Variable:	INTERRUPT_CONFIG
;
; Function:	informs SCHEDULE_<FIQ|IRQ> how to assert nFIQ, nIRQ
;
; Values:	COPROC        - validation copro trickbox
;		MEMORY_MAPPED - memory-mapped trickbox
;--------------------------------------------------
		
INTERRUPT_CONFIG        CONFIG_SETS    	"COPROC"
INTERRUPT_EXECUTE	CONFIG_SETL	{FALSE}		; interrupts recognised in execute
INTERRUPT_NUMNOPS	CONFIG_SETA	6		; number of NOPs to insert for ASSERT_{FIQ/IRQ}
INTERRUPT_XCYCLES	CONFIG_SETA	7		; number of extra cycles for IRQ in ASSERT_FIQ_AND_IRQ
			

; Execution environment
INITIALISE              CONFIG_SETL    	{TRUE}
ENVIRONMENT             CONFIG_SETS    	"HDL"
ANGEL			CONFIG_SETL    	{FALSE}
SEMIHOST		CONFIG_SETL    	{FALSE}
SWI_ACCELERATION        CONFIG_SETL	{FALSE}
STDOUT                  CONFIG_SETS    	"TUBE"
APCS			CONFIG_SETL	{FALSE}
FULL_MEMORY_MODEL       CONFIG_SETL    	{TRUE}
MEMORY_ENDIANNESS	CONFIG_SETS	"LITTLE"
ANGEL_SWI_ARM           CONFIG_SETA    	0x123456
ANGEL_SWI_THUMB         CONFIG_SETA    	0xab
ARMRIS_SWI_ARM          CONFIG_SETA     0xfedcb0
ARMRIS_SWI_THUMB        CONFIG_SETA     0xe0
HIGH_VECTORS		CONFIG_SETL	{FALSE}

LIBRARY                 CONFIG_SETS    	"DEMON"
SWI_SUPPORT             CONFIG_SETS    	"VALIDATION"
			
			; If an ETM test, initalise all the banked registers,
			; to prevent X's in the EIS.
			[	:DEF: PORT_SIZE
BANKED_REGS_INIT	CONFIG_SETL	{TRUE}
			]

; Memory mapped Peripherals
TOP_OF_MEMORY		CONFIG_SETA	0x100000	; for stack and heap declarations

; Define the TrickBox
			TRICKBOX_CFG	0x03000000
			
; Single Abort set to the reset value of the TB_SINGLEABORT register.
SingleAbort          	CONFIG_SETA     0x00600000
		
			
; Reference Peripherals
TimerBase		CONFIG_SETA	0x0A800000
IntCtrlBase		CONFIG_SETA	0x0A000000

; Hardware environment
PROG32                  CONFIG_SETL    	{TRUE}

; Constants
CR1_PREDICT_BIT         CONFIG_SETA    	1<<11
COUNT_ADJUST            CONFIG_SETA    	0xA

; for backwards compatibility only 
BASE_ORG                CONFIG_SETA    	0
SIMULATION_ENV          CONFIG_SETS    	"STD"

			
;--------------------------------------------------
; COPRO configurations

; TRUE if testbench coprocessors have configurable features
CONFIG_COPRO        	CONFIG_SETL	{TRUE}

; Non-processor-specific coprocessor numbers
CP_BUSYWAIT		CP      4			; The "busy-waiting" coprocessor
CP_TRICKBOX		CP      5			; The coprocessor version of the "trick box"
CP_PRIVILEGED		CP      6
CP_STANDARD		CP      7
CP_SYSTEM		CP      15			; The standard system coprocessor
C0			CN      0			; Standard Coprocessor reg no.
CR1_ENDIAN_BIT		CONFIG_SETA	1 << 7

; time CP_TRICKBOX busy waits for
CP_TRICKBOX_BW		CONFIG_SETA	0

; time CP_BUSYWAIT busy waits for
CP_BUSYWAIT_BW		CONFIG_SETA	1

;--------------------------------------------------

VECTGEN_OFF		CONFIG_SETA	0		; Switch vector generation
VECTGEN_ON		CONFIG_SETA	1

;--------------------------------------------------
			MEND

		
;--------------------------------------------------------------------------------
; Macro:	TRICKBOX_CFG [tb_base]
;
; Function:	Sets the Trickbox variables using the current TB_BASE value or the
;		optionally supplied one
;--------------------------------------------------------------------------------
				
			MACRO
			TRICKBOX_CFG	$base
			[	"$base" /= ""
TB_BASE			CONFIG_SETA	$base
			]
			
TB_TUBE			CONFIG_SETA	TB_BASE + 0
TB_DEMONSWI		CONFIG_SETA	TB_BASE + 0x100

TB_LOABORT		CONFIG_SETA	TB_BASE + 0x40
TB_HIABORT		CONFIG_SETA	TB_BASE + 0x44
TB_SWIACCEL		CONFIG_SETA	TB_BASE + 0x60
TB_SINGLEABORT		CONFIG_SETA	TB_BASE + 0x64


TB_AUTOENABLES		CONFIG_SETA	TB_BASE + 0x70
TB_EDBGRQ		CONFIG_SETA	TB_BASE + 0x48
TB_ETMOUTPUTS		CONFIG_SETA	TB_BASE + 0x80

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -