📄 system-macros.h.s
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MACRO
WAIT_FOR_INTERRUPT $reg
MCR p15,0,$reg,c7,c0,4
MEND
;------------------------------------------------------------------------------
; Macro: [label] FLUSH_DCACHE_LINE $line
;
; Function: Data Cache Single Line Flush utility.
; $line - register containing the Cache Line
;
; Internally: Uses r0 and r1.
;
MACRO
$label FLUSH_DCACHE_LINE $line
LOCAL
[ HAS_CACHES
$label B jump$l
store$l % 8 ; temporary storage for r0, r1
jump$l
STR r0, store$l ; save r0
STR r1, store$l+4 ; save r1
MOV r0, $line
MOV r1, #0
FLUSH_DCACHE_ENTRY r1, r0 ; segment 0
ADD r1, r1, #1
FLUSH_DCACHE_ENTRY r1, r0 ; segment 1
ADD r1, r1, #1
FLUSH_DCACHE_ENTRY r1, r0 ; segment 2
ADD r1, r1, #1
FLUSH_DCACHE_ENTRY r1, r0 ; segment 3
LDR r0, store$l ; restore r0
LDR r1, store$l+4 ; restore r1
|
! 0, "Inappropriate use of FLUSH_DCACHE_LINE"
]
LOCAL_END
MEND
;------------------------------------------------------------------------------
; Macro: [label] FLUSH_ICACHE_LINE $line
;
; Function: Data Cache Single Line Flush utility.
; $line - register containing the Cache Line
;
; Internally: Uses r0 and r1.
;
MACRO
$label FLUSH_ICACHE_LINE $line
LOCAL
[ HAS_CACHES
$label B jump$l
store$l % 8 ; temporary storage for r0, r1
jump$l
STR r0, store$l ; save r0
STR r1, store$l+4 ; save r1
MOV r0, $line
MOV r1, #0
FLUSH_ICACHE_ENTRY r1, r0 ; segment 0
ADD r1, r1, #1
FLUSH_ICACHE_ENTRY r1, r0 ; segment 1
ADD r1, r1, #1
FLUSH_ICACHE_ENTRY r1, r0 ; segment 2
ADD r1, r1, #1
FLUSH_ICACHE_ENTRY r1, r0 ; segment 3
LDR r0, store$l ; restore r0
LDR r1, store$l+4 ; restore r1
|
! 0, "Inappropriate use of FLUSH_ICACHE_LINE"
]
LOCAL_END
MEND
;------------------------------------------------------------------------------
; Macro: [label] CLEAN_CACHE_ENTRY $register
;
; Function: ID unified Cache Single Entry Clean utility. Dirty data written back
; to memory. For HARVARD architectures the Data Cache is cleaned.
; $register - must contain the entry address in the format
; (31-26) - index, (25-8) - SBZ, (7-4) - segment, (3-0) SBZ
;
; Internally:
;
MACRO
CLEAN_CACHE_ENTRY $register
[ HAS_CACHES
[ HARVARD
MCR p15, 0, $register, c7, c10, 1 ; Clean Data Cache Entry
|
MCR p15, 0, $register, c7, c11, 1 ; Clean Unified Cache Entry
]
|
! 0, "Inappropriate use of CLEAN_CACHE_ENTRY"
]
MEND
;------------------------------------------------------------------------------
; Macro: [label] CLEAN_DCACHE_ENTRY $seg, $line
;
; Function: Data Cache Single Entry Clean utility. Dirty data written back
; to memory.
; $seg - Cache Segment
; $line - Cache Line
;
; Internally: r0 is used internally and restored afterwards.
;
; Superseded: see CLEAN_DCACHE_INDEX.
;
MACRO
$label CLEAN_DCACHE_ENTRY $seg, $line
LOCAL
[ HAS_CACHES
$label B jump$l
store$l % 8 ; temporary storage for R0
jump$l STR r0, store$l ; save r0
STR r1, store$l+4 ; save r1
[ "$seg" ="R0" :LOR: "$seg" ="r0"
! 1,"\nSegment number cannot be specified in R0 for CLEAN_DCACHE_ENTRY "
]
MOV r0, $line, LSL #26
ORR r0, r0, $seg, LSL #4
MCR p15, 0, r0, c7, c10, 1
LDR r0, store$l ; restore r0
LDR r1, store$l+4 ; restore r1
|
! 0, "Inappropriate use of CLEAN_DCACHE_ENTRY"
]
LOCAL_END
MEND
;------------------------------------------------------------------------------
;
; Macro: $label CLEAN_DCACHE_INDEX $seg, $line
;
; Function: Cleans DCache line specified by line R$line and
; segment R$seg. R$seg may not be R0.
;
; Internally: All registers preserved.
;
MACRO
$label CLEAN_DCACHE_INDEX $seg, $line
$label LOCAL
[ HAS_CACHES
PRESERVE 0, 0
[ "$seg" ="R0" :LOR: "$seg" ="r0"
! 1,"\nSegment number cannot be specified in R0 for CLEAN_DCACHE_INDEX!"
]
[ SEGMENT_ASSOCIATIVE
MOV r0, $line, LSL #CACHE_NUM_COLUMN_BITS ; Index in bn upwards
ORR r0, r0, $seg, LSL #30 ; segment in b30-b31
|
MOV r0, $line, LSL #26 ; Index in b26-b31
ORR r0, r0, $seg, LSL #CACHE_NUM_COLUMN_BITS ; Segment in bn upwards
]
MCR p15, 0, r0, c7, c10, INV_IND_OP2 ; C7C10 = clean DCache, OP2 = using index
[ TARGET /= "ARM1020T" :LAND: TARGET /= "ARM946ES"
;The following breaks tests for arm1020T since it will screw up
;the victim ptr. (We want it at 63, this moves it back to 62!)
; Note the following 2 operations are required because of the way 920T operates wrt index
; clean. If only the first word of the locked line is cleaned, then the victim will not
; be restored and thus is left pointing to a locked line, hence locked data is overwritten.
; Thus we need to read and then set the index base to restore the value of the victim counter.
;
READ_DCACHE_LOCKDOWN_BASE r0
SET_DCACHE_LOCKDOWN r0
]
RESTORE 0, 0
|
! 0, "Inappropriate use of CLEAN_DCACHE_INDEX"
]
LOCAL_END
MEND
;------------------------------------------------------------------------------
;
; Macro: $label CLEAN_DCACHE_VA $va
;
; Function: Cleans DCache line specified by VA R$va.
;
; Internally: All registers preserved.
;
MACRO
$label CLEAN_DCACHE_VA $va
$label LOCAL
[ HAS_CACHES
PRESERVE 0, 0
MOV r0, $va, LSR #CACHE_NUM_COLUMN_BITS ; LSB SBZ
MOV r0, r0, LSL #CACHE_NUM_COLUMN_BITS
MCR p15, 0, r0, c7, c10, INV_VA_OP2 ; C7C10 = clean DCache, OP2 = using VA
RESTORE 0, 0
|
! 0, "Inappropriate use of CLEAN_DCACHE_VA"
]
LOCAL_END
MEND
;------------------------------------------------------------------------------
; Macro: [label] CLEAN_DCACHE_LINE $line
;
; Function: Data Cache Single Line Clean utility.
; $line - Cache Line
;
; Internally: Cleans an entire Data Cache Line accross all 4 segments.
;
MACRO
$label CLEAN_DCACHE_LINE $line
LOCAL
[ HAS_CACHES
$label B jump$l
store$l % 8 ; temporary storage for r0, r1
jump$l
STR r0, store$l ; save r0
STR r1, store$l+4 ; save r1
MOV r0, $line
MOV r1, #0
CLEAN_DCACHE_ENTRY r1, r0 ; segment 0
ADD r1, r1, #1
CLEAN_DCACHE_ENTRY r1, r0 ; segment 1
ADD r1, r1, #1
CLEAN_DCACHE_ENTRY r1, r0 ; segment 2
ADD r1, r1, #1
CLEAN_DCACHE_ENTRY r1, r0 ; segment 3
LDR r0, store$l ; restore r0
LDR r1, store$l+4 ; restore r1
|
! 0, "Inappropriate use of CLEAN_DCACHE_LINE"
]
LOCAL_END
MEND
;------------------------------------------------------------------------------
; Macro: [label] CLEAN_FLUSH_CACHE_ENTRY $register
;
; Function: ID unified Cache Single Entry Clean and Flush utility. Dirty data
; written back to memory. For HARVARD architectures the Data Cache
; is cleaned.
; $register - must contain the entry address in the format
; (31-26) - index, (25-8) - SBZ, (7-4) - segment, (3-0) SBZ
;
; Internally:
;
MACRO
CLEAN_FLUSH_CACHE_ENTRY $register
[ HAS_CACHES
[ HARVARD
MCR p15, 0, $register, c7, c14, 1 ; C & F Data Cache Entry
|
MCR p15, 0, $register, c7, c15, 1 ; C & F Unified Cache Entry
]
|
! 0, "Inappropriate use of CLEAN_FLUSH_CACHE_ENTRY"
]
MEND
;------------------------------------------------------------------------------
; Macro: [label] CLEAN_FLUSH_DCACHE_ENTRY $seg, $line
;
; Function: Data Cache Single Entry Clean and flush utility. Dirty data is
; written back to memory and the cache entry is then invalidated.
;
; $seg - Cache Segment
; $line - Cache Line
;
; Internally: r0 is used internally and restored afterwards.
;
; Superseded: see CLEAN_AND_INVALIDATE_DCACHE_INDEX.
;
MACRO
$label CLEAN_FLUSH_DCACHE_ENTRY $seg, $line
LOCAL
[ HAS_CACHES
$label B jump$l
store$l % 8 ; temporary storage for R0
jump$l STR r0, store$l ; save r0
STR r1, store$l+4 ; save r1
[ "$seg" ="R0" :LOR: "$seg" ="r0"
! 1,"\nSegment number cannot be specified in R0 for CLEAN_FLUSH_DCACHE_ENTRY "
]
MOV r0, $line, LSL #26
ORR r0, r0, $seg, LSL #4
MCR p15, 0, r0, c7, c14, 1
LDR r0, store$l ; restore r0
LDR r1, store$l+4 ; restore r1
|
! 0, "Inappropriate use of CLEAN_FLUSH_DCACHE_ENTRY"
]
LOCAL_END
MEND
;------------------------------------------------------------------------------
;
; Macro: $label CLEAN_AND_INVALIDATE_DCACHE_INDEX $seg, $line
;
; Function: Cleans and invalidates DCache line specified by line R$line and
; segment R$seg. R$seg may not be R0.
;
; Internally: All registers preserved.
;
MACRO
$label CLEAN_AND_INVALIDATE_DCACHE_INDEX $seg, $line
$label LOCAL
[ HAS_CACHES
PRESERVE 0, 0
[ "$seg" ="R0" :LOR: "$seg" ="r0"
! 1,"\nSegment number cannot be specified in R0 for CLEAN_AND_INVALIDATE_DCACHE_INDEX!"
]
[ SEGMENT_ASSOCIATIVE
MOV r0, $line, LSL #CACHE_NUM_COLUMN_BITS ; Index in bn upwards
ORR r0, r0, $seg, LSL #30 ; segment in b30-b31
|
MOV r0, $line, LSL #26 ; Index in b26-b31
ORR r0, r0, $seg, LSL #CACHE_NUM_COLUMN_BITS ; Segment in bn upwards
]
MCR p15, 0, r0, c7, c14, INV_IND_OP2 ; C7C14 = clean and inval DCache, OP2 = using index
RESTORE 0, 0
|
! 0, "Inappropriate use of CLEAN_AND_INVALIDATE_DCACHE_INDEX"
]
LOCAL_END
MEND
;------------------------------------------------------------------------------
;
; Macro: $label CLEAN_AND_INVALIDATE_DCACHE_VA $va
;
; Function: Cleans and invalidates DCache line specified by VA R$va.
;
; Internally: All registers preserved.
;
MACRO
$label CLEAN_AND_INVALIDATE_DCACHE_VA $va
$label LOCAL
[ HAS_CACHES
PRESERVE 0, 0
MOV r0, $va, LSR #CACHE_NUM_COLUMN_BITS ; LSB SBZ
MOV r0, r0, LSL #CACHE_NUM_COLUMN_BITS
MCR p15, 0, r0, c7, c14, INV_VA_OP2 ; C7C14 = clean and inval DCache, OP2 = using VA
RESTORE 0, 0
|
! 0, "Inappropriate use of CLEAN_AND_INVALIDATE_DCACHE_VA"
]
LOCAL_END
MEND
;-------------------------------------------------------------------------------
; Macro: <label> CLEAN_INVALIDATE_DCACHE_MVA <$reg>
;
; Function: Macro to Clean and Invalidate the DCache for the specified
; Virtual Address.
;
; Operation: This macro first checks the type of the Cache in the
; System by reading the CP15 Register 0. If it is Unified,
; Clean & Invalidate the Unified Cache by writing CP15 Reg 7.
; If it is Separate Cache, Clean & Invalidate the DCache.
; In both cases, it is done for the specified Virtual Address.
;
; Assumptions:
;
; Registers Used:
; R0 - Used at various stages to hold temporary values
; R1 - Used at various stages to hold temporary values
;
;-------------------------------------------------------------------------------
MACRO
CLEAN_INVALIDATE_DCACHE_MVA $reg
LOCAL
MRC p15,0,R0,c0,c0,1 ; Read Cache Type Reg
LDR R1, =0xFFF
AND R1, R0, R1
AND R1, R0, #0x01000000 ; Get the S bit
MOV R1, R1, LSR #24
TEQ R1, #1
BEQ Sep_Cache$l
MCR p15,0,$reg,c7,c15,1 ; Unified Cache
B end$l
Sep_Cache$l MCR p15,0,$reg,c7,c14,1
end$l
LOCAL_END
MEND
;------------------------------------------------------------------------------
; Macro: [label] CLEAN_FLUSH_DCACHE_LINE $line
;
; Function: Data Cache Single Line Clean and flush utility.
; $line - Cache Line
;
; Internally: Cleans and flushes an entire Data Cache Line accross all 4 segments.
;
MACRO
$label CLEAN_FLUSH_DCACHE_LINE $line
LOCAL
[ HAS_CACHES
$label B jump$l
store$l % 8 ; temporary storage for r0, r1
jump$l
STR r0, store$l ; save r0
STR r1, store$l+4 ; save r1
MOV r0, $line
MOV r1, #0
CLEAN_FLUSH_DCACHE_ENTRY r1, r0 ; segment 0
ADD r1, r1, #1
CLEAN_FLUSH_DCACHE_ENTRY r1, r0 ; segment 1
ADD r1, r1, #1
CLEAN_FLUSH_DCACHE_ENTRY r1, r0 ; segment 2
ADD r1, r1, #1
CLEAN_FLUSH_DCACHE_ENTRY r1, r0 ; segment 3
LDR r0, store$l ; restore r0
LDR r1, store$l+4 ; restore r1
|
! 0, "Inappropriate use of CLEAN_FLUSH_DCACHE_LINE"
]
LOCAL_END
MEND
;------------------------------------------------------------------------------
; Macro: [label] CLEAN_FLUSH_CACHE $register, $assoc
;
; Function: write back all of the cache and invalidate all entries
; register value should not be R0 or R1.
;
;
; Internally:
;
MACRO
$label CLEAN_FLUSH_CACHE $register, $assoc
[ HAS_CACHES
[ ARM_ARCH < 4
MCR p15,0,$register,c7,c0,0
|
LOCAL
[ PROC = "StrongARM" :LOR: PROC = "SARMsd"
$label B jump$l
store$l % 12
jump$l STR r0,store$l
STR r1,store$l+4
STR r2,store$l+8
LDR r0,=Clean_Flush_Cache_Space
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