📄 configuration.h
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#define CONFIGURATION_FUNC_MUX_ARM_DMA_F_CONF_ARM_DMA_REQ_26_POS 0
#define CONFIGURATION_FUNC_MUX_ARM_DMA_F_CONF_ARM_DMA_REQ_26_NUMB 6
#define CONFIGURATION_FUNC_MUX_ARM_DMA_F_CONF_ARM_DMA_REQ_26_RES_VAL 0x19
//R/W
//CONFIGURATION_FUNC_MUX_ARM_DMA_G
//-------------------
#define CONFIGURATION_FUNC_MUX_ARM_DMA_G REG32(CONFIGURATION_BASE_ADDR_ARM+CONFIGURATION_FUNC_MUX_ARM_DMA_G_OFFSET)
//#define CONFIGURATION_FUNC_MUX_ARM_DMA_G_RESERVED_POS 6
//#define CONFIGURATION_FUNC_MUX_ARM_DMA_G_RESERVED_NUMB 26
//#define CONFIGURATION_FUNC_MUX_ARM_DMA_G_RESERVED_RES_VAL 0x0
//R
#define CONFIGURATION_FUNC_MUX_ARM_DMA_G_CONF_ARM_DMA_REQ_32_POS 6
#define CONFIGURATION_FUNC_MUX_ARM_DMA_G_CONF_ARM_DMA_REQ_32_NUMB 6
#define CONFIGURATION_FUNC_MUX_ARM_DMA_G_CONF_ARM_DMA_REQ_32_RES_VAL 0x1F
//R/W
#define CONFIGURATION_FUNC_MUX_ARM_DMA_G_CONF_ARM_DMA_REQ_31_POS 0
#define CONFIGURATION_FUNC_MUX_ARM_DMA_G_CONF_ARM_DMA_REQ_31_NUMB 6
#define CONFIGURATION_FUNC_MUX_ARM_DMA_G_CONF_ARM_DMA_REQ_31_RES_VAL 0x1E
//R/W
//CONFIGURATION_MOD_CONF_CTRL_1
//-------------------
#define CONFIGURATION_MOD_CONF_CTRL_1 REG32(CONFIGURATION_BASE_ADDR_ARM+CONFIGURATION_MOD_CONF_CTRL_1_OFFSET)
//#define CONFIGURATION_MOD_CONF_CTRL_1_RESERVED_POS 31
//#define CONFIGURATION_MOD_CONF_CTRL_1_RESERVED_NUMB 1
//#define CONFIGURATION_MOD_CONF_CTRL_1_RESERVED_RES_VAL 0x0
//R
#define CONFIGURATION_MOD_CONF_CTRL_1_CONF_PMT_DCB_SELECT_POS 29
#define CONFIGURATION_MOD_CONF_CTRL_1_CONF_PMT_DCB_SELECT_NUMB 2
#define CONFIGURATION_MOD_CONF_CTRL_1_CONF_PMT_DCB_SELECT_RES_VAL 0x0
//R/W
//#define CONFIGURATION_MOD_CONF_CTRL_1_RESERVED_POS 26
//#define CONFIGURATION_MOD_CONF_CTRL_1_RESERVED_NUMB 3
//#define CONFIGURATION_MOD_CONF_CTRL_1_RESERVED_RES_VAL 0x0
//R
#define CONFIGURATION_MOD_CONF_CTRL_1_OCP_INTERCONNECT_GATE_EN_R_POS 25
#define CONFIGURATION_MOD_CONF_CTRL_1_OCP_INTERCONNECT_GATE_EN_R_NUMB 1
#define CONFIGURATION_MOD_CONF_CTRL_1_OCP_INTERCONNECT_GATE_EN_R_RES_VAL 0x1
//R/W
#define CONFIGURATION_MOD_CONF_CTRL_1_CONF_MMC2_CLKFB_SEL_R_POS 24
#define CONFIGURATION_MOD_CONF_CTRL_1_CONF_MMC2_CLKFB_SEL_R_NUMB 1
#define CONFIGURATION_MOD_CONF_CTRL_1_CONF_MMC2_CLKFB_SEL_R_RES_VAL 0x0
//R/W
//#define CONFIGURATION_MOD_CONF_CTRL_1_RESERVED_POS 22
//#define CONFIGURATION_MOD_CONF_CTRL_1_RESERVED_NUMB 2
//#define CONFIGURATION_MOD_CONF_CTRL_1_RESERVED_RES_VAL 0x0
//R
#define CONFIGURATION_MOD_CONF_CTRL_1_CONF_MCBSP2_CLK_DIS_R_POS 21
#define CONFIGURATION_MOD_CONF_CTRL_1_CONF_MCBSP2_CLK_DIS_R_NUMB 1
#define CONFIGURATION_MOD_CONF_CTRL_1_CONF_MCBSP2_CLK_DIS_R_RES_VAL 0x0
//R/W
#define CONFIGURATION_MOD_CONF_CTRL_1_CONF_MCBSP1_CLK_DIS_R_POS 20
#define CONFIGURATION_MOD_CONF_CTRL_1_CONF_MCBSP1_CLK_DIS_R_NUMB 1
#define CONFIGURATION_MOD_CONF_CTRL_1_CONF_MCBSP1_CLK_DIS_R_RES_VAL 0x0
//R/W
//#define CONFIGURATION_MOD_CONF_CTRL_1_RESERVED_POS 4
//#define CONFIGURATION_MOD_CONF_CTRL_1_RESERVED_NUMB 16
//#define CONFIGURATION_MOD_CONF_CTRL_1_RESERVED_RES_VAL 0x0
//R
#define CONFIGURATION_MOD_CONF_CTRL_1_CONF_MOD_GPTIMER2_CLK_SEL_R_POS 2
#define CONFIGURATION_MOD_CONF_CTRL_1_CONF_MOD_GPTIMER2_CLK_SEL_R_NUMB 2
#define CONFIGURATION_MOD_CONF_CTRL_1_CONF_MOD_GPTIMER2_CLK_SEL_R_RES_VAL 0x0
//R/W
#define CONFIGURATION_MOD_CONF_CTRL_1_CONF_MOD_GPTIMER1_CLK_SEL_R_POS 0
#define CONFIGURATION_MOD_CONF_CTRL_1_CONF_MOD_GPTIMER1_CLK_SEL_R_NUMB 2
#define CONFIGURATION_MOD_CONF_CTRL_1_CONF_MOD_GPTIMER1_CLK_SEL_R_RES_VAL 0x0
//R/W
//CONFIGURATION_CONF_STATUS
//-------------------
#define CONFIGURATION_CONF_STATUS REG32(CONFIGURATION_BASE_ADDR_ARM+CONFIGURATION_CONF_STATUS_OFFSET)
//#define CONFIGURATION_CONF_STATUS_RESERVED_POS 11
//#define CONFIGURATION_CONF_STATUS_RESERVED_NUMB 21
//#define CONFIGURATION_CONF_STATUS_RESERVED_RES_VAL 0x0
//R
#define CONFIGURATION_CONF_STATUS_FLASH_IF_POS 10
#define CONFIGURATION_CONF_STATUS_FLASH_IF_NUMB 1
#define CONFIGURATION_CONF_STATUS_FLASH_IF_RES_VAL 0x0
//R/W
#define CONFIGURATION_CONF_STATUS_CONF_DEVICE_TYPE_R_POS 8
#define CONFIGURATION_CONF_STATUS_CONF_DEVICE_TYPE_R_NUMB 2
#define CONFIGURATION_CONF_STATUS_CONF_DEVICE_TYPE_R_RES_VAL 0x0
//R
#define CONFIGURATION_CONF_STATUS_FLASH_SDRAM_BOOT_POS 7
#define CONFIGURATION_CONF_STATUS_FLASH_SDRAM_BOOT_NUMB 1
#define CONFIGURATION_CONF_STATUS_FLASH_SDRAM_BOOT_RES_VAL 0x0
//R/W
#define CONFIGURATION_CONF_STATUS_SYSBOOT_FUSE_SEL_POS 6
#define CONFIGURATION_CONF_STATUS_SYSBOOT_FUSE_SEL_NUMB 1
#define CONFIGURATION_CONF_STATUS_SYSBOOT_FUSE_SEL_RES_VAL 0x0
//R
#define CONFIGURATION_CONF_STATUS_FLASH_BOOT_CONF_POS 1
#define CONFIGURATION_CONF_STATUS_FLASH_BOOT_CONF_NUMB 5
#define CONFIGURATION_CONF_STATUS_FLASH_BOOT_CONF_RES_VAL 0x0
//R
#define CONFIGURATION_CONF_STATUS_FLASHING_BYPASS_POS 0
#define CONFIGURATION_CONF_STATUS_FLASHING_BYPASS_NUMB 1
#define CONFIGURATION_CONF_STATUS_FLASHING_BYPASS_RES_VAL 0x0
//R
//CONFIGURATION_RESET_CONTROL
//-------------------
#define CONFIGURATION_RESET_CONTROL REG32(CONFIGURATION_BASE_ADDR_ARM+CONFIGURATION_RESET_CONTROL_OFFSET)
//#define CONFIGURATION_RESET_CONTROL_RESERVED_POS 7
//#define CONFIGURATION_RESET_CONTROL_RESERVED_NUMB 25
//#define CONFIGURATION_RESET_CONTROL_RESERVED_RES_VAL 0X0
//R
#define CONFIGURATION_RESET_CONTROL_CONF_RNG_IDLE_MODE_POS 6
#define CONFIGURATION_RESET_CONTROL_CONF_RNG_IDLE_MODE_NUMB 1
#define CONFIGURATION_RESET_CONTROL_CONF_RNG_IDLE_MODE_RES_VAL 0x1
//R/W
//#define CONFIGURATION_RESET_CONTROL_RESERVED_POS 5
//#define CONFIGURATION_RESET_CONTROL_RESERVED_NUMB 1
//#define CONFIGURATION_RESET_CONTROL_RESERVED_RES_VAL 0x0
//R/W
#define CONFIGURATION_RESET_CONTROL_CONF_UWIRE_RESET_R_POS 4
#define CONFIGURATION_RESET_CONTROL_CONF_UWIRE_RESET_R_NUMB 1
#define CONFIGURATION_RESET_CONTROL_CONF_UWIRE_RESET_R_RES_VAL 0x1
//R/W
#define CONFIGURATION_RESET_CONTROL_CONF_OSTIMER_RESET_R_POS 3
#define CONFIGURATION_RESET_CONTROL_CONF_OSTIMER_RESET_R_NUMB 1
#define CONFIGURATION_RESET_CONTROL_CONF_OSTIMER_RESET_R_RES_VAL 0x1
//R/W
//#define CONFIGURATION_RESET_CONTROL_RESERVED_POS 1
//#define CONFIGURATION_RESET_CONTROL_RESERVED_NUMB 2
//#define CONFIGURATION_RESET_CONTROL_RESERVED_RES_VAL 0X0
//R
#define CONFIGURATION_RESET_CONTROL_CONF_OCP_RESET_R_POS 0
#define CONFIGURATION_RESET_CONTROL_CONF_OCP_RESET_R_NUMB 1
#define CONFIGURATION_RESET_CONTROL_CONF_OCP_RESET_R_RES_VAL 0x1
//R/W
//CONFIGURATION_CONF_OCPI_CTRL
//-------------------
#define CONFIGURATION_CONF_OCPI_CTRL REG32(CONFIGURATION_BASE_ADDR_ARM+CONFIGURATION_CONF_OCPI_CTRL_OFFSET)
//#define CONFIGURATION_CONF_OCPI_CTRL_RESERVED_POS 5
//#define CONFIGURATION_CONF_OCPI_CTRL_RESERVED_NUMB 27
//#define CONFIGURATION_CONF_OCPI_CTRL_RESERVED_RES_VAL 0x0
//R
#define CONFIGURATION_CONF_OCPI_CTRL_EN_BUFFER_USB_POS 4
#define CONFIGURATION_CONF_OCPI_CTRL_EN_BUFFER_USB_NUMB 1
#define CONFIGURATION_CONF_OCPI_CTRL_EN_BUFFER_USB_RES_VAL 0x0
//R/W
//#define CONFIGURATION_CONF_OCPI_CTRL_RESERVED_POS 0
//#define CONFIGURATION_CONF_OCPI_CTRL_RESERVED_NUMB 4
//#define CONFIGURATION_CONF_OCPI_CTRL_RESERVED_RES_VAL 0x0
//R
//CONFIGURATION_FUNC1_ARMPERGATE_CLK
//-------------------
#define CONFIGURATION_FUNC1_ARMPERGATE_CLK REG32(CONFIGURATION_BASE_ADDR_ARM+CONFIGURATION_FUNC1_ARMPERGATE_CLK_OFFSET)
//#define CONFIGURATION_FUNC1_ARMPERGATE_CLK_RESERVED_POS 30
//#define CONFIGURATION_FUNC1_ARMPERGATE_CLK_RESERVED_NUMB 2
//#define CONFIGURATION_FUNC1_ARMPERGATE_CLK_RESERVED_RES_VAL 0x0
//R
#define CONFIGURATION_FUNC1_ARMPERGATE_CLK_UART_CONF2_POS 28
#define CONFIGURATION_FUNC1_ARMPERGATE_CLK_UART_CONF2_NUMB 2
#define CONFIGURATION_FUNC1_ARMPERGATE_CLK_UART_CONF2_RES_VAL 0x0
//R/W
#define CONFIGURATION_FUNC1_ARMPERGATE_CLK_UART_CONF1_POS 26
#define CONFIGURATION_FUNC1_ARMPERGATE_CLK_UART_CONF1_NUMB 2
#define CONFIGURATION_FUNC1_ARMPERGATE_CLK_UART_CONF1_RES_VAL 0x0
//R/W
#define CONFIGURATION_FUNC1_ARMPERGATE_CLK_UART_CONF0_POS 24
#define CONFIGURATION_FUNC1_ARMPERGATE_CLK_UART_CONF0_NUMB 2
#define CONFIGURATION_FUNC1_ARMPERGATE_CLK_UART_CONF0_RES_VAL 0x0
//R/W
//#define CONFIGURATION_FUNC1_ARMPERGATE_CLK_RESERVED_POS 22
//#define CONFIGURATION_FUNC1_ARMPERGATE_CLK_RESERVED_NUMB 2
//#define CONFIGURATION_FUNC1_ARMPERGATE_CLK_RESERVED_RES_VAL 0x0
//R/W
#define CONFIGURATION_FUNC1_ARMPERGATE_CLK_GPIO_CONF2_POS 20
#define CONFIGURATION_FUNC1_ARMPERGATE_CLK_GPIO_CONF2_NUMB 2
#define CONFIGURATION_FUNC1_ARMPERGATE_CLK_GPIO_CONF2_RES_VAL 0x0
//R/W
#define CONFIGURATION_FUNC1_ARMPERGATE_CLK_GPIO_CONF1_POS 18
#define CONFIGURATION_FUNC1_ARMPERGATE_CLK_GPIO_CONF1_NUMB 2
#define CONFIGURATION_FUNC1_ARMPERGATE_CLK_GPIO_CONF1_RES_VAL 0x0
//R/W
#define CONFIGURATION_FUNC1_A⌨️ 快捷键说明
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