📄 configuration.h
字号:
//-------------------
#define CONFIGURATION_SEC_TEST_CTRL REG32(CONFIGURATION_BASE_ADDR_ARM+CONFIGURATION_SEC_TEST_CTRL_OFFSET)
//#define CONFIGURATION_SEC_TEST_CTRL_RESERVED_POS 4
//#define CONFIGURATION_SEC_TEST_CTRL_RESERVED_NUMB 28
//#define CONFIGURATION_SEC_TEST_CTRL_RESERVED_RES_VAL 0x0
//R
#define CONFIGURATION_SEC_TEST_CTRL_OBSERVABILITY_DISABLE_POS 3
#define CONFIGURATION_SEC_TEST_CTRL_OBSERVABILITY_DISABLE_NUMB 1
#define CONFIGURATION_SEC_TEST_CTRL_OBSERVABILITY_DISABLE_RES_VAL 0x1
//R/W
#define CONFIGURATION_SEC_TEST_CTRL_DMLED_SYSTEM_EN_POS 2
#define CONFIGURATION_SEC_TEST_CTRL_DMLED_SYSTEM_EN_NUMB 1
#define CONFIGURATION_SEC_TEST_CTRL_DMLED_SYSTEM_EN_RES_VAL 0x0
//R/W
#define CONFIGURATION_SEC_TEST_CTRL_BCM_WR_DISABLE_POS 1
#define CONFIGURATION_SEC_TEST_CTRL_BCM_WR_DISABLE_NUMB 1
#define CONFIGURATION_SEC_TEST_CTRL_BCM_WR_DISABLE_RES_VAL 0x1
//R/W
#define CONFIGURATION_SEC_TEST_CTRL_SEC_TEST_WR_DISABLE_POS 0
#define CONFIGURATION_SEC_TEST_CTRL_SEC_TEST_WR_DISABLE_NUMB 1
#define CONFIGURATION_SEC_TEST_CTRL_SEC_TEST_WR_DISABLE_RES_VAL 0x0
//R/W
//CONFIGURATION_SEC_TAP_CTRL
//-------------------
#define CONFIGURATION_SEC_TAP_CTRL REG32(CONFIGURATION_BASE_ADDR_ARM+CONFIGURATION_SEC_TAP_CTRL_OFFSET)
//#define CONFIGURATION_SEC_TAP_CTRL_RESERVED_POS 5
//#define CONFIGURATION_SEC_TAP_CTRL_RESERVED_NUMB 27
//#define CONFIGURATION_SEC_TAP_CTRL_RESERVED_RES_VAL 0x0
//R
#define CONFIGURATION_SEC_TAP_CTRL_EFUSE_TAP_ENABLE_POS 4
#define CONFIGURATION_SEC_TAP_CTRL_EFUSE_TAP_ENABLE_NUMB 1
#define CONFIGURATION_SEC_TAP_CTRL_EFUSE_TAP_ENABLE_RES_VAL 0x1
//R/W
#define CONFIGURATION_SEC_TAP_CTRL_CHIPLEVEL_TAP_ENABLE_POS 3
#define CONFIGURATION_SEC_TAP_CTRL_CHIPLEVEL_TAP_ENABLE_NUMB 1
#define CONFIGURATION_SEC_TAP_CTRL_CHIPLEVEL_TAP_ENABLE_RES_VAL 0x1
//R/W
#define CONFIGURATION_SEC_TAP_CTRL_DSP_TAP_ENABLE_POS 2
#define CONFIGURATION_SEC_TAP_CTRL_DSP_TAP_ENABLE_NUMB 1
#define CONFIGURATION_SEC_TAP_CTRL_DSP_TAP_ENABLE_RES_VAL 0x1
//R/W
#define CONFIGURATION_SEC_TAP_CTRL_MPU_TAP_ENABLE_POS 1
#define CONFIGURATION_SEC_TAP_CTRL_MPU_TAP_ENABLE_NUMB 1
#define CONFIGURATION_SEC_TAP_CTRL_MPU_TAP_ENABLE_RES_VAL 0x0
//R/W
#define CONFIGURATION_SEC_TAP_CTRL_SEC_TAP_WR_DISABLE_POS 0
#define CONFIGURATION_SEC_TAP_CTRL_SEC_TAP_WR_DISABLE_NUMB 1
#define CONFIGURATION_SEC_TAP_CTRL_SEC_TAP_WR_DISABLE_RES_VAL 0x0
//R/W
//CONFIGURATION_SEC_EMU_CTRL
//-------------------
#define CONFIGURATION_SEC_EMU_CTRL REG32(CONFIGURATION_BASE_ADDR_ARM+CONFIGURATION_SEC_EMU_CTRL_OFFSET)
//#define CONFIGURATION_SEC_EMU_CTRL_RESERVED_POS 5
//#define CONFIGURATION_SEC_EMU_CTRL_RESERVED_NUMB 27
//#define CONFIGURATION_SEC_EMU_CTRL_RESERVED_RES_VAL 0x0
//R
#define CONFIGURATION_SEC_EMU_CTRL_ETM_ENABLE_POS 4
#define CONFIGURATION_SEC_EMU_CTRL_ETM_ENABLE_NUMB 1
#define CONFIGURATION_SEC_EMU_CTRL_ETM_ENABLE_RES_VAL 0x0
//R/W
#define CONFIGURATION_SEC_EMU_CTRL_CTOOLS_ENABLE_POS 3
#define CONFIGURATION_SEC_EMU_CTRL_CTOOLS_ENABLE_NUMB 1
#define CONFIGURATION_SEC_EMU_CTRL_CTOOLS_ENABLE_RES_VAL 0x0
//R/W
#define CONFIGURATION_SEC_EMU_CTRL_MPU_DBG_ENABLE_POS 2
#define CONFIGURATION_SEC_EMU_CTRL_MPU_DBG_ENABLE_NUMB 1
#define CONFIGURATION_SEC_EMU_CTRL_MPU_DBG_ENABLE_RES_VAL 0x0
//R/W
#define CONFIGURATION_SEC_EMU_CTRL_MPU_SEC_DBG_ENABLE_POS 1
#define CONFIGURATION_SEC_EMU_CTRL_MPU_SEC_DBG_ENABLE_NUMB 1
#define CONFIGURATION_SEC_EMU_CTRL_MPU_SEC_DBG_ENABLE_RES_VAL 0x0
//R/W
#define CONFIGURATION_SEC_EMU_CTRL_SEC_EMU_WR_DISABLE_POS 0
#define CONFIGURATION_SEC_EMU_CTRL_SEC_EMU_WR_DISABLE_NUMB 1
#define CONFIGURATION_SEC_EMU_CTRL_SEC_EMU_WR_DISABLE_RES_VAL 0x0
//R/W
//CONFIGURATION_SEC_STATUS
//-------------------
#define CONFIGURATION_SEC_STATUS REG32(CONFIGURATION_BASE_ADDR_ARM+CONFIGURATION_SEC_STATUS_OFFSET)
//#define CONFIGURATION_SEC_STATUS_RESERVED_POS 9
//#define CONFIGURATION_SEC_STATUS_RESERVED_NUMB 23
//#define CONFIGURATION_SEC_STATUS_RESERVED_RES_VAL 0x0
//R
#define CONFIGURATION_SEC_STATUS_RAM_BIST_STARTED_POS 8
#define CONFIGURATION_SEC_STATUS_RAM_BIST_STARTED_NUMB 1
#define CONFIGURATION_SEC_STATUS_RAM_BIST_STARTED_RES_VAL 0x0
//R
#define CONFIGURATION_SEC_STATUS_SSM_VIOLATION_POS 7
#define CONFIGURATION_SEC_STATUS_SSM_VIOLATION_NUMB 1
#define CONFIGURATION_SEC_STATUS_SSM_VIOLATION_RES_VAL 0x0
//R
#define CONFIGURATION_SEC_STATUS_WDG_RESET_POS 6
#define CONFIGURATION_SEC_STATUS_WDG_RESET_NUMB 1
#define CONFIGURATION_SEC_STATUS_WDG_RESET_RES_VAL 0x0
//R/C
#define CONFIGURATION_SEC_STATUS_SEC_VIOL_RESET_POS 5
#define CONFIGURATION_SEC_STATUS_SEC_VIOL_RESET_NUMB 1
#define CONFIGURATION_SEC_STATUS_SEC_VIOL_RESET_RES_VAL 0x0
//R/C
#define CONFIGURATION_SEC_STATUS_SEC_WDG_RESET_POS 4
#define CONFIGURATION_SEC_STATUS_SEC_WDG_RESET_NUMB 1
#define CONFIGURATION_SEC_STATUS_SEC_WDG_RESET_RES_VAL 0x0
//R/C
#define CONFIGURATION_SEC_STATUS_PWR_ON_RST_POS 3
#define CONFIGURATION_SEC_STATUS_PWR_ON_RST_NUMB 1
#define CONFIGURATION_SEC_STATUS_PWR_ON_RST_RES_VAL 0x0
//R/C
#define CONFIGURATION_SEC_STATUS_SECURE_RAM_ERASED_POS 2
#define CONFIGURATION_SEC_STATUS_SECURE_RAM_ERASED_NUMB 1
#define CONFIGURATION_SEC_STATUS_SECURE_RAM_ERASED_RES_VAL 0x1
//R
#define CONFIGURATION_SEC_STATUS_ISRAM_ERASED_POS 1
#define CONFIGURATION_SEC_STATUS_ISRAM_ERASED_NUMB 1
#define CONFIGURATION_SEC_STATUS_ISRAM_ERASED_RES_VAL 0x1
//R
#define CONFIGURATION_SEC_STATUS_SEC_STATUS_WR_DISABLE_POS 0
#define CONFIGURATION_SEC_STATUS_SEC_STATUS_WR_DISABLE_NUMB 1
#define CONFIGURATION_SEC_STATUS_SEC_STATUS_WR_DISABLE_RES_VAL 0x0
//R/C
//CONFIGURATION_SEC_ERROR
//-------------------
#define CONFIGURATION_SEC_ERROR REG32(CONFIGURATION_BASE_ADDR_ARM+CONFIGURATION_SEC_ERROR_OFFSET)
//#define CONFIGURATION_SEC_ERROR_RESERVED_POS 10
//#define CONFIGURATION_SEC_ERROR_RESERVED_NUMB 22
//#define CONFIGURATION_SEC_ERROR_RESERVED_RES_VAL 0x0
//R
#define CONFIGURATION_SEC_ERROR_DMA_ACC_ERROR_POS 9
#define CONFIGURATION_SEC_ERROR_DMA_ACC_ERROR_NUMB 1
#define CONFIGURATION_SEC_ERROR_DMA_ACC_ERROR_RES_VAL 0x0
//R/C
#define CONFIGURATION_SEC_ERROR_ELCD_ACC_ERROR_POS 8
#define CONFIGURATION_SEC_ERROR_ELCD_ACC_ERROR_NUMB 1
#define CONFIGURATION_SEC_ERROR_ELCD_ACC_ERROR_RES_VAL 0x0
//R/C
//#define CONFIGURATION_SEC_ERROR_RESERVED_POS 7
//#define CONFIGURATION_SEC_ERROR_RESERVED_NUMB 1
//#define CONFIGURATION_SEC_ERROR_RESERVED_RES_VAL 0x0
//R
#define CONFIGURATION_SEC_ERROR_FRAME_BUFFER_ACC_ERROR_POS 6
#define CONFIGURATION_SEC_ERROR_FRAME_BUFFER_ACC_ERROR_NUMB 1
#define CONFIGURATION_SEC_ERROR_FRAME_BUFFER_ACC_ERROR_RES_VAL 0x0
//R/C
#define CONFIGURATION_SEC_ERROR_RNG_ACC_ERROR_POS 5
#define CONFIGURATION_SEC_ERROR_RNG_ACC_ERROR_NUMB 1
#define CONFIGURATION_SEC_ERROR_RNG_ACC_ERROR_RES_VAL 0x0
//R/C
#define CONFIGURATION_SEC_ERROR_PKA_ACC_ERROR_POS 4
#define CONFIGURATION_SEC_ERROR_PKA_ACC_ERROR_NUMB 1
#define CONFIGURATION_SEC_ERROR_PKA_ACC_ERROR_RES_VAL 0x0
//R/C
#define CONFIGURATION_SEC_ERROR_AES_ACC_ERROR_POS 3
#define CONFIGURATION_SEC_ERROR_AES_ACC_ERROR_NUMB 1
#define CONFIGURATION_SEC_ERROR_AES_ACC_ERROR_RES_VAL 0x0
//R/C
#define CONFIGURATION_SEC_ERROR_DES_ACC_ERROR_POS 2
#define CONFIGURATION_SEC_ERROR_DES_ACC_ERROR_NUMB 1
#define CONFIGURATION_SEC_ERROR_DES_ACC_ERROR_RES_VAL 0x0
//R/C
#define CONFIGURATION_SEC_ERROR_SHA_ACC_ERROR_POS 1
#define CONFIGURATION_SEC_ERROR_SHA_ACC_ERROR_NUMB 1
#define CONFIGURATION_SEC_ERROR_SHA_ACC_ERROR_RES_VAL 0x0
//R/C
#define CONFIGURATION_SEC_ERROR_SEC_ERROR_WR_DISABLE_POS 0
#define CONFIGURATION_SEC_ERROR_SEC_ERROR_WR_DISABLE_NUMB 1
#define CONFIGURATION_SEC_ERROR_SEC_ERROR_WR_DISABLE_RES_VAL 0x0
//R/C
//CONFIGURATION_CONF_REV
//-------------------
#define CONFIGURATION_CONF_REV REG32(CONFIGURATION_BASE_ADDR_ARM+CONFIGURATION_CONF_REV_OFFSET)
//#define CONFIGURATION_CONF_REV_RESERVED_POS 8
//#define CONFIGURATION_CONF_REV_RESERVED_NUMB 24
//#define CONFIGURATION_CONF_REV_RESERVED_RES_VAL 0x0000
//R
//#define CONFIGURATION_CONF_REV_CONFIGURATION_REVISION_NUMBER_POS 0
//#define CONFIGURATION_CONF_REV_CONFIGURATION_REVISION_NUMBER_NUMB 8
//#define CONFIGURATION_CONF_REV_CONFIGURATION_REVISION_NUMBER_RES_VAL 0x00
//R
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -