dualmodetimer1.h

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

#define            DUALMODETIMER1_TWPS_16_2_W_PEND_TTGR_POS                                                              3
#define            DUALMODETIMER1_TWPS_16_2_W_PEND_TTGR_NUMB                                                             1
#define            DUALMODETIMER1_TWPS_16_2_W_PEND_TTGR_RES_VAL                                                          0x0
//R

#define            DUALMODETIMER1_TWPS_16_2_W_PEND_TLDR_POS                                                              2
#define            DUALMODETIMER1_TWPS_16_2_W_PEND_TLDR_NUMB                                                             1
#define            DUALMODETIMER1_TWPS_16_2_W_PEND_TLDR_RES_VAL                                                          0x0
//R

#define            DUALMODETIMER1_TWPS_16_2_W_PEND_TCRR_POS                                                              1
#define            DUALMODETIMER1_TWPS_16_2_W_PEND_TCRR_NUMB                                                             1
#define            DUALMODETIMER1_TWPS_16_2_W_PEND_TCRR_RES_VAL                                                          0x0
//R

#define            DUALMODETIMER1_TWPS_16_2_W_PEND_TCLR_POS                                                              0
#define            DUALMODETIMER1_TWPS_16_2_W_PEND_TCLR_NUMB                                                             1
#define            DUALMODETIMER1_TWPS_16_2_W_PEND_TCLR_RES_VAL                                                          0x0

#ifndef DSP_ACCESS

#define            DUALMODETIMER1_TWPS_32                                                                              REG32(DUALMODETIMER1_BASE_ADDR_ARM+DUALMODETIMER1_TWPS_OFFSET*coeff32_arm)


#define            DUALMODETIMER1_TWPS_32_W_PEND_TMAR_POS                                                                4
#define            DUALMODETIMER1_TWPS_32_W_PEND_TMAR_NUMB                                                               1
#define            DUALMODETIMER1_TWPS_32_W_PEND_TMAR_RES_VAL                                                            0x0
//R

#define            DUALMODETIMER1_TWPS_32_W_PEND_TTGR_POS                                                                3
#define            DUALMODETIMER1_TWPS_32_W_PEND_TTGR_NUMB                                                               1
#define            DUALMODETIMER1_TWPS_32_W_PEND_TTGR_RES_VAL                                                            0x0
//R

#define            DUALMODETIMER1_TWPS_32_W_PEND_TLDR_POS                                                                2
#define            DUALMODETIMER1_TWPS_32_W_PEND_TLDR_NUMB                                                               1
#define            DUALMODETIMER1_TWPS_32_W_PEND_TLDR_RES_VAL                                                            0x0
//R

#define            DUALMODETIMER1_TWPS_32_W_PEND_TCRR_POS                                                                1
#define            DUALMODETIMER1_TWPS_32_W_PEND_TCRR_NUMB                                                               1
#define            DUALMODETIMER1_TWPS_32_W_PEND_TCRR_RES_VAL                                                            0x0
//R

#define            DUALMODETIMER1_TWPS_32_W_PEND_TCLR_POS                                                                0
#define            DUALMODETIMER1_TWPS_32_W_PEND_TCLR_NUMB                                                               1
#define            DUALMODETIMER1_TWPS_32_W_PEND_TCLR_RES_VAL                                                            0x0
//R


//DUALMODETIMER1_TMAR

#endif /* DSP_ACCESS */


#ifndef DSP_ACCESS
#define            DUALMODETIMER1_TMAR_16_0                                                                            REG16(DUALMODETIMER1_BASE_ADDR_ARM+DUALMODETIMER1_TMAR_OFFSET*coeff16_arm+0)
#else
#define            DUALMODETIMER1_TMAR_16_0                                                                            REG16(DUALMODETIMER1_BASE_ADDR_DSP+DUALMODETIMER1_TMAR_OFFSET)
#endif


#define            DUALMODETIMER1_TMAR_16_0_COMPARE_VALUE_POS                                                            0
#define            DUALMODETIMER1_TMAR_16_0_COMPARE_VALUE_NUMB                                                           32
#define            DUALMODETIMER1_TMAR_16_0_COMPARE_VALUE_RES_VAL                                                        0x00000000
//R/W



#ifndef DSP_ACCESS
#define            DUALMODETIMER1_TMAR_16_2                                                                            REG16(DUALMODETIMER1_BASE_ADDR_ARM+DUALMODETIMER1_TMAR_OFFSET*coeff16_arm+2)
#else
#define            DUALMODETIMER1_TMAR_16_2                                                                            REG16(DUALMODETIMER1_BASE_ADDR_DSP+DUALMODETIMER1_TMAR_OFFSET+1)
#endif


#define            DUALMODETIMER1_TMAR_16_2_COMPARE_VALUE_POS                                                            0
#define            DUALMODETIMER1_TMAR_16_2_COMPARE_VALUE_NUMB                                                           32
#define            DUALMODETIMER1_TMAR_16_2_COMPARE_VALUE_RES_VAL                                                        0x00000000

#ifndef DSP_ACCESS

#define            DUALMODETIMER1_TMAR_32                                                                              REG32(DUALMODETIMER1_BASE_ADDR_ARM+DUALMODETIMER1_TMAR_OFFSET*coeff32_arm)


#define            DUALMODETIMER1_TMAR_32_COMPARE_VALUE_POS                                                              0
#define            DUALMODETIMER1_TMAR_32_COMPARE_VALUE_NUMB                                                             32
#define            DUALMODETIMER1_TMAR_32_COMPARE_VALUE_RES_VAL                                                          0x00000000
//R/W


//DUALMODETIMER1_TCAR

#endif /* DSP_ACCESS */


#ifndef DSP_ACCESS
#define            DUALMODETIMER1_TCAR_16_0                                                                            REG16(DUALMODETIMER1_BASE_ADDR_ARM+DUALMODETIMER1_TCAR_OFFSET*coeff16_arm+0)
#else
#define            DUALMODETIMER1_TCAR_16_0                                                                            REG16(DUALMODETIMER1_BASE_ADDR_DSP+DUALMODETIMER1_TCAR_OFFSET)
#endif


#define            DUALMODETIMER1_TCAR_16_0_CAPTURED_VALUE_POS                                                           0
#define            DUALMODETIMER1_TCAR_16_0_CAPTURED_VALUE_NUMB                                                          32
#define            DUALMODETIMER1_TCAR_16_0_CAPTURED_VALUE_RES_VAL                                                       0x00000000
//R



#ifndef DSP_ACCESS
#define            DUALMODETIMER1_TCAR_16_2                                                                            REG16(DUALMODETIMER1_BASE_ADDR_ARM+DUALMODETIMER1_TCAR_OFFSET*coeff16_arm+2)
#else
#define            DUALMODETIMER1_TCAR_16_2                                                                            REG16(DUALMODETIMER1_BASE_ADDR_DSP+DUALMODETIMER1_TCAR_OFFSET+1)
#endif


#define            DUALMODETIMER1_TCAR_16_2_CAPTURED_VALUE_POS                                                           0
#define            DUALMODETIMER1_TCAR_16_2_CAPTURED_VALUE_NUMB                                                          32
#define            DUALMODETIMER1_TCAR_16_2_CAPTURED_VALUE_RES_VAL                                                       0x00000000

#ifndef DSP_ACCESS

#define            DUALMODETIMER1_TCAR_32                                                                              REG32(DUALMODETIMER1_BASE_ADDR_ARM+DUALMODETIMER1_TCAR_OFFSET*coeff32_arm)


#define            DUALMODETIMER1_TCAR_32_CAPTURED_VALUE_POS                                                             0
#define            DUALMODETIMER1_TCAR_32_CAPTURED_VALUE_NUMB                                                            32
#define            DUALMODETIMER1_TCAR_32_CAPTURED_VALUE_RES_VAL                                                         0x00000000
//R


//DUALMODETIMER1_TSICR

#endif /* DSP_ACCESS */


#ifndef DSP_ACCESS
#define            DUALMODETIMER1_TSICR_16_0                                                                           REG16(DUALMODETIMER1_BASE_ADDR_ARM+DUALMODETIMER1_TSICR_OFFSET*coeff16_arm+0)
#else
#define            DUALMODETIMER1_TSICR_16_0                                                                           REG16(DUALMODETIMER1_BASE_ADDR_DSP+DUALMODETIMER1_TSICR_OFFSET)
#endif


#define            DUALMODETIMER1_TSICR_16_0_POSTED_POS                                                                  2
#define            DUALMODETIMER1_TSICR_16_0_POSTED_NUMB                                                                 1
#define            DUALMODETIMER1_TSICR_16_0_POSTED_RES_VAL                                                              0x1
//R/W

#define            DUALMODETIMER1_TSICR_16_0_SFT_POS                                                                     1
#define            DUALMODETIMER1_TSICR_16_0_SFT_NUMB                                                                    1
#define            DUALMODETIMER1_TSICR_16_0_SFT_RES_VAL                                                                 0x0
//R/W



#ifndef DSP_ACCESS
#define            DUALMODETIMER1_TSICR_16_2                                                                           REG16(DUALMODETIMER1_BASE_ADDR_ARM+DUALMODETIMER1_TSICR_OFFSET*coeff16_arm+2)
#else
#define            DUALMODETIMER1_TSICR_16_2                                                                           REG16(DUALMODETIMER1_BASE_ADDR_DSP+DUALMODETIMER1_TSICR_OFFSET+1)
#endif


#define            DUALMODETIMER1_TSICR_16_2_POSTED_POS                                                                  2
#define            DUALMODETIMER1_TSICR_16_2_POSTED_NUMB                                                                 1
#define            DUALMODETIMER1_TSICR_16_2_POSTED_RES_VAL                                                              0x1
//R/W

#define            DUALMODETIMER1_TSICR_16_2_SFT_POS                                                                     1
#define            DUALMODETIMER1_TSICR_16_2_SFT_NUMB                                                                    1
#define            DUALMODETIMER1_TSICR_16_2_SFT_RES_VAL                                                                 0x0

#ifndef DSP_ACCESS

#define            DUALMODETIMER1_TSICR_32                                                                             REG32(DUALMODETIMER1_BASE_ADDR_ARM+DUALMODETIMER1_TSICR_OFFSET*coeff32_arm)


#define            DUALMODETIMER1_TSICR_32_POSTED_POS                                                                    2
#define            DUALMODETIMER1_TSICR_32_POSTED_NUMB                                                                   1
#define            DUALMODETIMER1_TSICR_32_POSTED_RES_VAL                                                                0x0
//R/W

#define            DUALMODETIMER1_TSICR_32_SFT_POS                                                                       1
#define            DUALMODETIMER1_TSICR_32_SFT_NUMB                                                                      1
#define            DUALMODETIMER1_TSICR_32_SFT_RES_VAL                                                                   0x0
//R/W

#endif

#endif