mcsi3.h

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

//=====================================================================  
//       TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION             
// Property of Texas Instruments -- For Unrestricted Internal Use Only   
// Unauthorized reproduction and/or distribution is strictly prohibited  
// This product is protected under copyright law and trade secret law as 
// an unpublished work.Created 2001,(C) Copyright 2001 Texas Instruments.
// All rights reserved.                                                  
//=====================================================================  


#define MCSI3_ADDR      MEM_DSP_MCSI3_ADDR
/***********************************************************/
/*                 MCSI3 registers offset align on 16 bits */
/***********************************************************/

#define MCSI3_CONTROL_REG_OFFSET          (0x00 <<1)
#define MCSI3_MAIN_PARAM_REG_OFFSET       (0x01 <<1)
#define MCSI3_INTERRUPTS_REG_OFFSET       (0x02 <<1)
#define MCSI3_CHANNEL_USED_REG_OFFSET     (0x03 <<1)
#define MCSI3_OVER_CLOCK_REG_OFFSET       (0x04 <<1)
#define MCSI3_CLOCK_FREQUENCY_REG_OFFSET  (0x05 <<1)
#define MCSI3_STATUS_REG_OFFSET           (0x06 <<1)
#define MCSI3_TX0_REG_OFFSET              (0x20 <<1)
#define MCSI3_TX1_REG_OFFSET              (0x21 <<1)
#define MCSI3_TX2_REG_OFFSET              (0x22 <<1)
#define MCSI3_TX3_REG_OFFSET              (0x23 <<1)
#define MCSI3_TX4_REG_OFFSET              (0x24 <<1)
#define MCSI3_TX5_REG_OFFSET              (0x25 <<1)
#define MCSI3_TX6_REG_OFFSET              (0x26 <<1)
#define MCSI3_TX7_REG_OFFSET              (0x27 <<1)
#define MCSI3_TX8_REG_OFFSET              (0x28 <<1)
#define MCSI3_TX9_REG_OFFSET              (0x29 <<1)
#define MCSI3_TX10_REG_OFFSET             (0x2a <<1)
#define MCSI3_TX11_REG_OFFSET             (0x2b <<1)
#define MCSI3_TX12_REG_OFFSET             (0x2c <<1)
#define MCSI3_TX13_REG_OFFSET             (0x2d <<1)
#define MCSI3_TX14_REG_OFFSET             (0x2e <<1)
#define MCSI3_TX15_REG_OFFSET             (0x2f <<1)
#define MCSI3_RX0_REG_OFFSET              (0x30 <<1)
#define MCSI3_RX1_REG_OFFSET              (0x31 <<1)
#define MCSI3_RX2_REG_OFFSET              (0x32 <<1)
#define MCSI3_RX3_REG_OFFSET              (0x33 <<1)
#define MCSI3_RX4_REG_OFFSET              (0x34 <<1)
#define MCSI3_RX5_REG_OFFSET              (0x35 <<1)
#define MCSI3_RX6_REG_OFFSET              (0x36 <<1)
#define MCSI3_RX7_REG_OFFSET              (0x37 <<1)
#define MCSI3_RX8_REG_OFFSET              (0x38 <<1)
#define MCSI3_RX9_REG_OFFSET              (0x39 <<1)
#define MCSI3_RX10_REG_OFFSET             (0x3a <<1)
#define MCSI3_RX11_REG_OFFSET             (0x3b <<1)
#define MCSI3_RX12_REG_OFFSET             (0x3c <<1)
#define MCSI3_RX13_REG_OFFSET             (0x3d <<1)
#define MCSI3_RX14_REG_OFFSET             (0x3e <<1)
#define MCSI3_RX15_REG_OFFSET             (0x3f <<1)

/***********************************************************/
/*                 MCSI3 registers address                 */
/***********************************************************/

#define MCSI3_CONTROL_REG                 REG16(MCSI3_ADDR + MCSI3_CONTROL_REG_OFFSET)
#define MCSI3_MAIN_PARAM_REG              REG16(MCSI3_ADDR + MCSI3_MAIN_PARAM_REG_OFFSET)
#define MCSI3_INTERRUPTS_REG              REG16(MCSI3_ADDR + MCSI3_INTERRUPTS_REG_OFFSET)
#define MCSI3_CHANNEL_USED_REG            REG16(MCSI3_ADDR + MCSI3_CHANNEL_USED_REG_OFFSET)
#define MCSI3_OVER_CLOCK_REG              REG16(MCSI3_ADDR + MCSI3_OVER_CLOCK_REG_OFFSET)
#define MCSI3_CLOCK_FREQUENCY_REG         REG16(MCSI3_ADDR + MCSI3_CLOCK_FREQUENCY_REG_OFFSET)
#define MCSI3_STATUS_REG                  REG16(MCSI3_ADDR + MCSI3_STATUS_REG_OFFSET)
#define MCSI3_TX0_REG                     REG16(MCSI3_ADDR + MCSI3_TX0_REG_OFFSET)
#define MCSI3_TX1_REG                     REG16(MCSI3_ADDR + MCSI3_TX1_REG_OFFSET)
#define MCSI3_TX2_REG                     REG16(MCSI3_ADDR + MCSI3_TX2_REG_OFFSET)
#define MCSI3_TX3_REG                     REG16(MCSI3_ADDR + MCSI3_TX3_REG_OFFSET)
#define MCSI3_TX4_REG                     REG16(MCSI3_ADDR + MCSI3_TX4_REG_OFFSET)
#define MCSI3_TX5_REG                     REG16(MCSI3_ADDR + MCSI3_TX5_REG_OFFSET)
#define MCSI3_TX6_REG                     REG16(MCSI3_ADDR + MCSI3_TX6_REG_OFFSET)
#define MCSI3_TX7_REG                     REG16(MCSI3_ADDR + MCSI3_TX7_REG_OFFSET)
#define MCSI3_TX8_REG                     REG16(MCSI3_ADDR + MCSI3_TX8_REG_OFFSET)
#define MCSI3_TX9_REG                     REG16(MCSI3_ADDR + MCSI3_TX9_REG_OFFSET)
#define MCSI3_TX10_REG                    REG16(MCSI3_ADDR + MCSI3_TX10_REG_OFFSET)
#define MCSI3_TX11_REG                    REG16(MCSI3_ADDR + MCSI3_TX11_REG_OFFSET)
#define MCSI3_TX12_REG                    REG16(MCSI3_ADDR + MCSI3_TX12_REG_OFFSET)
#define MCSI3_TX13_REG                    REG16(MCSI3_ADDR + MCSI3_TX13_REG_OFFSET)
#define MCSI3_TX14_REG                    REG16(MCSI3_ADDR + MCSI3_TX14_REG_OFFSET)
#define MCSI3_TX15_REG                    REG16(MCSI3_ADDR + MCSI3_TX15_REG_OFFSET)
#define MCSI3_RX0_REG                     REG16(MCSI3_ADDR + MCSI3_RX0_REG_OFFSET)
#define MCSI3_RX1_REG                     REG16(MCSI3_ADDR + MCSI3_RX1_REG_OFFSET)
#define MCSI3_RX2_REG                     REG16(MCSI3_ADDR + MCSI3_RX2_REG_OFFSET)
#define MCSI3_RX3_REG                     REG16(MCSI3_ADDR + MCSI3_RX3_REG_OFFSET)
#define MCSI3_RX4_REG                     REG16(MCSI3_ADDR + MCSI3_RX4_REG_OFFSET)
#define MCSI3_RX5_REG                     REG16(MCSI3_ADDR + MCSI3_RX5_REG_OFFSET)
#define MCSI3_RX6_REG                     REG16(MCSI3_ADDR + MCSI3_RX6_REG_OFFSET)
#define MCSI3_RX7_REG                     REG16(MCSI3_ADDR + MCSI3_RX7_REG_OFFSET)
#define MCSI3_RX8_REG                     REG16(MCSI3_ADDR + MCSI3_RX8_REG_OFFSET)
#define MCSI3_RX9_REG                     REG16(MCSI3_ADDR + MCSI3_RX9_REG_OFFSET)
#define MCSI3_RX10_REG                    REG16(MCSI3_ADDR + MCSI3_RX10_REG_OFFSET)
#define MCSI3_RX11_REG                    REG16(MCSI3_ADDR + MCSI3_RX11_REG_OFFSET)
#define MCSI3_RX12_REG                    REG16(MCSI3_ADDR + MCSI3_RX12_REG_OFFSET)
#define MCSI3_RX13_REG                    REG16(MCSI3_ADDR + MCSI3_RX13_REG_OFFSET)
#define MCSI3_RX14_REG                    REG16(MCSI3_ADDR + MCSI3_RX14_REG_OFFSET)
#define MCSI3_RX15_REG                    REG16(MCSI3_ADDR + MCSI3_RX15_REG_OFFSET)