⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 uart_modem2.h

📁 OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器
💻 H
📖 第 1 页 / 共 5 页
字号:
//UART_MODEM2_MSR
//-------------------
#define            UART_MODEM2_MSR                                                                                     REG8(UART_MODEM2_BASE_ADDR_ARM+UART_MODEM2_MSR_OFFSET)


#define            UART_MODEM2_MSR_NCD_STS_POS                                                                           7
#define            UART_MODEM2_MSR_NCD_STS_NUMB                                                                          1
#define            UART_MODEM2_MSR_NCD_STS_RES_VAL                                                                       0x0
//R

#define            UART_MODEM2_MSR_NRI_STS_POS                                                                           6
#define            UART_MODEM2_MSR_NRI_STS_NUMB                                                                          1
#define            UART_MODEM2_MSR_NRI_STS_RES_VAL                                                                       0x0
//R

#define            UART_MODEM2_MSR_NDSR_STS_POS                                                                          5
#define            UART_MODEM2_MSR_NDSR_STS_NUMB                                                                         1
#define            UART_MODEM2_MSR_NDSR_STS_RES_VAL                                                                      0x0
//R

#define            UART_MODEM2_MSR_NCTS_STS_POS                                                                          4
#define            UART_MODEM2_MSR_NCTS_STS_NUMB                                                                         1
#define            UART_MODEM2_MSR_NCTS_STS_RES_VAL                                                                      0x0
//R

#define            UART_MODEM2_MSR_DCD_STS_POS                                                                           3
#define            UART_MODEM2_MSR_DCD_STS_NUMB                                                                          1
#define            UART_MODEM2_MSR_DCD_STS_RES_VAL                                                                       0x0
//R

#define            UART_MODEM2_MSR_RI_STS_POS                                                                            2
#define            UART_MODEM2_MSR_RI_STS_NUMB                                                                           1
#define            UART_MODEM2_MSR_RI_STS_RES_VAL                                                                        0x0
//R

#define            UART_MODEM2_MSR_DSR_STS_POS                                                                           1
#define            UART_MODEM2_MSR_DSR_STS_NUMB                                                                          1
#define            UART_MODEM2_MSR_DSR_STS_RES_VAL                                                                       0x0
//R

#define            UART_MODEM2_MSR_CTS_STS_POS                                                                           0
#define            UART_MODEM2_MSR_CTS_STS_NUMB                                                                          1
#define            UART_MODEM2_MSR_CTS_STS_RES_VAL                                                                       0x0
//R


//UART_MODEM2_TCR
//-------------------
#define            UART_MODEM2_TCR                                                                                     REG8(UART_MODEM2_BASE_ADDR_ARM+UART_MODEM2_TCR_OFFSET)


#define            UART_MODEM2_TCR_RX_FIFO_TRIG_START_POS                                                                4
#define            UART_MODEM2_TCR_RX_FIFO_TRIG_START_NUMB                                                               4
#define            UART_MODEM2_TCR_RX_FIFO_TRIG_START_RES_VAL                                                            0x0
//R/W

#define            UART_MODEM2_TCR_RX_FIFO_TRIG_HALT_POS                                                                 0
#define            UART_MODEM2_TCR_RX_FIFO_TRIG_HALT_NUMB                                                                4
#define            UART_MODEM2_TCR_RX_FIFO_TRIG_HALT_RES_VAL                                                             0xF
//R/W


//UART_MODEM2_XOFF1
//-------------------
#define            UART_MODEM2_XOFF1                                                                                   REG8(UART_MODEM2_BASE_ADDR_ARM+UART_MODEM2_XOFF1_OFFSET)


#define            UART_MODEM2_XOFF1_XOFF_WORD_1_POS                                                                     0
#define            UART_MODEM2_XOFF1_XOFF_WORD_1_NUMB                                                                    8
#define            UART_MODEM2_XOFF1_XOFF_WORD_1_RES_VAL                                                                 0x0
//R/W


//UART_MODEM2_SPR
//-------------------
#define            UART_MODEM2_SPR                                                                                     REG8(UART_MODEM2_BASE_ADDR_ARM+UART_MODEM2_SPR_OFFSET)


#define            UART_MODEM2_SPR_SPR_WORD_POS                                                                          0
#define            UART_MODEM2_SPR_SPR_WORD_NUMB                                                                         8
#define            UART_MODEM2_SPR_SPR_WORD_RES_VAL                                                                      0x0
//R/W


//UART_MODEM2_TLR
//-------------------
#define            UART_MODEM2_TLR                                                                                     REG8(UART_MODEM2_BASE_ADDR_ARM+UART_MODEM2_TLR_OFFSET)


#define            UART_MODEM2_TLR_RX_FIFO_TRIG_DMA_POS                                                                  4
#define            UART_MODEM2_TLR_RX_FIFO_TRIG_DMA_NUMB                                                                 4
#define            UART_MODEM2_TLR_RX_FIFO_TRIG_DMA_RES_VAL                                                              0x0
//R/W

#define            UART_MODEM2_TLR_TX_FIFO_TRIG_DMA_POS                                                                  0
#define            UART_MODEM2_TLR_TX_FIFO_TRIG_DMA_NUMB                                                                 4
#define            UART_MODEM2_TLR_TX_FIFO_TRIG_DMA_RES_VAL                                                              0x0
//R/W


//UART_MODEM2_XOFF2
//-------------------
#define            UART_MODEM2_XOFF2                                                                                   REG8(UART_MODEM2_BASE_ADDR_ARM+UART_MODEM2_XOFF2_OFFSET)


#define            UART_MODEM2_XOFF2_XOFF_WORD_2_POS                                                                     0
#define            UART_MODEM2_XOFF2_XOFF_WORD_2_NUMB                                                                    8
#define            UART_MODEM2_XOFF2_XOFF_WORD_2_RES_VAL                                                                 0x0
//R/W


//UART_MODEM2_MDR1
//-------------------
#define            UART_MODEM2_MDR1                                                                                    REG8(UART_MODEM2_BASE_ADDR_ARM+UART_MODEM2_MDR1_OFFSET)


#define            UART_MODEM2_MDR1_FRAME_END_MODE_POS                                                                   7
#define            UART_MODEM2_MDR1_FRAME_END_MODE_NUMB                                                                  1
#define            UART_MODEM2_MDR1_FRAME_END_MODE_RES_VAL                                                               0x0
//R/W

#define            UART_MODEM2_MDR1_SIP_MODE_POS                                                                         6
#define            UART_MODEM2_MDR1_SIP_MODE_NUMB                                                                        1
#define            UART_MODEM2_MDR1_SIP_MODE_RES_VAL                                                                     0x0
//R/W

#define            UART_MODEM2_MDR1_SCT_POS                                                                              5
#define            UART_MODEM2_MDR1_SCT_NUMB                                                                             1
#define            UART_MODEM2_MDR1_SCT_RES_VAL                                                                          0x0
//R/W

#define            UART_MODEM2_MDR1_SET_TXIR_POS                                                                         4
#define            UART_MODEM2_MDR1_SET_TXIR_NUMB                                                                        1
#define            UART_MODEM2_MDR1_SET_TXIR_RES_VAL                                                                     0x0
//R/W

#define            UART_MODEM2_MDR1_IR_SLEEP_POS                                                                         3
#define            UART_MODEM2_MDR1_IR_SLEEP_NUMB                                                                        1
#define            UART_MODEM2_MDR1_IR_SLEEP_RES_VAL                                                                     0x0
//R/W

#define            UART_MODEM2_MDR1_MODE_SELECT_POS                                                                      0
#define            UART_MODEM2_MDR1_MODE_SELECT_NUMB                                                                     3
#define            UART_MODEM2_MDR1_MODE_SELECT_RES_VAL                                                                  0x7
//R/W


//UART_MODEM2_MDR2
//-------------------
#define            UART_MODEM2_MDR2                                                                                    REG8(UART_MODEM2_BASE_ADDR_ARM+UART_MODEM2_MDR2_OFFSET)


#define            UART_MODEM2_MDR2_RESERVED_POS                                                                         3
#define            UART_MODEM2_MDR2_RESERVED_NUMB                                                                        5
#define            UART_MODEM2_MDR2_RESERVED_RES_VAL                                                                     0x0
//R

#define            UART_MODEM2_MDR2_STS_FIFO_TRIG_POS                                                                    1
#define            UART_MODEM2_MDR2_STS_FIFO_TRIG_NUMB                                                                   2
#define            UART_MODEM2_MDR2_STS_FIFO_TRIG_RES_VAL                                                                0x00
//R/W

#define            UART_MODEM2_MDR2_RESERVED0_POS                                                                         0
#define            UART_MODEM2_MDR2_RESERVED0_NUMB                                                                        1
#define            UART_MODEM2_MDR2_RESERVED0_RES_VAL                                                                     0x0
//R


//UART_MODEM2_SFLSR
//-------------------
#define            UART_MODEM2_SFLSR                                                                                   REG8(UART_MODEM2_BASE_ADDR_ARM+UART_MODEM2_SFLSR_OFFSET)


#define            UART_MODEM2_SFLSR_RESERVED_POS                                                                        5
#define            UART_MODEM2_SFLSR_RESERVED_NUMB                                                                       3
#define            UART_MODEM2_SFLSR_RESERVED_RES_VAL                                                                    0x0
//R

#define            UART_MODEM2_SFLSR_OE_ERROR_POS                                                                        4
#define            UART_MODEM2_SFLSR_OE_ERROR_NUMB                                                                       1
#define            UART_MODEM2_SFLSR_OE_ERROR_RES_VAL                                                                    0x0
//R

#define            UART_MODEM2_SFLSR_FRAME_TOO_LONG_ERR_POS                                                              3
#define            UART_MODEM2_SFLSR_FRAME_TOO_LONG_ERR_NUMB                                                             1
#define            UART_MODEM2_SFLSR_FRAME_TOO_LONG_ERR_RES_VAL                                                          0x0
//R

#define            UART_MODEM2_SFLSR_ABORT_DETECT_POS                                                                    2
#define            UART_MODEM2_SFLSR_ABORT_DETECT_NUMB                                                                   1
#define            UART_MODEM2_SFLSR_ABORT_DETECT_RES_VAL                                                                0x0
//R

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -