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📄 mmu.h

📁 OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器
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    case HSAB_MMU : \
      { \
	SetBit(CNTL_REG_HSAB,RESET_SW_MMU_MASK); break; \
      } \
    case LB_MMU : \
      { \
	SetBit(CNTL_REG_LOCAL_BUS,RESET_SW_MMU_MASK); break; \
      } \
    case DSP_MMU : \
      { \
	SetBit(CNTL_REG_DSP,RESET_SW_MMU_MASK); break; \
      } \
    } \
}

  /*
-----------------------------------------------------------------------------
 NAME        : Enable_MMU                                                   -
 DESCRIPTION : Enables MMU                                                  -
 SYNOPSYS    : void Enable_MMU (MMU_NAME_t mmu_name)                        -
 PARAMETERS  : mmu_name could be DSP_MMU or LB_MMU or HSAB_MMU              -
 RETURN VALUE: None.                                                        -
 LIMITATIONS : None.                                                        -
-----------------------------------------------------------------------------
*/
#define Enable_MMU(mmu_name) \
{ \
    switch(mmu_name) \
    { \
    case HSAB_MMU : \
      { \
	SetBit(CNTL_REG_HSAB,MMU_ENABLE_MASK); break; \
      } \
    case LB_MMU : \
      { \
	SetBit(CNTL_REG_LOCAL_BUS,MMU_ENABLE_MASK); break; \
      } \
    case DSP_MMU : \
      { \
	SetBit(CNTL_REG_DSP,MMU_ENABLE_MASK); break; \
      } \
    } \
}

  /*
-----------------------------------------------------------------------------
 NAME        : Disable_MMU                                                  -
 DESCRIPTION : Disables MMU                                                 -
 SYNOPSYS    : void Disable_MMU (MMU_NAME_t mmu_name)                       -
 PARAMETERS  : mmu_name could be DSP_MMU or LB_MMU or HSAB_MMU              -
 RETURN VALUE: None.                                                        -
 LIMITATIONS : None.                                                        -
-----------------------------------------------------------------------------
*/
#define Disable_MMU(mmu_name) \
{ \
    switch(mmu_name) \
    { \
    case HSAB_MMU : \
      { \
	ClearBit(CNTL_REG_HSAB,MMU_ENABLE_MASK); break; \
      } \
    case LB_MMU : \
      { \
	ClearBit(CNTL_REG_LOCAL_BUS,MMU_ENABLE_MASK); break; \
      } \
    case DSP_MMU : \
      { \
	ClearBit(CNTL_REG_DSP,MMU_ENABLE_MASK); break; \
      } \
    } \
}

  /*
-----------------------------------------------------------------------------
 NAME        : Enable_WTL                                                   -
 DESCRIPTION : Enables Walking Table Logic                                  -
 SYNOPSYS    : void Enable_WTL (MMU_NAME_t mmu_name)                        -
 PARAMETERS  : mmu_name could be DSP_MMU or LB_MMU or HSAB_MMU              -
 RETURN VALUE: None.                                                        -
 LIMITATIONS : None.                                                        -
-----------------------------------------------------------------------------
*/
#define Enable_WTL(mmu_name) \
{ \
    switch(mmu_name) \
    { \
    case HSAB_MMU : \
      { \
	SetBit(CNTL_REG_HSAB,WTL_ENABLE_MASK); break; \
      } \
    case LB_MMU : \
      { \
	SetBit(CNTL_REG_LOCAL_BUS,WTL_ENABLE_MASK); break; \
      } \
    case DSP_MMU : \
      { \
	SetBit(CNTL_REG_DSP,WTL_ENABLE_MASK); break; \
      } \
    } \
}

  /*
-----------------------------------------------------------------------------
 NAME        : Disable_WTL                                                  -
 DESCRIPTION : Disables Walking Table Logic                                 -
 SYNOPSYS    : void Disable_WTL (MMU_NAME_t mmu_name)                       -
 PARAMETERS  : mmu_name could be DSP_MMU or LB_MMU or HSAB_MMU              -
 RETURN VALUE: None.                                                        -
 LIMITATIONS : None.                                                        -
-----------------------------------------------------------------------------
*/
#define Disable_WTL(mmu_name) \
{ \
    switch(mmu_name) \
    { \
    case HSAB_MMU : \
      { \
	ClearBit(CNTL_REG_HSAB,WTL_ENABLE_MASK); break; \
      } \
    case LB_MMU : \
      { \
	ClearBit(CNTL_REG_LOCAL_BUS,WTL_ENABLE_MASK); break; \
      } \
    case DSP_MMU : \
      { \
	ClearBit(CNTL_REG_DSP,WTL_ENABLE_MASK); break; \
      } \
    } \
}

/*
-----------------------------------------------------------------------------
 NAME        : MMU_ReadFaultAddress                                           -
 DESCRIPTION : Read Fault address Register High and Low                     -
 PARAMETERS  : mmu_name could be DSP_MMU or LB_MMU or HSAB_MMU              -
 RETURN VALUE: Completed fault address                                      -
 LIMITATIONS : None.                                                        -
-----------------------------------------------------------------------------
*/
UWORD32 MMU_ReadFaultAddress(MMU_NAME_t);

/*
-----------------------------------------------------------------------------
 NAME        : MMU_ReadFaultStatus                                            -
 DESCRIPTION : Read Fault Status Register                                   -
 PARAMETERS  : mmu_name could be DSP_MMU or LB_MMU or HSAB_MMU              -
 RETURN VALUE: Fault Status TRANS_FAULT, TLB_MISS, PERM_FAULT, PREFETCH_ERR -
 LIMITATIONS : None.                                                        -
-----------------------------------------------------------------------------
*/
FAULT_STATUS_t MMU_ReadFaultStatus(MMU_NAME_t);

  /*
-----------------------------------------------------------------------------
 NAME        : Acknowledge_IT                                               -
 DESCRIPTION : when a fault is generated, master receives IT, treats it and -
               acknowledges Interrupt                                       -
 SYNOPSYS    : void Acknowledge_IT (MMU_NAME_t mmu_name)                    -
 PARAMETERS  : mmu_name could be DSP_MMU or LB_MMU or HSAB_MMU              -
 RETURN VALUE: None.                                                        -
 LIMITATIONS : None.                                                        -
-----------------------------------------------------------------------------
*/
#define Acknowledge_IT(mmu_name) \
{ \
    switch(mmu_name) \
    { \
    case HSAB_MMU : \
      { \
	SetBit(IT_ACK_REG_HSAB,IT_ACK_MASK); break; \
      } \
    case LB_MMU : \
      { \
	SetBit(IT_ACK_REG_LOCAL_BUS,IT_ACK_MASK); break; \
      } \
    case DSP_MMU : \
      { \
	SetBit(IT_ACK_REG_DSP,IT_ACK_MASK); break; \
      } \
    } \
}

  /*
-----------------------------------------------------------------------------
 NAME        : Set_TTB                                                      -
 DESCRIPTION : Set TTB_L_REG and TTB_H_REG                                  -
 SYNOPSYS    : void Set_TTB (MMU_NAME_t mmu_name, UWORD32 TTB)              -
 PARAMETERS  : mmu_name could be DSP_MMU or LB_MMU or HSAB_MMU              -
 RETURN VALUE: None.                                                        -
 LIMITATIONS : None.                                                        -
-----------------------------------------------------------------------------
*/
#define Set_TTB(mmu_name, ttb) \
{ \
    switch(mmu_name) \
    { \
    case HSAB_MMU : \
      { \
        TTB_H_REG_HSAB = ((ttb & 0xFFFF0000) >> 16); \
	TTB_L_REG_HSAB = (ttb & 0x0000FFFF); break; \
      } \
    case LB_MMU : \
      { \
	TTB_H_REG_LOCAL_BUS = ((ttb & 0xFFFF0000) >> 16); \
	TTB_L_REG_LOCAL_BUS = (ttb & 0x0000FFFF); break; \
      } \
    case DSP_MMU : \
      { \
        TTB_H_REG_DSP = ((ttb & 0xFFFF0000) >> 16); \
	TTB_L_REG_DSP = (ttb & 0x0000FFFF); break; \
      } \
    } \
}

/*
-----------------------------------------------------------------------------
 NAME        : MMU_ReadTtb                                                     -
 DESCRIPTION : Read Translation Table Base Register                         -
 PARAMETERS  : mmu_name could be DSP_MMU or LB_MMU or HSAB_MMU              -
 RETURN VALUE: TTB                                                          -
 LIMITATIONS : None.                                                        -
-----------------------------------------------------------------------------
*/
UWORD32 MMU_ReadTtb(MMU_NAME_t);

  /*
-----------------------------------------------------------------------------
 NAME        : Update_Lock_Counter                                          -
 DESCRIPTION : Set current_victim and base_value                            -
 SYNOPSYS    : void Update_Lock_Counter (MMU_NAME_t mmu_name,               -
                                         UWORD8 current_victim,             -
                                         UWORD8 base_value)                 -
 PARAMETERS  : mmu_name could be DSP_MMU or LB_MMU or HSAB_MMU              -
 RETURN VALUE: None.                                                        -
 LIMITATIONS : None.                                                        -
-----------------------------------------------------------------------------
*/
#define Update_Lock_Counter(mmu_name, current_victim, base_value) \
{ \
    switch(mmu_name) \
    { \
    case HSAB_MMU : \
      { \
	LOCK_REG_HSAB = ((current_victim << 4) | (base_value << 10)); break; \
      } \
    case LB_MMU : \
      { \
        LOCK_REG_LOCAL_BUS = ((current_victim << 4) | (base_value << 10)); \
        break; \
      } \
    case DSP_MMU : \
      { \
	LOCK_REG_DSP = ((current_victim << 4) | (base_value << 10)); break; \
      } \
    } \
}

  /*
-----------------------------------------------------------------------------
 NAME        : Set_CAM_Entry                                                -
 DESCRIPTION : Set CAM_L_REG and CAM_H_REG                                  -
 SYNOPSYS    : void Set_CAM_Entry (MMU_NAME_t mmu_name,                     -
                                   SLST_t slst_bit,                         -
                                   PRESERVED_t p_bit,                       -
                                   UWORD16 VA_tag_I2,                       -
                                   UWORD16 VA_tag_I1)                       -
 PARAMETERS  : mmu_name could be DSP_MMU                                    -
                                 LB_MMU                                     -
                                 HSAB_MMU                                   -
               slst_bit could be SECTION                                    -
                                 LARGE_PAGE                                 -
                                 SMALL_PAGE                                 -
                                 TINY_PAGE                                  -
               p_bit could be ENTRY_NOT_PRESERVED                           -
                              ENTRY_PRESERVED                               -
               VA_tag_I1 = bits 31 from 20 of Virtual address               -
               VA_tag_I2 = bits 19 from 10 of Virtual address               -
 RETURN VALUE: None.                                                        -
 LIMITATIONS : None.                                                        -
-----------------------------------------------------------------------------
*/
#define Set_CAM_Entry(mmu_name, slst_bit, p_bit, VA_tag_I2, VA_tag_I1) \
{ \
    switch(mmu_name) \
    { \
    case HSAB_MMU : \
      { \
       CAM_H_REG_HSAB = (VA_tag_I1 >> 2); \
       CAM_L_REG_HSAB = (slst_bit | (p_bit << 3) | (VA_tag_I2 << 4) | \
                         ((VA_tag_I1 & 0x0003) << 14) ); break; \
      } \
    case LB_MMU : \
      { \
       CAM_H_REG_LOCAL_BUS = (VA_tag_I1 >> 2); \
       CAM_L_REG_LOCAL_BUS = (slst_bit | (p_bit << 3) | (VA_tag_I2 << 4) | \
                             ((VA_tag_I1 & 0x0003) << 14) ); break; \
      } \
    case DSP_MMU : \
      { \
       CAM_H_REG_DSP = (VA_tag_I1 >> 2); \
       CAM_L_REG_DSP = (slst_bit | (p_bit << 3) | (VA_tag_I2 << 4) | \
                         ((VA_tag_I1 & 0x0003) << 14) ); break; \
      } \
    } \
}
  
/*
-----------------------------------------------------------------------------
 NAME        : Set_RAM_Entry                                                -
 DESCRIPTION : Set RAM_L_REG and RAM_H_REG                                  -
 SYNOPSYS    : void Set_RAM_Entry (MMU_NAME_t mmu_name                      -
                                   UWORD32 physical_address,                -
                                   AP_t ap_bits)                            -

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