sossi.h

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

#define            SOSSI_INIT2_RESTART_POS                                                                               1
#define            SOSSI_INIT2_RESTART_NUMB                                                                              1
#define            SOSSI_INIT2_RESTART_RES_VAL                                                                           0x0
//R/W

#define            SOSSI_INIT2_DIFSEL_POS                                                                                0
#define            SOSSI_INIT2_DIFSEL_NUMB                                                                               1
#define            SOSSI_INIT2_DIFSEL_RES_VAL                                                                            0x0
//R/W


//SOSSI_INIT3
//-------------------
#define            SOSSI_INIT3                                                                                         REG32(SOSSI_BASE_ADDR_ARM+SOSSI_INIT3_OFFSET)


#define            SOSSI_INIT3_RESERVED_POS                                                                              10
#define            SOSSI_INIT3_RESERVED_NUMB                                                                             22
#define            SOSSI_INIT3_RESERVED_RES_VAL                                                                          0x0
//R

#define            SOSSI_INIT3_DBPC_POS                                                                                  5
#define            SOSSI_INIT3_DBPC_NUMB                                                                                 5
#define            SOSSI_INIT3_DBPC_RES_VAL                                                                              0x02
//R/W

#define            SOSSI_INIT3_DBPW_POS                                                                                  0
#define            SOSSI_INIT3_DBPW_NUMB                                                                                 5
#define            SOSSI_INIT3_DBPW_RES_VAL                                                                              0x07
//R/W


//SOSSI_FIFO
//-------------------
#define            SOSSI_FIFO                                                                                          REG32(SOSSI_BASE_ADDR_ARM+SOSSI_FIFO_OFFSET)


#define            SOSSI_FIFO_FIFO_POS                                                                                   0
#define            SOSSI_FIFO_FIFO_NUMB                                                                                  32
#define            SOSSI_FIFO_FIFO_RES_VAL                                                                               0x0
//R/W


//SOSSI_REOTABLE
//-------------------
#define            SOSSI_REOTABLE                                                                                      REG32(SOSSI_BASE_ADDR_ARM+SOSSI_REOTABLE_OFFSET)


#define            SOSSI_REOTABLE_TABLE_POS                                                                              0
#define            SOSSI_REOTABLE_TABLE_NUMB                                                                             32
#define            SOSSI_REOTABLE_TABLE_RES_VAL                                                                          0x0
//R/W


//SOSSI_TEARING
//-------------------
#define            SOSSI_TEARING                                                                                       REG32(SOSSI_BASE_ADDR_ARM+SOSSI_TEARING_OFFSET)


#define            SOSSI_TEARING_VS_COUNTER_POS                                                                          30
#define            SOSSI_TEARING_VS_COUNTER_NUMB                                                                         2
#define            SOSSI_TEARING_VS_COUNTER_RES_VAL                                                                      0x0
//R/W

#define            SOSSI_TEARING_HS_INVERTED_POS                                                                         29
#define            SOSSI_TEARING_HS_INVERTED_NUMB                                                                        1
#define            SOSSI_TEARING_HS_INVERTED_RES_VAL                                                                     0x0
//R/W

#define            SOSSI_TEARING_VS_INVERTED_POS                                                                         28
#define            SOSSI_TEARING_VS_INVERTED_NUMB                                                                        1
#define            SOSSI_TEARING_VS_INVERTED_RES_VAL                                                                     0x0
//R/W

#define            SOSSI_TEARING_MODE_POS                                                                                26
#define            SOSSI_TEARING_MODE_NUMB                                                                               2
#define            SOSSI_TEARING_MODE_RES_VAL                                                                            0x0
//R/W

#define            SOSSI_TEARING_COUNTER_MATCH_POS                                                                       15
#define            SOSSI_TEARING_COUNTER_MATCH_NUMB                                                                      11
#define            SOSSI_TEARING_COUNTER_MATCH_RES_VAL                                                                   0x0
//R/W

#define            SOSSI_TEARING_DETECT_LIMIT_POS                                                                        3
#define            SOSSI_TEARING_DETECT_LIMIT_NUMB                                                                       12
#define            SOSSI_TEARING_DETECT_LIMIT_RES_VAL                                                                    0x0
//R/W

#define            SOSSI_TEARING_PULSEDETECT_LIMIT_POS                                                                   0
#define            SOSSI_TEARING_PULSEDETECT_LIMIT_NUMB                                                                  3
#define            SOSSI_TEARING_PULSEDETECT_LIMIT_RES_VAL                                                               0x0
//R/W


//SOSSI_INIT1B
//-------------------
#define            SOSSI_INIT1B                                                                                        REG32(SOSSI_BASE_ADDR_ARM+SOSSI_INIT1B_OFFSET)


#define            SOSSI_INIT1B_RESERVED_POS                                                                             20
#define            SOSSI_INIT1B_RESERVED_NUMB                                                                            12
#define            SOSSI_INIT1B_RESERVED_RES_VAL                                                                         0x0
//R

#define            SOSSI_INIT1B_REORDERING_POS                                                                           19
#define            SOSSI_INIT1B_REORDERING_NUMB                                                                          1
#define            SOSSI_INIT1B_REORDERING_RES_VAL                                                                       0x0
//R/W

#define            SOSSI_INIT1B_TYPE_POS                                                                                 18
#define            SOSSI_INIT1B_TYPE_NUMB                                                                                1
#define            SOSSI_INIT1B_TYPE_RES_VAL                                                                             0x0
//R/W

#define            SOSSI_INIT1B_NUMBER_POS                                                                               0
#define            SOSSI_INIT1B_NUMBER_NUMB                                                                              18
#define            SOSSI_INIT1B_NUMBER_RES_VAL                                                                           0x0
//R/W


//SOSSI_FIFOB
//-------------------
#define            SOSSI_FIFOB                                                                                         REG32(SOSSI_BASE_ADDR_ARM+SOSSI_FIFOB_OFFSET)


#define            SOSSI_FIFOB_FIFOB_POS                                                                                 0
#define            SOSSI_FIFOB_FIFOB_NUMB                                                                                32
#define            SOSSI_FIFOB_FIFOB_RES_VAL                                                                             0x0
//W

#endif