bcm.h
来自「OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI」· C头文件 代码 · 共 814 行 · 第 1/3 页
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#define BCM_BIST4_CTRL_STS_DONE_4_RES_VAL 0x0
//R
#define BCM_BIST4_CTRL_STS_FAIL_4_POS 2
#define BCM_BIST4_CTRL_STS_FAIL_4_NUMB 1
#define BCM_BIST4_CTRL_STS_FAIL_4_RES_VAL 0x0
//R
#define BCM_BIST4_CTRL_STS_BM_4_POS 1
#define BCM_BIST4_CTRL_STS_BM_4_NUMB 1
#define BCM_BIST4_CTRL_STS_BM_4_RES_VAL 0x0
//R/W
#define BCM_BIST4_CTRL_STS_EN_4_POS 0
#define BCM_BIST4_CTRL_STS_EN_4_NUMB 1
#define BCM_BIST4_CTRL_STS_EN_4_RES_VAL 0x0
//R/W
//BCM_BIST5_CTRL_STS
//-------------------
#define BCM_BIST5_CTRL_STS REG32(BCM_BASE_ADDR_ARM+BCM_BIST5_CTRL_STS_OFFSET)
#define BCM_BIST5_CTRL_STS_RESERVED_POS 4
#define BCM_BIST5_CTRL_STS_RESERVED_NUMB 28
#define BCM_BIST5_CTRL_STS_RESERVED_RES_VAL 0x0
//R
#define BCM_BIST5_CTRL_STS_DONE_5_POS 3
#define BCM_BIST5_CTRL_STS_DONE_5_NUMB 1
#define BCM_BIST5_CTRL_STS_DONE_5_RES_VAL 0x0
//R
#define BCM_BIST5_CTRL_STS_FAIL_5_POS 2
#define BCM_BIST5_CTRL_STS_FAIL_5_NUMB 1
#define BCM_BIST5_CTRL_STS_FAIL_5_RES_VAL 0x0
//R
#define BCM_BIST5_CTRL_STS_BM_5_POS 1
#define BCM_BIST5_CTRL_STS_BM_5_NUMB 1
#define BCM_BIST5_CTRL_STS_BM_5_RES_VAL 0x0
//R/W
#define BCM_BIST5_CTRL_STS_EN_5_POS 0
#define BCM_BIST5_CTRL_STS_EN_5_NUMB 1
#define BCM_BIST5_CTRL_STS_EN_5_RES_VAL 0x0
//R/W
//BCM_BIST6_CTRL_STS
//-------------------
#define BCM_BIST6_CTRL_STS REG32(BCM_BASE_ADDR_ARM+BCM_BIST6_CTRL_STS_OFFSET)
#define BCM_BIST6_CTRL_STS_RESERVED_POS 4
#define BCM_BIST6_CTRL_STS_RESERVED_NUMB 28
#define BCM_BIST6_CTRL_STS_RESERVED_RES_VAL 0x0
//R
#define BCM_BIST6_CTRL_STS_DONE_6_POS 3
#define BCM_BIST6_CTRL_STS_DONE_6_NUMB 1
#define BCM_BIST6_CTRL_STS_DONE_6_RES_VAL 0x1
//R
#define BCM_BIST6_CTRL_STS_FAIL_6_POS 2
#define BCM_BIST6_CTRL_STS_FAIL_6_NUMB 1
#define BCM_BIST6_CTRL_STS_FAIL_6_RES_VAL 0x0
//R
#define BCM_BIST6_CTRL_STS_BM_6_POS 1
#define BCM_BIST6_CTRL_STS_BM_6_NUMB 1
#define BCM_BIST6_CTRL_STS_BM_6_RES_VAL 0x0
//R/W
#define BCM_BIST6_CTRL_STS_EN_6_POS 0
#define BCM_BIST6_CTRL_STS_EN_6_NUMB 1
#define BCM_BIST6_CTRL_STS_EN_6_RES_VAL 0x0
//R/W
//BCM_BIST7_CTRL_STS
//-------------------
#define BCM_BIST7_CTRL_STS REG32(BCM_BASE_ADDR_ARM+BCM_BIST7_CTRL_STS_OFFSET)
#define BCM_BIST7_CTRL_STS_RESERVED_POS 4
#define BCM_BIST7_CTRL_STS_RESERVED_NUMB 28
#define BCM_BIST7_CTRL_STS_RESERVED_RES_VAL 0x0
//R
#define BCM_BIST7_CTRL_STS_DONE_7_POS 3
#define BCM_BIST7_CTRL_STS_DONE_7_NUMB 1
#define BCM_BIST7_CTRL_STS_DONE_7_RES_VAL 0x0
//R
#define BCM_BIST7_CTRL_STS_FAIL_7_POS 2
#define BCM_BIST7_CTRL_STS_FAIL_7_NUMB 1
#define BCM_BIST7_CTRL_STS_FAIL_7_RES_VAL 0x0
//R
#define BCM_BIST7_CTRL_STS_BM_7_POS 1
#define BCM_BIST7_CTRL_STS_BM_7_NUMB 1
#define BCM_BIST7_CTRL_STS_BM_7_RES_VAL 0x0
//R/W
#define BCM_BIST7_CTRL_STS_EN_7_POS 0
#define BCM_BIST7_CTRL_STS_EN_7_NUMB 1
#define BCM_BIST7_CTRL_STS_EN_7_RES_VAL 0x0
//R/W
//BCM_BIST8_CTRL_STS
//-------------------
#define BCM_BIST8_CTRL_STS REG32(BCM_BASE_ADDR_ARM+BCM_BIST8_CTRL_STS_OFFSET)
#define BCM_BIST8_CTRL_STS_RESERVED_POS 4
#define BCM_BIST8_CTRL_STS_RESERVED_NUMB 28
#define BCM_BIST8_CTRL_STS_RESERVED_RES_VAL 0x0
//R
#define BCM_BIST8_CTRL_STS_DONE_8_POS 3
#define BCM_BIST8_CTRL_STS_DONE_8_NUMB 1
#define BCM_BIST8_CTRL_STS_DONE_8_RES_VAL 0x0
//R
#define BCM_BIST8_CTRL_STS_FAIL_8_POS 2
#define BCM_BIST8_CTRL_STS_FAIL_8_NUMB 1
#define BCM_BIST8_CTRL_STS_FAIL_8_RES_VAL 0x0
//R
#define BCM_BIST8_CTRL_STS_BM_8_POS 1
#define BCM_BIST8_CTRL_STS_BM_8_NUMB 1
#define BCM_BIST8_CTRL_STS_BM_8_RES_VAL 0x0
//R/W
#define BCM_BIST8_CTRL_STS_EN_8_POS 0
#define BCM_BIST8_CTRL_STS_EN_8_NUMB 1
#define BCM_BIST8_CTRL_STS_EN_8_RES_VAL 0x0
//R/W
//BCM_BIST9_CTRL_STS
//-------------------
#define BCM_BIST9_CTRL_STS REG32(BCM_BASE_ADDR_ARM+BCM_BIST9_CTRL_STS_OFFSET)
#define BCM_BIST9_CTRL_STS_RESERVED_POS 4
#define BCM_BIST9_CTRL_STS_RESERVED_NUMB 28
#define BCM_BIST9_CTRL_STS_RESERVED_RES_VAL 0x0
//R
#define BCM_BIST9_CTRL_STS_DONE_9_POS 3
#define BCM_BIST9_CTRL_STS_DONE_9_NUMB 1
#define BCM_BIST9_CTRL_STS_DONE_9_RES_VAL 0x0
//R
#define BCM_BIST9_CTRL_STS_FAIL_9_POS 2
#define BCM_BIST9_CTRL_STS_FAIL_9_NUMB 1
#define BCM_BIST9_CTRL_STS_FAIL_9_RES_VAL 0x0
//R
#define BCM_BIST9_CTRL_STS_BM_9_POS 1
#define BCM_BIST9_CTRL_STS_BM_9_NUMB 1
#define BCM_BIST9_CTRL_STS_BM_9_RES_VAL 0x0
//R/W
#define BCM_BIST9_CTRL_STS_EN_9_POS 0
#define BCM_BIST9_CTRL_STS_EN_9_NUMB 1
#define BCM_BIST9_CTRL_STS_EN_9_RES_VAL 0x0
//R/W
//BCM_BIST10_CTRL_STS
//-------------------
#define BCM_BIST10_CTRL_STS REG32(BCM_BASE_ADDR_ARM+BCM_BIST10_CTRL_STS_OFFSET)
#define BCM_BIST10_CTRL_STS_RESERVED_POS 4
#define BCM_BIST10_CTRL_STS_RESERVED_NUMB 28
#define BCM_BIST10_CTRL_STS_RESERVED_RES_VAL 0x0
//R
#define BCM_BIST10_CTRL_STS_DONE_10_POS 3
#define BCM_BIST10_CTRL_STS_DONE_10_NUMB 1
#define BCM_BIST10_CTRL_STS_DONE_10_RES_VAL 0x1
//R
#define BCM_BIST10_CTRL_STS_FAIL_10_POS 2
#define BCM_BIST10_CTRL_STS_FAIL_10_NUMB 1
#define BCM_BIST10_CTRL_STS_FAIL_10_RES_VAL 0x0
//R
#define BCM_BIST10_CTRL_STS_BM_10_POS 1
#define BCM_BIST10_CTRL_STS_BM_10_NUMB 1
#define BCM_BIST10_CTRL_STS_BM_10_RES_VAL 0x0
//R/W
#define BCM_BIST10_CTRL_STS_EN_10_POS 0
#define BCM_BIST10_CTRL_STS_EN_10_NUMB 1
#define BCM_BIST10_CTRL_STS_EN_10_RES_VAL 0x0
//R/W
//BCM_BIST11_CTRL_STS
//-------------------
#define BCM_BIST11_CTRL_STS REG32(BCM_BASE_ADDR_ARM+BCM_BIST11_CTRL_STS_OFFSET)
#define BCM_BIST11_CTRL_STS_RESERVED_POS 4
#define BCM_BIST11_CTRL_STS_RESERVED_NUMB 28
#define BCM_BIST11_CTRL_STS_RESERVED_RES_VAL 0x0
//R
#define BCM_BIST11_CTRL_STS_DONE_11_POS 3
#define BCM_BIST11_CTRL_STS_DONE_11_NUMB 1
#define BCM_BIST11_CTRL_STS_DONE_11_RES_VAL 0x0
//R
#define BCM_BIST11_CTRL_STS_FAIL_11_POS 2
#define BCM_BIST11_CTRL_STS_FAIL_11_NUMB 1
#define BCM_BIST11_CTRL_STS_FAIL_11_RES_VAL 0x0
//R
#define BCM_BIST11_CTRL_STS_BM_11_POS 1
#define BCM_BIST11_CTRL_STS_BM_11_NUMB 1
#define BCM_BIST11_CTRL_STS_BM_11_RES_VAL 0x0
//R/W
#define BCM_BIST11_CTRL_STS_EN_11_POS 0
#define BCM_BIST11_CTRL_STS_EN_11_NUMB 1
#define BCM_BIST11_CTRL_STS_EN_11_RES_VAL 0x0
//R/W
//BCM_BIST12_CTRL_STS
//-------------------
#define BCM_BIST12_CTRL_STS REG32(BCM_BASE_ADDR_ARM+BCM_BIST12_CTRL_STS_OFFSET)
#define BCM_BIST12_CTRL_STS_RESERVED_POS 4
#define BCM_BIST12_CTRL_STS_RESERVED_NUMB 28
#define BCM_BIST12_CTRL_STS_RESERVED_RES_VAL 0x0
//R
#define BCM_BIST12_CTRL_STS_DONE_12_POS 3
#define BCM_BIST12_CTRL_STS_DONE_12_NUMB 1
#define BCM_BIST12_CTRL_STS_DONE_12_RES_VAL 0x1
//R
#define BCM_BIST12_CTRL_STS_FAIL_12_POS 2
#define BCM_BIST12_CTRL_STS_FAIL_12_NUMB 1
#define BCM_BIST12_CTRL_STS_FAIL_12_RES_VAL 0x0
//R
#define BCM_BIST12_CTRL_STS_BM_12_POS 1
#define BCM_BIST12_CTRL_STS_BM_12_NUMB 1
#define BCM_BIST12_CTRL_STS_BM_12_RES_VAL 0x0
//R/W
#define BCM_BIST12_CTRL_STS_EN_12_POS 0
#define BCM_BIST12_CTRL_STS_EN_12_NUMB 1
#define BCM_BIST12_CTRL_STS_EN_12_RES_VAL 0x0
//R/W
#endif
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