⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 elcd.h

📁 OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器
💻 H
📖 第 1 页 / 共 5 页
字号:
} ELCD_write_edge_t;












//Register Offset
//-------------------
#define            ELCD_CONTROL_REG_OFFSET                                                                             0x00
#define            ELCD_ONOFFTIME_REG_OFFSET                                                                           0x04
#define            ELCD_DMAIT_REG_OFFSET                                                                               0x08
#define            ELCD_TE_REG_OFFSET                                                                                  0x0C
#define            ELCD_ELCDCTL_REG_OFFSET                                                                             0x10
#define            ELCD_CMDTX_REG_OFFSET                                                                               0x14
#define            ELCD_DATATX_REG_OFFSET                                                                              0x18
#define            ELCD_COUNTERRX_REG_OFFSET                                                                           0x1C
#define            ELCD_DATARX_REG_OFFSET                                                                              0x20
#define            ELCD_STATUS_REG_OFFSET                                                                              0x24
#define            ELCD_PIXELPOS_REG_OFFSET                                                                            0x28
#define            ELCD_CYCLE1_REG1_OFFSET                                                                             0x2C
#define            ELCD_CYCLE1_REG2_OFFSET                                                                             0x30
#define            ELCD_CYCLE1_REG3_OFFSET                                                                             0x34
#define            ELCD_CYCLE1_REG4_OFFSET                                                                             0x38
#define            ELCD_CYCLE1_REG5_OFFSET                                                                             0x3C
#define            ELCD_CYCLE2_REG1_OFFSET                                                                             0x40
#define            ELCD_CYCLE2_REG2_OFFSET                                                                             0x44
#define            ELCD_CYCLE2_REG3_OFFSET                                                                             0x48
#define            ELCD_CYCLE3_REG1_OFFSET                                                                             0x4C
#define            ELCD_CYCLE3_REG2_OFFSET                                                                             0x50
#define            ELCD_REVNB_REG_OFFSET                                                                               0x54
#define            ELCD_COUNTERTX_REG_OFFSET                                                                           0x58





//ELCD_CONTROL_REG
//-------------------
#define            ELCD_CONTROL_REG                                                                                    REG32(ELCD_BASE_ADDR_ARM+ELCD_CONTROL_REG_OFFSET)


#define            ELCD_CONTROL_REG_RESERVED_POS                                                                         4
#define            ELCD_CONTROL_REG_RESERVED_NUMB                                                                        28
#define            ELCD_CONTROL_REG_RESERVED_RES_VAL                                                                     0x0
//R/W

#define            ELCD_CONTROL_REG_DMALCD_WU_POS                                                                        3
#define            ELCD_CONTROL_REG_DMALCD_WU_NUMB                                                                       1
#define            ELCD_CONTROL_REG_DMALCD_WU_RES_VAL                                                                    0x0
//R/W

#define            ELCD_CONTROL_REG_MODE_POS                                                                             2
#define            ELCD_CONTROL_REG_MODE_NUMB                                                                            1
#define            ELCD_CONTROL_REG_MODE_RES_VAL                                                                         0x0
//R/W

#define            ELCD_CONTROL_REG_POWER_SAVING_POS                                                                     1
#define            ELCD_CONTROL_REG_POWER_SAVING_NUMB                                                                    1
#define            ELCD_CONTROL_REG_POWER_SAVING_RES_VAL                                                                 0x0
//R/W

#define            ELCD_CONTROL_REG_SOFT_RESET_POS                                                                       0
#define            ELCD_CONTROL_REG_SOFT_RESET_NUMB                                                                      1
#define            ELCD_CONTROL_REG_SOFT_RESET_RES_VAL                                                                   0x0
//R/W


//ELCD_ONOFFTIME_REG
//-------------------
#define            ELCD_ONOFFTIME_REG                                                                                  REG32(ELCD_BASE_ADDR_ARM+ELCD_ONOFFTIME_REG_OFFSET)


#define            ELCD_ONOFFTIME_REG_PRESCALER_POS                                                                      26
#define            ELCD_ONOFFTIME_REG_PRESCALER_NUMB                                                                     6
#define            ELCD_ONOFFTIME_REG_PRESCALER_RES_VAL                                                                  0x1
//R/W

#define            ELCD_ONOFFTIME_REG_RON_POLARITY_POS                                                                   25
#define            ELCD_ONOFFTIME_REG_RON_POLARITY_NUMB                                                                  1
#define            ELCD_ONOFFTIME_REG_RON_POLARITY_RES_VAL                                                               0x0
//R/W

#define            ELCD_ONOFFTIME_REG_WON_POLARITY_POS                                                                   24
#define            ELCD_ONOFFTIME_REG_WON_POLARITY_NUMB                                                                  1
#define            ELCD_ONOFFTIME_REG_WON_POLARITY_RES_VAL                                                               0x0
//R/W

#define            ELCD_ONOFFTIME_REG_WEDGE_POS                                                                          23
#define            ELCD_ONOFFTIME_REG_WEDGE_NUMB                                                                         1
#define            ELCD_ONOFFTIME_REG_WEDGE_RES_VAL                                                                      0x0
//R/W

#define            ELCD_ONOFFTIME_REG_READ_OFF_POS                                                                       18
#define            ELCD_ONOFFTIME_REG_READ_OFF_NUMB                                                                      4
#define            ELCD_ONOFFTIME_REG_READ_OFF_RES_VAL                                                                   0x0
//R/W

#define            ELCD_ONOFFTIME_REG_READ_ON_POS                                                                        12
#define            ELCD_ONOFFTIME_REG_READ_ON_NUMB                                                                       4
#define            ELCD_ONOFFTIME_REG_READ_ON_RES_VAL                                                                    0x0
//R/W

#define            ELCD_ONOFFTIME_REG_WRITE_OFF_POS                                                                      6
#define            ELCD_ONOFFTIME_REG_WRITE_OFF_NUMB                                                                     4
#define            ELCD_ONOFFTIME_REG_WRITE_OFF_RES_VAL                                                                  0x0
//R/W

#define            ELCD_ONOFFTIME_REG_WRITE_ON_POS                                                                       0
#define            ELCD_ONOFFTIME_REG_WRITE_ON_NUMB                                                                      4
#define            ELCD_ONOFFTIME_REG_WRITE_ON_RES_VAL                                                                   0x0
//R/W


//ELCD_DMAIT_REG
//-------------------
#define            ELCD_DMAIT_REG                                                                                      REG32(ELCD_BASE_ADDR_ARM+ELCD_DMAIT_REG_OFFSET)


#define            ELCD_DMAIT_REG_RESERVED_POS                                                                           11
#define            ELCD_DMAIT_REG_RESERVED_NUMB                                                                          21
#define            ELCD_DMAIT_REG_RESERVED_RES_VAL                                                                       0x0
//R/W

#define            ELCD_DMAIT_REG_RXFIFO_THRESHOLD_POS                                                                   8
#define            ELCD_DMAIT_REG_RXFIFO_THRESHOLD_NUMB                                                                  3
#define            ELCD_DMAIT_REG_RXFIFO_THRESHOLD_RES_VAL                                                               0x0
//R/W

#define            ELCD_DMAIT_REG_TXFIFO_THRESHOLD_POS                                                                   5
#define            ELCD_DMAIT_REG_TXFIFO_THRESHOLD_NUMB                                                                  3
#define            ELCD_DMAIT_REG_TXFIFO_THRESHOLD_RES_VAL                                                               0x0
//R/W

#define            ELCD_DMAIT_REG_IT_RX_EN_POS                                                                           4
#define            ELCD_DMAIT_REG_IT_RX_EN_NUMB                                                                          1
#define            ELCD_DMAIT_REG_IT_RX_EN_RES_VAL                                                                       0x0
//R/W

#define            ELCD_DMAIT_REG_IT_TX_EN_POS                                                                           3
#define            ELCD_DMAIT_REG_IT_TX_EN_NUMB                                                                          1
#define            ELCD_DMAIT_REG_IT_TX_EN_RES_VAL                                                                       0x0
//R/W

#define            ELCD_DMAIT_REG_DMA_RX_EN_POS                                                                          2
#define            ELCD_DMAIT_REG_DMA_RX_EN_NUMB                                                                         1
#define            ELCD_DMAIT_REG_DMA_RX_EN_RES_VAL                                                                      0x0
//R/W

#define            ELCD_DMAIT_REG_DMA_TX_EN_POS                                                                          1
#define            ELCD_DMAIT_REG_DMA_TX_EN_NUMB                                                                         1
#define            ELCD_DMAIT_REG_DMA_TX_EN_RES_VAL                                                                      0x0
//R/W

#define            ELCD_DMAIT_REG_TX_MODE_POS                                                                            0
#define            ELCD_DMAIT_REG_TX_MODE_NUMB                                                                           1
#define            ELCD_DMAIT_REG_TX_MODE_RES_VAL                                                                        0x0
//R/W


//ELCD_TE_REG
//-------------------
#define            ELCD_TE_REG                                                                                         REG32(ELCD_BASE_ADDR_ARM+ELCD_TE_REG_OFFSET)


#define            ELCD_TE_REG_RESERVED_POS                                                                              31
#define            ELCD_TE_REG_RESERVED_NUMB                                                                             1
#define            ELCD_TE_REG_RESERVED_RES_VAL                                                                          0x0
//R/W

#define            ELCD_TE_REG_VS_COUNTER_POS                                                                            29
#define            ELCD_TE_REG_VS_COUNTER_NUMB                                                                           2
#define            ELCD_TE_REG_VS_COUNTER_RES_VAL                                                                        0x0
//R/W

#define            ELCD_TE_REG_TE_INVERTED_POS                                                                           28
#define            ELCD_TE_REG_TE_INVERTED_NUMB                                                                          1
#define            ELCD_TE_REG_TE_INVERTED_RES_VAL                                                                       0x0
//R/W

#define            ELCD_TE_REG_MODE_POS                                                                                  26
#define            ELCD_TE_REG_MODE_NUMB                                                                                 2
#define            ELCD_TE_REG_MODE_RES_VAL                                                                              0x0
//R/W

#define            ELCD_TE_REG_HS_MATCH_POS                                                                              15
#define            ELCD_TE_REG_HS_MATCH_NUMB                                                                             11
#define            ELCD_TE_REG_HS_MATCH_RES_VAL                                                                          0x0
//R/W

#define            ELCD_TE_REG_VS_DETECT_POS                                                                             3
#define            ELCD_TE_REG_VS_DETECT_NUMB                                                                            12
#define            ELCD_TE_REG_VS_DETECT_RES_VAL                                                                         0x0
//R/W

#define            ELCD_TE_REG_PULSE_DETECT_POS                                                                          0
#define            ELCD_TE_REG_PULSE_DETECT_NUMB                                                                         3
#define            ELCD_TE_REG_PULSE_DETECT_RES_VAL                                                                      0x0
//R/W


//ELCD_ELCDCTL_REG
//-------------------
#define            ELCD_ELCDCTL_REG                                                                                    REG32(ELCD_BASE_ADDR_ARM+ELCD_ELCDCTL_REG_OFFSET)

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -