dualmodetimer2.h

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

//R/W


//DUALMODETIMER2_TISTAT

#endif /* DSP_ACCESS */


#ifndef DSP_ACCESS
#define            DUALMODETIMER2_TISTAT_16_0                                                                          REG16(DUALMODETIMER2_BASE_ADDR_ARM+DUALMODETIMER2_TISTAT_OFFSET*coeff16_arm+0)
#else
#define            DUALMODETIMER2_TISTAT_16_0                                                                          REG16(DUALMODETIMER2_BASE_ADDR_DSP+DUALMODETIMER2_TISTAT_OFFSET)
#endif


#define            DUALMODETIMER2_TISTAT_16_0_RESETDONE_POS                                                              0
#define            DUALMODETIMER2_TISTAT_16_0_RESETDONE_NUMB                                                             1
#define            DUALMODETIMER2_TISTAT_16_0_RESETDONE_RES_VAL                                                          0x1
//R



#ifndef DSP_ACCESS
#define            DUALMODETIMER2_TISTAT_16_2                                                                          REG16(DUALMODETIMER2_BASE_ADDR_ARM+DUALMODETIMER2_TISTAT_OFFSET*coeff16_arm+2)
#else
#define            DUALMODETIMER2_TISTAT_16_2                                                                          REG16(DUALMODETIMER2_BASE_ADDR_DSP+DUALMODETIMER2_TISTAT_OFFSET+1)
#endif


#define            DUALMODETIMER2_TISTAT_16_2_RESETDONE_POS                                                              0
#define            DUALMODETIMER2_TISTAT_16_2_RESETDONE_NUMB                                                             1
#define            DUALMODETIMER2_TISTAT_16_2_RESETDONE_RES_VAL                                                          0x1

#ifndef DSP_ACCESS

#define            DUALMODETIMER2_TISTAT_32                                                                            REG32(DUALMODETIMER2_BASE_ADDR_ARM+DUALMODETIMER2_TISTAT_OFFSET*coeff32_arm)


#define            DUALMODETIMER2_TISTAT_32_RESETDONE_POS                                                                0
#define            DUALMODETIMER2_TISTAT_32_RESETDONE_NUMB                                                               1
#define            DUALMODETIMER2_TISTAT_32_RESETDONE_RES_VAL                                                            0x1
//R


//DUALMODETIMER2_TISR

#endif /* DSP_ACCESS */


#ifndef DSP_ACCESS
#define            DUALMODETIMER2_TISR_16_0                                                                            REG16(DUALMODETIMER2_BASE_ADDR_ARM+DUALMODETIMER2_TISR_OFFSET*coeff16_arm+0)
#else
#define            DUALMODETIMER2_TISR_16_0                                                                            REG16(DUALMODETIMER2_BASE_ADDR_DSP+DUALMODETIMER2_TISR_OFFSET)
#endif


#define            DUALMODETIMER2_TISR_16_0_TCAR_IT_FLAG_POS                                                             2
#define            DUALMODETIMER2_TISR_16_0_TCAR_IT_FLAG_NUMB                                                            1
#define            DUALMODETIMER2_TISR_16_0_TCAR_IT_FLAG_RES_VAL                                                         0x0
//R/W

#define            DUALMODETIMER2_TISR_16_0_OVF_IT_FLAG_POS                                                              1
#define            DUALMODETIMER2_TISR_16_0_OVF_IT_FLAG_NUMB                                                             1
#define            DUALMODETIMER2_TISR_16_0_OVF_IT_FLAG_RES_VAL                                                          0x0
//R/W

#define            DUALMODETIMER2_TISR_16_0_MAT_IT_FLAG_POS                                                              0
#define            DUALMODETIMER2_TISR_16_0_MAT_IT_FLAG_NUMB                                                             1
#define            DUALMODETIMER2_TISR_16_0_MAT_IT_FLAG_RES_VAL                                                          0x0
//R/W



#ifndef DSP_ACCESS
#define            DUALMODETIMER2_TISR_16_2                                                                            REG16(DUALMODETIMER2_BASE_ADDR_ARM+DUALMODETIMER2_TISR_OFFSET*coeff16_arm+2)
#else
#define            DUALMODETIMER2_TISR_16_2                                                                            REG16(DUALMODETIMER2_BASE_ADDR_DSP+DUALMODETIMER2_TISR_OFFSET+1)
#endif


#define            DUALMODETIMER2_TISR_16_2_TCAR_IT_FLAG_POS                                                             2
#define            DUALMODETIMER2_TISR_16_2_TCAR_IT_FLAG_NUMB                                                            1
#define            DUALMODETIMER2_TISR_16_2_TCAR_IT_FLAG_RES_VAL                                                         0x0
//R/W

#define            DUALMODETIMER2_TISR_16_2_OVF_IT_FLAG_POS                                                              1
#define            DUALMODETIMER2_TISR_16_2_OVF_IT_FLAG_NUMB                                                             1
#define            DUALMODETIMER2_TISR_16_2_OVF_IT_FLAG_RES_VAL                                                          0x0
//R/W

#define            DUALMODETIMER2_TISR_16_2_MAT_IT_FLAG_POS                                                              0
#define            DUALMODETIMER2_TISR_16_2_MAT_IT_FLAG_NUMB                                                             1
#define            DUALMODETIMER2_TISR_16_2_MAT_IT_FLAG_RES_VAL                                                          0x0

#ifndef DSP_ACCESS

#define            DUALMODETIMER2_TISR_32                                                                              REG32(DUALMODETIMER2_BASE_ADDR_ARM+DUALMODETIMER2_TISR_OFFSET*coeff32_arm)


#define            DUALMODETIMER2_TISR_32_TCAR_IT_FLAG_POS                                                               2
#define            DUALMODETIMER2_TISR_32_TCAR_IT_FLAG_NUMB                                                              1
#define            DUALMODETIMER2_TISR_32_TCAR_IT_FLAG_RES_VAL                                                           0x0
//R/W

#define            DUALMODETIMER2_TISR_32_OVF_IT_FLAG_POS                                                                1
#define            DUALMODETIMER2_TISR_32_OVF_IT_FLAG_NUMB                                                               1
#define            DUALMODETIMER2_TISR_32_OVF_IT_FLAG_RES_VAL                                                            0x0
//R/W

#define            DUALMODETIMER2_TISR_32_MAT_IT_FLAG_POS                                                                0
#define            DUALMODETIMER2_TISR_32_MAT_IT_FLAG_NUMB                                                               1
#define            DUALMODETIMER2_TISR_32_MAT_IT_FLAG_RES_VAL                                                            0x0
//R/W


//DUALMODETIMER2_TIER

#endif /* DSP_ACCESS */


#ifndef DSP_ACCESS
#define            DUALMODETIMER2_TIER_16_0                                                                            REG16(DUALMODETIMER2_BASE_ADDR_ARM+DUALMODETIMER2_TIER_OFFSET*coeff16_arm+0)
#else
#define            DUALMODETIMER2_TIER_16_0                                                                            REG16(DUALMODETIMER2_BASE_ADDR_DSP+DUALMODETIMER2_TIER_OFFSET)
#endif


#define            DUALMODETIMER2_TIER_16_0_TCAR_IT_ENA_POS                                                              2
#define            DUALMODETIMER2_TIER_16_0_TCAR_IT_ENA_NUMB                                                             1
#define            DUALMODETIMER2_TIER_16_0_TCAR_IT_ENA_RES_VAL                                                          0x0
//R/W

#define            DUALMODETIMER2_TIER_16_0_OVF_IT_ENA_POS                                                               1
#define            DUALMODETIMER2_TIER_16_0_OVF_IT_ENA_NUMB                                                              1
#define            DUALMODETIMER2_TIER_16_0_OVF_IT_ENA_RES_VAL                                                           0x0
//R/W

#define            DUALMODETIMER2_TIER_16_0_MAT_IT_ENA_POS                                                               0
#define            DUALMODETIMER2_TIER_16_0_MAT_IT_ENA_NUMB                                                              1
#define            DUALMODETIMER2_TIER_16_0_MAT_IT_ENA_RES_VAL                                                           0x0
//R/W



#ifndef DSP_ACCESS
#define            DUALMODETIMER2_TIER_16_2                                                                            REG16(DUALMODETIMER2_BASE_ADDR_ARM+DUALMODETIMER2_TIER_OFFSET*coeff16_arm+2)
#else
#define            DUALMODETIMER2_TIER_16_2                                                                            REG16(DUALMODETIMER2_BASE_ADDR_DSP+DUALMODETIMER2_TIER_OFFSET+1)
#endif


#define            DUALMODETIMER2_TIER_16_2_TCAR_IT_ENA_POS                                                              2
#define            DUALMODETIMER2_TIER_16_2_TCAR_IT_ENA_NUMB                                                             1
#define            DUALMODETIMER2_TIER_16_2_TCAR_IT_ENA_RES_VAL                                                          0x0
//R/W

#define            DUALMODETIMER2_TIER_16_2_OVF_IT_ENA_POS                                                               1
#define            DUALMODETIMER2_TIER_16_2_OVF_IT_ENA_NUMB                                                              1
#define            DUALMODETIMER2_TIER_16_2_OVF_IT_ENA_RES_VAL                                                           0x0
//R/W

#define            DUALMODETIMER2_TIER_16_2_MAT_IT_ENA_POS                                                               0
#define            DUALMODETIMER2_TIER_16_2_MAT_IT_ENA_NUMB                                                              1
#define            DUALMODETIMER2_TIER_16_2_MAT_IT_ENA_RES_VAL                                                           0x0

#ifndef DSP_ACCESS

#define            DUALMODETIMER2_TIER_32                                                                              REG32(DUALMODETIMER2_BASE_ADDR_ARM+DUALMODETIMER2_TIER_OFFSET*coeff32_arm)


#define            DUALMODETIMER2_TIER_32_TCAR_IT_ENA_POS                                                                2
#define            DUALMODETIMER2_TIER_32_TCAR_IT_ENA_NUMB                                                               1
#define            DUALMODETIMER2_TIER_32_TCAR_IT_ENA_RES_VAL                                                            0x0
//R/W

#define            DUALMODETIMER2_TIER_32_OVF_IT_ENA_POS                                                                 1
#define            DUALMODETIMER2_TIER_32_OVF_IT_ENA_NUMB                                                                1
#define            DUALMODETIMER2_TIER_32_OVF_IT_ENA_RES_VAL                                                             0x0
//R/W

#define            DUALMODETIMER2_TIER_32_MAT_IT_ENA_POS                                                                 0
#define            DUALMODETIMER2_TIER_32_MAT_IT_ENA_NUMB                                                                1
#define            DUALMODETIMER2_TIER_32_MAT_IT_ENA_RES_VAL                                                             0x0
//R/W


//DUALMODETIMER2_TWER

#endif /* DSP_ACCESS */


#ifndef DSP_ACCESS
#define            DUALMODETIMER2_TWER_16_0                                                                            REG16(DUALMODETIMER2_BASE_ADDR_ARM+DUALMODETIMER2_TWER_OFFSET*coeff16_arm+0)
#else
#define            DUALMODETIMER2_TWER_16_0                                                                            REG16(DUALMODETIMER2_BASE_ADDR_DSP+DUALMODETIMER2_TWER_OFFSET)
#endif