📄 wcdma_ccp.h
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//========================================================================
// TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
// Property of Texas Instruments
// For Unrestricted Internal Use Only
// Unauthorized reproduction and/or distribution is strictly prohibited.
// This product is protected under copyright law and trade secret law
// as an unpublished work
// Created 2001, (C) Copyright 2001 Texas Instruments. All rights reserved
//
//========================================================================
#include "wcdma_mapping.h"
#ifndef _wcdma_ccp__H
#define _wcdma_ccp__H
//Standard Register offset list
#define RW_enable_reg_OFFSET 0xF4
//run_stop_status_0
//-------------------------
#define RW_enable_reg REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+RW_enable_reg_OFFSET) << 2))
//-------------------------
#define CCP_status_OFFSET 0x0001
#define run_stop_status_0_OFFSET 0x0004
#define run_stop_status_1_OFFSET 0x0005
#define run_stop_status_2_OFFSET 0x0006
#define run_stop_status_3_OFFSET 0x0007
#define run_stop_status_4_OFFSET 0x0008
#define run_stop_status_5_OFFSET 0x0009
#define run_stop_status_6_OFFSET 0xA
#define run_stop_status_7_OFFSET 0xB
#define ping_pong_status_0_OFFSET 0xC
#define ping_pong_status_1_OFFSET 0xD
#define ping_pong_status_2_OFFSET 0xE
#define ping_pong_status_3_OFFSET 0xF
#define ping_pong_status_4_OFFSET 0x0010
#define ping_pong_status_5_OFFSET 0x0011
#define ping_pong_status_6_OFFSET 0x0012
#define ping_pong_status_7_OFFSET 0x0013
#define task_command_0_OFFSET 0x0014
#define task_command_1_OFFSET 0x0015
#define task_command_2_OFFSET 0x0016
#define task_command_3_OFFSET 0x0017
#define FIFO_0_status_OFFSET 0x0021
#define FIFO_1_status_OFFSET 0x0022
#define FIFO_2_status_OFFSET 0x0023
#define FIFO_3_status_OFFSET 0x0024
#define Cycle_Count_OFFSET 0x0028
#define Task_Update_Time_Stamp_OFFSET 0x0029
#define Interrupt_Error_Event_Status_OFFSET 0x0180
#define Interrupt_System_Event_Status_OFFSET 0x1C0
#define Task_Request_Bits_0_OFFSET 0x0030
#define Task_Request_Bits_1_OFFSET 0x0031
#define Task_Request_Bits_2_OFFSET 0x0032
#define Task_Request_Bits_3_OFFSET 0x0033
#define Task_Update_Cycle_OFFSET 0xD0
#define PSC_Register_OFFSET 0xD4
#define SSC_Register_OFFSET 0xD8
#define Search_Code_Symbol_Location_OFFSET 0xDC
#define Dedicated_Pilots_Start_Addr_OFFSET 0xDD
#define TPC_Start_Addr_OFFSET 0xDE
#define EOL_Slot_Mask_0_OFFSET 0xE0
#define EOL_Slot_Mask_1_OFFSET 0xE1
#define EOL_Slot_Mask_2_OFFSET 0xE2
#define EOL_Slot_Mask_3_OFFSET 0xE3
#define EOL_Slot_Mask_4_OFFSET 0xE4
#define EOL_Slot_Mask_5_OFFSET 0xE5
#define Long_Code_Test_I_OFFSET 0xF5
#define Long_Code_Test_Q_OFFSET 0xF6
#define Long_Code_Test_Enable_OFFSET 0xF7
#define Walsh_Code_Test_OFFSET 0xF8
#define Walsh_Code_Test_Enable_OFFSET 0xF9
#define PMT_Select_OFFSET 0xFA
#define CCP_Test_Ctrl_OFFSET 0xFB
#define Clock_Definition_OFFSET 0xFE
#define Version_ID_OFFSET 0xFF
//CCP_status
//-------------------------
#define CCP_status REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+CCP_status_OFFSET) << 2))
#define CCP_status_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//run_stop_status_0
//-------------------------
#define run_stop_status_0 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+run_stop_status_0_OFFSET) << 2))
#define run_stop_status_0_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//run_stop_status_1
//-------------------------
#define run_stop_status_1 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+run_stop_status_1_OFFSET) << 2))
#define run_stop_status_1_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//run_stop_status_2
//-------------------------
#define run_stop_status_2 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+run_stop_status_2_OFFSET) << 2))
#define run_stop_status_2_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//run_stop_status_3
//-------------------------
#define run_stop_status_3 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+run_stop_status_3_OFFSET) << 2))
#define run_stop_status_3_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//run_stop_status_4
//-------------------------
#define run_stop_status_4 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+run_stop_status_4_OFFSET) << 2))
#define run_stop_status_4_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//run_stop_status_5
//-------------------------
#define run_stop_status_5 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+run_stop_status_5_OFFSET) << 2))
#define run_stop_status_5_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//run_stop_status_6
//-------------------------
#define run_stop_status_6 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+run_stop_status_6_OFFSET) << 2))
#define run_stop_status_6_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//run_stop_status_7
//-------------------------
#define run_stop_status_7 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+run_stop_status_7_OFFSET) << 2))
#define run_stop_status_7_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//ping_pong_status_0
//-------------------------
#define ping_pong_status_0 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+ping_pong_status_0_OFFSET) << 2))
#define ping_pong_status_0_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//ping_pong_status_1
//-------------------------
#define ping_pong_status_1 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+ping_pong_status_1_OFFSET) << 2))
#define ping_pong_status_1_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//ping_pong_status_2
//-------------------------
#define ping_pong_status_2 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+ping_pong_status_2_OFFSET) << 2))
#define ping_pong_status_2_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//ping_pong_status_3
//-------------------------
#define ping_pong_status_3 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+ping_pong_status_3_OFFSET) << 2))
#define ping_pong_status_3_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//ping_pong_status_4
//-------------------------
#define ping_pong_status_4 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+ping_pong_status_4_OFFSET) << 2))
#define ping_pong_status_4_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//ping_pong_status_5
//-------------------------
#define ping_pong_status_5 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+ping_pong_status_5_OFFSET) << 2))
#define ping_pong_status_5_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//ping_pong_status_6
//-------------------------
#define ping_pong_status_6 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+ping_pong_status_6_OFFSET) << 2))
#define ping_pong_status_6_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//ping_pong_status_7
//-------------------------
#define ping_pong_status_7 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+ping_pong_status_7_OFFSET) << 2))
#define ping_pong_status_7_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//task_command_0
//-------------------------
#define task_command_0 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+task_command_0_OFFSET) << 2))
#define task_command_0_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//task_command_1
//-------------------------
#define task_command_1 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+task_command_1_OFFSET) << 2))
#define task_command_1_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//task_command_2
//-------------------------
#define task_command_2 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+task_command_2_OFFSET) << 2))
#define task_command_2_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//task_command_3
//-------------------------
#define task_command_3 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+task_command_3_OFFSET) << 2))
#define task_command_3_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//FIFO_0_status
//-------------------------
#define FIFO_0_status REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+FIFO_0_status_OFFSET) << 2))
#define FIFO_0_status_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//FIFO_1_status
//-------------------------
#define FIFO_1_status REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+FIFO_1_status_OFFSET) << 2))
#define FIFO_1_status_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//FIFO_2_status
//-------------------------
#define FIFO_2_status REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+FIFO_2_status_OFFSET) << 2))
#define FIFO_2_status_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//FIFO_3_status
//-------------------------
#define FIFO_3_status REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+FIFO_3_status_OFFSET) << 2))
#define FIFO_3_status_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//Cycle_Count
//-------------------------
#define Cycle_Count REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+Cycle_Count_OFFSET) << 2))
#define Cycle_Count_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//Task_Update_Time_Stamp
//-------------------------
#define Task_Update_Time_Stamp REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+Task_Update_Time_Stamp_OFFSET) << 2))
#define Task_Update_Time_Stamp_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//Interrupt_Error_Event_Status
//-------------------------
#define Interrupt_Error_Event_Status REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+Interrupt_Error_Event_Status_OFFSET) << 2))
#define Interrupt_Error_Event_Status_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//Interrupt_System_Event_Status
//-------------------------
#define Interrupt_System_Event_Status REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+Interrupt_System_Event_Status_OFFSET) << 2))
#define Interrupt_System_Event_Status_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//Task_Request_Bits_0
//-------------------------
#define Task_Request_Bits_0 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+Task_Request_Bits_0_OFFSET) << 2))
#define Task_Request_Bits_0_RES_VAL 0x00000000
//R/W
//-------------------------
//Task_Request_Bits_1
//-------------------------
#define Task_Request_Bits_1 REG32(WCDMA_CS_LB+((WCDMA_CCP_BASE_ADDR+Task_Request_Bits_1_OFFSET) << 2))
#define Task_Request_Bits_1_RES_VAL 0x00000000
//R/W
//-------------------------
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