ms.h

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//===============================================================================
//            TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION           
//                                                                             
//   Property of Texas Instruments 
//   For  Unrestricted  Internal  Use  Only 
//   Unauthorized reproduction and/or distribution is strictly prohibited.  
//   This product is protected under copyright law and trade secret law 
//   as an unpublished work.  
//   Created 2000, (C) Copyright 2000 Texas Instruments.  All rights reserved.
//
//   Filename          : ms.h
//
//   Description       : Header file for the memory stick interface module
//
//   Project           : Helen
//  
//   Author            : Hiro UCHIKAWA ([e-mail])
//===============================================================================

#ifndef _MS_H
#define _MS_H

#ifndef _GLOBAL_TYPES_H
#include "global_types.h"
#endif

#include "mem.h"

#define  REGU8(A)	(*(REG_UWORD8*)(A))		
#define  REGU16(A)	(*(REG_UWORD16*)(A))		
#define  REGU32(A)	(*(REG_UWORD32*)(A))		

// Define register offset
#define MS_CMD_REG_OFFSET               0x00
#define MS_STAT_REG_OFFSET              0x04
#define MS_CNTL_REG_OFFSET              0x08
#define MS_I_DATA_REG_OFFSET            0x0C
#define MS_I_CTL_REG_OFFSET             0x10
#define MS_PP_DATA_REG_OFFSET           0x14
#define MS_PP_CTL_REG_OFFSET            0x18
                                      //0x1c reserved 
#define MS_RX_DATA_REG_OFFSET           0x20
#define MS_TX_DATA_REG_OFFSET           0x24
#define MS_FIFO_CTL_REG_OFFSET          0x28
#define MS_FIFO_CNT_REG_OFFSET          0x2c

#define MS_GCM_CLK_REG_OFFSET		0x400
#define MS_GCM_RESET_REG_OFFSET         0x404

// Define register address
#define MS_CMD_REG_SUPERVISOR_ADDR	\
	(MS_SUPERVISOR_ADDR + MS_CMD_REG_OFFSET)
#define MS_STAT_REG_SUPERVISOR_ADDR	\
	(MS_SUPERVISOR_ADDR + MS_STAT_REG_OFFSET)
#define MS_CNTL_REG_SUPERVISOR_ADDR	\
	(MS_SUPERVISOR_ADDR + MS_CNTL_REG_OFFSET)
#define MS_I_DATA_REG_SUPERVISOR_ADDR	\
	(MS_SUPERVISOR_ADDR + MS_I_DATA_REG_OFFSET)
#define MS_I_CTL_REG_SUPERVISOR_ADDR	\
	(MS_SUPERVISOR_ADDR + MS_I_CTL_REG_OFFSET)
#define MS_PP_DATA_REG_SUPERVISOR_ADDR	\
	(MS_SUPERVISOR_ADDR + MS_PP_DATA_REG_OFFSET)
#define MS_PP_CTL_REG_SUPERVISOR_ADDR	\
	(MS_SUPERVISOR_ADDR + MS_PP_CTL_REG_OFFSET)
#define MS_RX_DATA_REG_SUPERVISOR_ADDR	\
	(MS_SUPERVISOR_ADDR + MS_RX_DATA_REG_OFFSET)
#define MS_TX_DATA_REG_SUPERVISOR_ADDR	\
	(MS_SUPERVISOR_ADDR + MS_TX_DATA_REG_OFFSET)
#define MS_FIFO_CTL_REG_SUPERVISOR_ADDR	\
	(MS_SUPERVISOR_ADDR + MS_FIFO_CTL_REG_OFFSET)
#define MS_FIFO_CNT_REG_SUPERVISOR_ADDR	\
	(MS_SUPERVISOR_ADDR + MS_FIFO_CNT_REG_OFFSET)
#define MS_GCM_CLK_REG_SUPERVISOR_ADDR \
	(MS_SUPERVISOR_ADDR + MS_GCM_CLK_REG_OFFSET)
#define MS_GCM_RESET_REG_SUPERVISOR_ADDR \
	(MS_SUPERVISOR_ADDR + MS_GCM_RESET_REG_OFFSET)

// Define register reset value
#define MS_CMD_REG_VALUE_AT_RESET       0x0000
#define MS_STAT_REG_VALUE_AT_RESET      0x003a
#define MS_CNTL_REG_VALUE_AT_RESET	0x0000
#define MS_I_DATA_REG_VALUE_AT_RESET    0x0000
#define MS_I_CTL_REG_VALUE_AT_RESET     0x0000
#define MS_PP_CTL_REG_VALUE_AT_RESET    0x0000
#define MS_FIFO_CTL_REG_VALUE_AT_RESET  0x0000
#define MS_FIFO_CNT_REG_VALUE_AT_RESET  0x0000
#define MS_GCM_CLK_REG_VALUE_AT_RESET   0x00000000
#define MS_GCM_RESET_REG_VALUE_AT_RESET 0x00000001

// Define register mask value
#define MS_CMD_REG_MSK                  0xf3ff
#define MS_STAT_REG_MSK                 0x03ff
#define MS_CNTL_REG_MSK                 0x01ff
#define MS_I_DATA_REG_MSK               0x00fb
#define MS_I_CTL_REG_MSK                0x00e0
#define MS_PP_CTL_REG_MSK               0x0003
#define MS_FIFO_CTL_REG_MSK             0x00ff
#define	MS_FIFO_CNT_REG_MSK             0xffff
#define MS_GCM_CLK_REG_MSK		0x00000001
#define MS_GCM_RESET_REG_MSK		0x00000001

// Redefiniation of register name for the test of reset values
#define MS_CMD_REG        MS_CMD_REG_SUPERVISOR_ADDR	
#define MS_STAT_REG       MS_STAT_REG_SUPERVISOR_ADDR	
#define MS_CNTL_REG       MS_CNTL_REG_SUPERVISOR_ADDR	
#define MS_I_DATA_REG     MS_I_DATA_REG_SUPERVISOR_ADDR	
#define MS_I_CTL_REG      MS_I_CTL_REG_SUPERVISOR_ADDR	
#define MS_PP_DATA_REG    MS_PP_DATA_REG_SUPERVISOR_ADDR	
#define MS_PP_CTL_REG     MS_PP_CTL_REG_SUPERVISOR_ADDR	
#define MS_RX_DATA_REG    MS_RX_DATA_REG_SUPERVISOR_ADDR	
#define MS_TX_DATA_REG    MS_TX_DATA_REG_SUPERVISOR_ADDR	
#define MS_FIFO_CTL_REG   MS_FIFO_CTL_REG_SUPERVISOR_ADDR	
#define MS_FIFO_CNT_REG   MS_FIFO_CNT_REG_SUPERVISOR_ADDR	
#define MS_GCM_CLK_REG    MS_GCM_CLK_REG_SUPERVISOR_ADDR 
#define MS_GCM_RESET_REG  MS_GCM_RESET_REG_SUPERVISOR_ADDR 



// Register MSCMD
#define MSCMD_TPC_POS               12
#define MSCMD_TPC_NUMB               4
#define MSCMD_TPC_RES_VAL            0

#define MSCMD_DATASIZE_POS           0
#define MSCMD_DATASIZE_NUMB         10
#define MSCMD_DATASIZE_RES_VAL       0

// Register MSSTAT
#define MSSTAT_BSSTAT_POS            8
#define MSSTAT_BSSTAT_NUMB           2
#define MSSTAT_BSSTAT_RES_VAL        0

#define MSSTAT_INT_POS               7
#define MSSTAT_INT_NUMB              1
#define MSSTAT_INT_RES_VAL           0

#define MSSTAT_DRQ_POS               6
#define MSSTAT_DRQ_NUMB              1
#define MSSTAT_DRQ_RES_VAL           0

#define MSSTAT_RXFREQ_POS            5
#define MSSTAT_RXFREQ_NUMB           1
#define MSSTAT_RXFREQ_RES_VAL        1

#define MSSTAT_TXFREQ_POS            4
#define MSSTAT_TXFREQ_NUMB           1
#define MSSTAT_TXFREQ_RES_VAL        1

#define MSSTAT_RBE_POS               3
#define MSSTAT_RBE_NUMB              1
#define MSSTAT_RBE_RES_VAL           1

#define MSSTAT_RBF_POS               2
#define MSSTAT_RBF_NUMB              1
#define MSSTAT_RBF_RES_VAL           0

#define MSSTAT_TBE_POS               1
#define MSSTAT_TBE_NUMB              1
#define MSSTAT_TBE_RES_VAL           1

#define MSSTAT_TBF_POS               0
#define MSSTAT_TBF_NUMB              1
#define MSSTAT_TBF_RES_VAL           0

// Register MSCNTL
#define MSCNTL_SWAP_POS             15
#define MSCNTL_SWAP_NUMB             1
#define MSCNTL_SWAP_RES_VAL          0

#define MSCNTL_MRST_POS              8
#define MSCNTL_MRST_NUMB             1
#define MSCNTL_MRST_RES_VAL          0

#define MSCNTL_TRRST_POS             7
#define MSCNTL_TRRST_NUMB            1
#define MSCNTL_TRRST_RES_VAL         0

#define MSCNTL_PWS_POS               6
#define MSCNTL_PWS_NUMB              1
#define MSCNTL_PWS_RES_VAL           0

#define MSCNTL_SIEN_POS              5
#define MSCNTL_SIEN_NUMB             1
#define MSCNTL_SIEN_RES_VAL          0

#define MSCNTL_DMAEN_POS             4
#define MSCNTL_DMAEN_NUMB            1
#define MSCNTL_DMAEN_RES_VAL         0

#define MSCNTL_NOCRC_POS             3
#define MSCNTL_NOCRC_NUMB            1
#define MSCNTL_NOCRC_RES_VAL         0

#define MSCNTL_BSYCNT_POS            2
#define MSCNTL_BSYCNT_NUMB           3
#define MSCNTL_BSYCNT_RES_VAL        0


// Register MSIDATA
#define MSIDATA_RDY_POS              7
#define MSIDATA_RDY_NUMB             1
#define MSIDATA_RDY_RES_VAL          0

#define MSIDATA_SIF_POS              6
#define MSIDATA_SIF_NUMB             1
#define MSIDATA_SIF_RES_VAL          0

#define MSIDATA_DRQ_POS              5
#define MSIDATA_DRQ_NUMB             1
#define MSIDATA_DRQ_RES_VAL          0

#define MSIDATA_PIN1_POS             4
#define MSIDATA_PIN1_NUMB            1
#define MSIDATA_PIN1_RES_VAL         0

#define MSIDATA_PIN0_POS             3
#define MSIDATA_PIN0_NUMB            1
#define MSIDATA_PIN0_RES_VAL         0