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📄 debug-macros.h.s

📁 OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器
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		DCB	"PRINTF PC=$PC_Addr, break=$Bk_Addr, RETVAL=$RETVAL\n"
		[	"$ret" /= ""
		Bst_Return
		]
		MEND
    
;--------------------------------------------------------------------------------
    			
	; -----------------------------
	; Use as undefined instruction
	MACRO
$L	INSTR_UNDEF			; Use as undefined instruction
$L	DCD	0xE6000011
	MEND

	MACRO
$L	INSTR_UNDEF_THUMB		; Use as undefined instruction
$L	DCW	0xBB00
	MEND

	; -----------------------------
	; - NOPs to maintain code size for the two addressing types
	;   - some addressing in BST commands is NOT relocatable
	MACRO
	Check_26_CoProcessor	; Set co-processor 6 for 26 bit addressing
	; -----------------------------
	[	{CONFIG} = 26
	MOV	r0, #1
	MCR	CP6, 0, r0, C0, C0
	CDP	CP6, 1, C0, C0, C0
	CDP	CP6, 2, C0, C0, C0
	|
	NOP
	NOP
	NOP
	NOP
	]

	MEND

;********************************************************************************
;***		Comms Channel Macros
;********************************************************************************

;-----------------------------------------------------------------------------
; Debug Comms Control Register bits:
;
;	0	R - Comms Read Register Full
;	1	W - Comms Write Register Full
;	28-31	ID - ICEbreaker version number
;-----------------------------------------------------------------------------	

CommsCtrlMask	EQU	3				; mask out all but R, W bits
CommsClear	EQU	0
CommsRBit	EQU	1
CommsWBit	EQU	2

;--------------------------------------------------------------------------------

		MACRO
$label		COMMS_READ_CONTROL $reg
$label		MRC	p14,0,$reg,c0,c0
		MEND
		
;--------------------------------------------------------------------------------

		MACRO
$label		COMMS_WRITE_CONTROL $reg
$label		MCR	p14,0,$reg,c0,c0
		MEND
		
;--------------------------------------------------------------------------------

		MACRO
$label		COMMS_TEST_CONTROL $reg, $value, $mask
		[	"$mask" = ""
$label		AND	$reg,$reg,#CommsCtrlMask
		|
$label		AND	$reg,$reg,#$mask
		]
		CMP	$reg,#$value
		MEND
		
;--------------------------------------------------------------------------------

		MACRO
$label		COMMS_READ_DATA $reg
$label		MRC	p14,0,$reg,c1,c0
		MEND
		
;--------------------------------------------------------------------------------

		MACRO
$label		COMMS_WRITE_DATA $reg
$label		MCR	p14,0,$reg,c1,c0
		MEND

;--------------------------------------------------------------------------------
		
	;--------------------------------------------------
	; Messages for ji_priority tests added
	;--------------------------------------------------	
	MACRO
	Debug_Common_Errors		; Usual debug error failure routines

fail_regs_corrupt
	PRINTF	"Corrupted register %x, Expected: %x, Actual: %x\n", r0, r1, r2
	MOV	pc,r14


PC_Incorrect
;~~~~~~~~~~~
	MESSAGE "PC stored in debug mode NOT as expected"
	TEST_FAIL

Called_In_WrongOrder
;~~~~~~~~~~~~~~~~~~~~		
	MESSAGE "Handlers called in wrong order"
	TEST_FAIL

FIQ_Handler_NOT_Called
;~~~~~~~~~~~~~~~~~~~~~    
        MESSAGE "FIQ handler NOT called"
        TEST_FAIL

IRQ_Handler_NOT_Called
;~~~~~~~~~~~~~~~~~~~~~    
        MESSAGE "IRQ handler NOT called"
        TEST_FAIL

UND_Handler_NOT_Called
;~~~~~~~~~~~~~~~~~~~~~    
        MESSAGE "UND handler NOT called"
        TEST_FAIL
				
PABORT_Handler_NOT_Called
;~~~~~~~~~~
	MESSAGE "Expected PABORT handler call NOT made"
	TEST_FAIL

PABORT_Handler_Called
;~~~~~~~~~~
	MESSAGE "Unexpected PABORT handler call made"
	TEST_FAIL
		
DABORT_Handler_NOT_Called
;~~~~~~~~~~
	MESSAGE "Expected DABORT handler call NOT made"
	TEST_FAIL
		
Handler_NOT_Called
;~~~~~~~~~~
	MESSAGE "Expected handler call NOT made"
	TEST_FAIL

Handler_Called
;~~~~~~~~~~
	MESSAGE "Unexpected handler call made"
	TEST_FAIL

Failed_IF
;~~~~~~~~~~
	MESSAGE "Instruction fetch taken"
	TEST_FAIL

Failed_DA
;~~~~~~~~~~
	MESSAGE "Data access taken"
	TEST_FAIL

Failed_Pre
;~~~~~~~~~
	MESSAGE "Breakpoint below range taken"
	TEST_FAIL
	
Failed_Return
;~~~~~~~~~~~~
	MESSAGE "Returned to wrong instruction"
	TEST_FAIL

Failed_Post
;~~~~~~~~~~
	MESSAGE "Breakpoint above range taken"
	TEST_FAIL

Missed_0
;~~~~~~~
	MESSAGE	"Break/watchpoint 0 NOT taken"
	TEST_FAIL

Missed_1
;~~~~~~~
	MESSAGE	"Break/watchpoint 1 NOT taken"
	TEST_FAIL

Missed_2
;~~~~~~~
	MESSAGE	"Break/watchpoint 2 NOT taken"
	TEST_FAIL

Took_0
;~~~~~~~
	MESSAGE	"Breakpoint 0 taken"
	TEST_FAIL

Took_1
;~~~~~~~
	MESSAGE	"Breakpoint 1 taken"
	TEST_FAIL

Corrupt_After_0
;~~~~~~~~~~~~~~
	MESSAGE	"Registers corrupt after breakpoint 0"
	TEST_FAIL

Corrupt_After_1
;~~~~~~~~~~~~~~
	MESSAGE	"Registers corrupt after breakpoint 1"
	TEST_FAIL

Failed_Comms
;~~~~~~~~~~~
	MESSAGE "Debug Comms failed"
	TEST_FAIL

Failed_None
;~~~~~~~~~~
	MESSAGE "Breakpoint NOT taken"
	TEST_FAIL

Failed_More
;~~~~~~~~~~
	MESSAGE "More then one breakpoint taken"
	TEST_FAIL

Fail_Instr
;~~~~~~~~~
	MESSAGE		"Instruction failed or register corrupted"
	TEST_FAIL

Flags_Corrupt
;~~~~~~~~~~~~
	MESSAGE	"Flag was corrupted"
	TEST_FAIL

	MEND

	; -----------------------------
	; Address of debug variables	
	; -----------------------------
	; 24/07/97 P Pearse - Add StoreArea
        ; 19/11/97 P Pearse - RegExpected/Actual/Id added
	; -----------------------------	
		MACRO
		Debug_Stores



RETADDR1	DCD	0		; Return address
RETADDR2	DCD	0		; Return address
Flag_Debug	Set_BST_Access		; Indicates occurence of breakpoint/watchpoint
		GBLA	PC_STOREAREA
PCSTR
;PC_STOREAREA	SETA	{PC}		
PC_STOREAREA	Get_Address PCSTR
StoreArea	%	0x30 * 4	; More than enough for ALL registers
RegExpected     DCD     0
RegActual       DCD     0
RegId           DCD     0
		MEND

        MACRO
        ShowRegs        $regnum, $regexp,   $regact
        LOCAL
        B       $l.past1
$l.r0   DCD     0
$l.r1   DCD     0
$l.r2   DCD     0
$l.regexp DCD     0
$l.regact DCD     0

$l.past1
        STR     r0,$l.r0
        STR     r1,$l.r1
        STR     r2,$l.r2
        STR     $regexp, $l.regexp
        STR     $regact, $l.regact

	PART_MSG " Corrupted register  "
        MOV     r0, #$regnum
	PHEX_REG r0
	PART_MSG " Expected: "
	PHEX_REG $regexp
	PART_MSG " Actual  : "
	PHEX_REG $regact

        LDR     r0,$l.r0
        LDR     r1,$l.r1
        LDR     r2,$l.r2
        LDR     $regexp, $l.regexp
        LDR     $regact, $l.regact
        B       $l.past1
        LTORG
$l.past1
        LOCAL_END
        MEND
;--------------------------------------------------------------------------------
; Macro:	InitStoreArea
;
; Function:	Fills the store with known values
;--------------------------------------------------------------------------------
; Date: 18/08/97  Author: P Pearse	 - Added
;--------------------------------------------------------------------------------

	MACRO
	InitStoreArea
	LOCAL
	B	$l.past
$l.r0	DCD	0
$l.r1	DCD	0
$l.r2	DCD	0
$l.past
	STR	r0,$l.r0
	STR	r1,$l.r1
	STR	r2,$l.r2

	LDR	r0,=StoreArea
	MOV	r1,#0x30	; Length in words
	MOV	r1,r1,LSL #2	; - to bytes
	ADD	r1,r0,r1
	MOV	r2,#0
$l.Continue
	ADD	r2,r2,#0x00000F00
	STR	r2,[r0],#4
	CMP	r1,r0
	BNE	$l.Continue

	LDR	r0,$l.r0
	LDR	r1,$l.r1
	LDR	r2,$l.r2
	B	$l.End
	LTORG
$l.End
	LOCAL_END
	MEND


	; -----------------------------
	; Start of code & offset_Flag_Debug both ASSUMED < 0x00010000
	; - returns address of $label in $reg1
	MACRO
	THUMB_Get_Label_Address	$label, $reg1, $reg2
	; -----------------------------
	; 09/07/97 P Pearse: Added
	; -----------------------------
	PUSH	{ $reg2 }

	MOV	$reg2, #((0x$Start_of_Code :AND: 0x0000FF00):SHR: 8)
	LSL	$reg2, $reg2, #8
	MOV	$reg1, # (0x$Start_of_Code :AND: 0x000000FF)
	ADD	$reg2, $reg2, $reg1
	PUSH	{ $reg2 }

varsubS		SETS	"offset_$label"
varsubA		SETA	$varsubS
		
; 	MOV	$reg2, #((0x$offset_$label :AND: 0x0000FF00):SHR: 8)
	MOV	$reg2, #((0x$varsubA :AND: 0x0000FF00):SHR: 8)
	LSL	$reg2, $reg2, #8
; 	MOV	$reg1, # (0x$offset_$label :AND: 0x000000FF)
	MOV	$reg1, # (0x$varsubA :AND: 0x000000FF)
	ADD	$reg2, $reg2, $reg1

	; -----------------------------
	; Add offset to base of code & place in $reg1
	; -----------------------------
	POP	{ $reg2 }
	ADD	$reg1, $reg2

	POP	{ $reg2 }

	MEND

	; -----------------------------
	MACRO
$L	Clear_Flag_Debug	;	Clear debug occurred flag
	; -----------------------------
	; 03/06/97 P Pearse: Change to ADRL r0, Flag_Debug
	; 04/07/97 P Pearse: Discovered LOCAL/LOCAL_END
	; 09/07/97 P Pearse: Added THUMB code
	; -----------------------------
	LOCAL

	[	{CODESIZE} = 16

	PUSH	{r0-r1}

	THUMB_Get_Label_Address	Flag_Debug, r0, r1

	LDR	r0, =Flag_Debug

	; -----------------------------
	; Clear flag
	; -----------------------------
	MOV	r1, #0
	STR	r1, [r0]

	POP	{r0-r1}

	|

	B	%F1

tmpr0$l	DCD	0
tmpr1$l	DCD	0
1
	STR	r1, tmpr1$l
	STR	r0, tmpr0$l

	ADRL 	r0, Flag_Debug

	; -----------------------------
	; Clear flag
	; -----------------------------
	MOV	r1, #0
	STR	r1, [r0]

	LDR	r1, tmpr1$l
	LDR	r0, tmpr0$l

	] ; {CODESIZE} = 16

	LOCAL_END

	MEND

	; ----------------------------------------------------------
	; Store register $reg at $offset from Start_Of_Code
	MACRO
	Bst_Reg_To_Store $reg, $offset
	; -------------------------------------
	; 13/05/97 P Pearse - Use offset frfom Start_Of_Code
	; 17/05/97 P Pearse - RETVAL + 2 * PCIncrement
	; -------------------------------------
		[	VARIANT = "ARM9"
		DCB	"ARMINST_D MOV r0,#0x$Start_of_Code\n"
		DCB	"ARMINST_D STR $reg,[r0,#0x$offset]\n"
		DCB	"ARMINST_S NOP\n"
RETVAL		SETA	RETVAL + 2*PCIncrement			; don't count sys NOP
		|
		DCB	"ARMINST_S MOV r0,#0x$Start_of_Code\n"
		DCB	"ARMINST_D STR $reg,[r0,#0x$offset]\n"
RETVAL		SETA	RETVAL + 2*PCIncrement
		]
		MEND

	; -----------------------------
	;	If set clear it
	;	Else branch to destination (may NOT be an error)
	;	Flag is zero if NO debug event
	MACRO
$L	Check_Flag_Debug	$dest	; Check debug occurred flag
	; -----------------------------
	; 03/06/97 P Pearse: Change to ADRL r0, Flag_Debug
	; 04/07/97 P Pearse: Discovered LOCAL/LOCAL_END
	; 09/07/97 P Pearse: THUMB code added
	; 24/07/97 P Pearse: Restore r0 on branch to dest so can be used as normal
	;                    exit, rather than just as error
        ; 19/11/97 P Pearse  Branch past LTORG
	; -----------------------------
	LOCAL

	[	{CODESIZE} = 16
	[	SUPPORTS_THUMB = {FALSE}
	!	1, "Check_Flag_Debug: Illegal CODE16"
	]

	PUSH	{r0}
	LDR	r0, =Flag_Debug
	LDR	r0,[r0]
	CMP	r0, #0
	BNE	%F2
	; -----------------------------
	; Branch to error routine
	; - switches to ARM ??
	; -----------------------------
	POP	{r0}
	To_ARM $dest, 2
2
	Clear_Flag_Debug

	POP	{r0}
        B       $l.pastLTORG
	LTORG
$l.pastLTORG

	|	; {CODESIZE} = 32

	B %F1

tmp$l	DCD 0

1
	STR	r0, tmp$l

	ADRL	r0,	Flag_Debug
	LDR	r0,	[r0]
	CMP	r0,	#0
	LDREQ	r0, 	tmp$l	
	BEQ	$dest

	Clear_Flag_Debug

	LDR	r0, tmp$l
	]
	LOCAL_END
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