debug-macros.h.s

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

;*******************************************************************************
;*
;* The confidential and proprietary information contained in this file may
;* only be used by a person authorised under and to the extent permitted
;* by a subsisting licensing agreement from ARM Limited.
;*
;*                 (C) COPYRIGHT 1997-2001 ARM Limited.
;*                       ALL RIGHTS RESERVED
;*
;* This entire notice must be reproduced on all copies of this file
;* and copies of this file may only be made by a person if such person is
;* permitted to do so under the terms of a subsisting license agreement
;* from ARM Limited.
;*
;*              Debug Macros
;*              ============
;*
;*      Origin: ARM7T Debug Tests
;*      Author: Peter Pearse 21/02/1997
;*     $Author: jrijk $
;*   $Revision: 1.46 $
;*       $Date: Thu Jul 19 14:13:27 2001 $
;*
;********************************************************************************		

	; prevent Debug-Macros being included twice
		[	:DEF: Got_Debug_Macros
		!	0, "\n\tWARNING: Debug-Macros already included."
		|
		GBLL	Got_Debug_Macros

	; turn off normal listing for include files
                ;OPT     2

		[	DEBUG_DBGRQ = "UNDEFINED"
		!	1, "DEBUG_DBGRQ undefined in project's Configuration file, update to a newer version of Configuration"
		]
		[	DEBUG_VERSION = "0"
		!	1, "DEBUG_VERSION undefined in project's Configuration file, update to a newer version of Configuration"
		]
		

;--------------------------------------------------------------------------------
; Macro:	Setup_Debug [offset]
;
; Function:	Define symbols for use in debug tests
;
; Parameters:	Defines 16 globals for use a breakpoint addresses, and defines
;		reference labels and symbol for calculating the absolute addresses
;		whilst attempting to maintain position independant compilation
;
; Assumptions:	16 variables is sufficient for now
;		After linking Wpt_Ref has precisely the same address as VWpt_Ref 
;--------------------------------------------------------------------------------
    	
		MACRO
		Setup_Debug $off
		[	:LNOT::DEF:SETUP_DEBUG
		GBLL	SETUP_DEBUG
Wpt_Ref						; label used as reference point
		GBLA	VWpt_Ref
		[	"$off" = ""
VWpt_Ref	SETA	0x1000			; assumed absolute value of Wpt_Ref
		|
VWpt_Ref	SETA	$off
		]

		[	HIGH_VECTORS
VWpt_Ref	SETA	VWpt_Ref + 0xFFFF0000	; adjust for HIVECS
		]
		
		GBLA	Wpt0
		GBLA	Wpt1
		GBLA	Wpt2
		GBLA	Wpt3
		GBLA	Wpt4
		GBLA	Wpt5
		GBLA	Wpt6
		GBLA	Wpt7
		GBLA	Wpt8
		GBLA	Wpt9
		GBLA	WptA
		GBLA	WptB
		GBLA	WptC
		GBLA	WptD
		GBLA	WptE
		GBLA	WptF
		]
		MEND
		
;--------------------------------------------------------------------------------
; Macro:	[label] Set_Breakpoint <var>, <instr>
;
; Function:	Used for setting up a breakpoint address in a variable
;
; Operation:	Sets <var> to the absolute {PC} address of <instr>
;
; Assumptions:	After linking Wpt_Ref has precisely the same address as VWpt_Ref 
;--------------------------------------------------------------------------------
		
		MACRO
$label		Set_Breakpoint $bkpt, $instr
		LOCAL
$l.here
$bkpt		SETA	($l.here - Wpt_Ref) + VWpt_Ref
$label		$instr
		LOCAL_END
		MEND
		
;--------------------------------------------------------------------------------
; Macro:	[label] Set_Watchpoint <var>, <instr>, [watchaddr]
;
; Function:	Used for setting up a watchpoint address in a variable
;
; Operation:	Sets <var> to the address of [watchaddr], if not null, or {PC}
;		otherwise.
;
; Assumptions:	[watchaddr] must have already been defined if specified.
;		After linking Wpt_Ref has precisely the same address as VWpt_Ref 
;--------------------------------------------------------------------------------
 		
		MACRO
$label		Set_Watchpoint $bkpt, $instr, $watchaddr
		LOCAL
		[	"$watchaddr" = ""
$l.here
$bkpt		SETA	($l.here - Wpt_Ref) + VWpt_Ref
		|
		[	:LNOT::DEF:$watchaddr
		!	1, "$watchaddr not defined (it must be defined before this macro)!"
		MEXIT
		]
$bkpt		SETA	($watchaddr - Wpt_Ref) + VWpt_Ref
		]
$label		$instr
		LOCAL_END
		MEND   
	
;--------------------------------------------------------------------------------
; Macro:	<var> Get_Address <label>
;
; Function:	Get absolute address of <label>
;
; Operation:	Sets <var> to the absolute address of <label>
;
; Assumptions:	After linking Wpt_Ref has precisely the same address as VWpt_Ref 
;--------------------------------------------------------------------------------
  		
		MACRO
$var		Get_Address $label
$var		SETA	(($label) - Wpt_Ref) + VWpt_Ref
		MEND  		
	

;--------------------------------------------------------------------------------
; Macro:	[label] INIT_ICEBREAKER
;
; Function:	Asserts EDBGRQ so that debug tests may initialise ICE-Breaker
;
; Parameters:	<function of the parameters>
;
; Operation:	<detail operation>
;
; Assumptions:	<state anything to be wary of>
;--------------------------------------------------------------------------------

		MACRO
$label		INIT_ICEBREAKER	
		LOCAL
$label		STR	r0,store$l+0
		STR	r1,store$l+4
		STR	r2,store$l+8
		STR	r3,store$l+12
	; Need to save current mode in case abort or interupt occurs while
	; waiting for external debug request
	 	MRS	r3,CPSR
		STR	r3,store$l+16			; preserve in case debug corrupts r3

	; FAKE_ICEBREAKER is used when creating etmRIS test.  Entire macro must
	; be same number of instruction whether FAKE_ICEBREAKER or not, and all
	; registers need to be preserved across the macro.
		[	:DEF:FAKE_ICEBREAKER
		B	return$l
		|
	; setup return and schedule DBGRQ
		ADR	r1,return$l
		]
		[	VARIANT /= "ARM10"
		SCHEDULE_DBGRQ #0
		|
	;Any stores after the Debug_request might cause an abort while in debug,
	;which is invalid, so the macro is avoided.
		LDR	r2,=TB_EDBGRQ
		MOV	r0,#0
		STR	r0,[r2]				; assert EDBGRQ
		]
	; simple count down loop to catch failure to enter debug
		MOV	r2,#32
loop$l		SUBS	r2,r2,#1
		BGT	loop$l
	
		PRINTF	"INIT_ICEBREAKER timed-out; EDBGRQ did not occur\n"
	
	; import just in case TEST_START not called in code.
	;	EXTERN	Test_Header_Test_Fail
	;	TEST_FAIL
	;We don't want to call the macro TEST_FAIL which in turn evokes INIT_ICEBREAKER again 
		PRINTF "\n** TEST FAILED **    \n"
		SYS_EXIT
		
store$l		%	20
return$l
	; Restore saved mode
		LDR	r3,store$l+16
		MSR	CPSR_cf,r3
		LDR	r0,store$l+0
		LDR	r1,store$l+4
		LDR	r2,store$l+8
		LDR	r3,store$l+12
		LOCAL_END
		MEND

;--------------------------------------------------------------------------------
		
		; ----------------------------------------------------
		; Since ARM9 watchpoint is taken after execution of both watchpoint instruction
		; and that following, insert a NOP tp prevent pre-execution of e.g. CMP,
		; or difficulties with pc due to B
		; ----------------------------------------------------
		; 31/10/97 P Pearse Added
		; ----------------------------------------------------		
		MACRO
		ARM9_NOP
		[	VARIANT = "ARM9"
		; ---------------------------------------------		
		; ARM9 executes watchpoint instruction AND the following instruction
		; so insert a NOP to prevent difficulties
		; ---------------------------------------------		
		NOP
		]
		MEND
		
		; ----------------------------------------------------
		; Distinguish watchpoint from breakpoint tests since ARM9 behaviour
		; is distinct
		; ----------------------------------------------------
		; 10/10/97 P Pearse Added
		; ----------------------------------------------------
		GBLL	WATCHPOINTTEST
WATCHPOINTTEST	SETL	{FALSE}		; Default to breakpoint

		GBLS	StrCONFIG			; Used to provide mode strings e.g. Mode_SVC_$StrCONFIG

		[	{CONFIG} = 26
StrCONFIG	SETS	"26"
		|
StrCONFIG	SETS	"32"
		]

	; ------------------------------------------------------
	; Define the pipeline length to be used as follows:
	;
	;	- On entry to the BST pipeline len - 2
	;     NOPs (at debug speed) are loaded so that
	;     the BST processing may stop immediately by
	;     loading <instr> 1, <instr> 0
	;
	;	- Whenever data is to be extracted via the scan chain
	;     it will NOT be available until the pipeline is full
	;     i.e. instruction which makes it available reaches top
	;     of pipeline and is executed
	;
	; ------------------------------------------------------

		[	:LNOT: :DEF: PipelineLen
		GBLA	PipelineLen
PipelineLen	SETA	3
		]

	; -----------------------------
	; Debug tests are NOT relocatable. 
	;  e.g. flags to be set by BST, breakpoint addresses etc.
	;
	; See also Align_Boundary in Test-Header.s
	; -----------------------------	
	
		GBLA	Start_of_Code
Start_of_Code	SETA	0x1000
		
	; -----------------------------
	MACRO	
	Align_At $address	; Allow use of variables in BST commands
	; -----------------------------	
	[	Start_of_Code = $address
	ORG	Start_of_Code
	|
	!	1, "Align_At <address> does not match Start_of_Code."
	]
	MEND

	; -----------------------------
	; Register & co-processor names
	; -----------------------------
	MACRO 
	Define_Constants	; Register & co-processor names	
C0			CN	0
	; -----------------------------
	; Co-processor 15 (System co-processor) registers
	; -----------------------------
CPSYS_Identity		CN	0
CPSYS_Control		CN	1
CPSYS_Tran_TBL_Base	CN	2
CPSYS_Domain_Access	CN	3
CPSYS_Fault_Status	CN	5
CPSYS_Fault_Address	CN	6
CPSYS_Ops_TLB		CN	7
CPSYS_Ops_Cache		CN	8

CP3			CP	3
CP4			CP	4
CP5			CP	5	; Simulate interrupts
CP6			CP	6
	; -----------------------------
	; This co-processor should NOT be fitted
	; - intended to provide a value to simulate
	;   undefined instruction operation on CDP to
	;   co-processor which does NOT respond
	; -----------------------------
	; 1997/05/22 18:42:40;	author: jrijk
	; -----------------------------
CPUNDEF		CP	CP_BOUNCE	; From Configuration
			
FLAGS_ALL_SET	EQU	Flag_Bits	; Test-Macros::Flag_Bits
Priv_Bits	EQU	0x0000000F	; Sub-set of Test-Macros::Mode_Bits
	; -----------------------------
	; Useful opcodes
	; -----------------------------	
NOPINS		EQU	0xE1A00000
ADDINS		EQU	0xE2800001

		GBLS	Thumb_NOP
Thumb_NOP	SETS	"0x46C046C0"
		
	; -----------------------------
	; Useful addresses
	; -----------------------------
	; Badaddress_B is an illegal address small enough for use in B or BL
	;   also need writeable data before to do prefetch aborts
	; - if it set to BadAddress as currently set in ARM710T some
	;   code will NOT compile because B, BL instructions will be out of range
	; 23/05/97 P Pearse
	; -----------------------------
	
		[	VARIANT = "ARM9"
	; AbortStart cannot be written to - ever - so we'll just have to live with it!
	; If we knew the MMU was enabled and the area applicable, then we could possibly
	; reprogram it, but this is too much hassle at the moment.
BadAddress_B		EQU	AbortStart
		|
				; May need to be accessed via the high memory alias 0x8xxxxxxx
				; so needs to be in the area which can be aliased in this manner
				; i.e external memory 0x00020000 - 0x7FFFFFFF
				; But also needs to be valid for the PID card memory map
				; 710/720:
				;	0x00000000 - 0x0007FFFF Memory
				;	0x00080000 - 0x0017FFFF Aborts
				;       0x00180000 - 0x0FFFFFFF Memory
				;       0x01000000 - 0x02FFFFFF Nothing
				;	0x03000000 - 0x03000047 TrickBox
				;	0x03000048 - 0x3FFFFFFF Nothing
				;	0x40000000 - 0x4FFFFFFF Default abort region (NO memory)
				;	0x50000000 - 0xFFFFFFFF Nothing
				;
BadAddress_B		EQU	0x00500000	
		]


		MEND
	
	; ---------------------------------------------------
	; Set trick box to signal ABORT on 'addr' access
	;
	; - $addr is symbol 
	; - addr is lower bound
	; $block_size is size of bad addr block
	; ---------------------------------------------------
	; 17/06/97 P Pearse - Add ARM710T, DeviceInitialised handling
	; 23/07/97 P Pearse - Use general registers, check order in which to operate
	; 05/11/97 P Pearse - Save & restore registers, label limits to allow multiple use
	; 12/01/98 P Pearse - Revamp order of operation
	; 19/02/98 P Pearse - Use code NOT macro to ensure NO aborts during this process
	; ---------------------------------------------------		
	MACRO
	SetupBadAddress	$addr, $block_size
	;---------------------------------------------------
	; From TrickBox-behavioural.vhd:
	;	if D_SelTrickBox = '1' and B_A(6) = '1' then	      
	;		RegAddr <= B_A(2) after Latch1;  Registers are 0x??????40 & 44
	;
	;	UpperLatEn <= B_Clk and SelD1 and WriteD1 and     RegAddr;
	;	LowerLatEn <= B_Clk and SelD1 and WriteD1 and not RegAddr;
	;
	; ---------------------------------------------------
	; If bounds are changed in the wrong order the TrickBox, or this macro,
	; may become located in bad address area and the next instruction fetched
	; or the next Trickbox access will abort, depening on whether read and/or write aborts
	; are enabled (last 2 bits of lower limit for ARM7, NOT applicable to ARM9)
	;
	; Could check which limit to change first using macro variables etc
	; STM stops abort on instruction fetch for instruction which sets second register
	; (since there is none) but might still abort on the Trickbox write
	; Therefore do:
	; - set lower limit 0xFFFFFFFF (could just set last two bits for ARM7 but NOT ARM9)
	;   Aborts are now impossible since the address accessed cannot be >= lower && < upper
	;   whatever upper is set to
	; - set new upper limit, aborts will still be impossible
	; - set desired lower limit
	;
	; ---------------------------------------------------
	; Set default block size, if NOT supplied
	; ---------------------------------------------------
	
		LOCAL	
		B	$l.past
$l.r0		DCD	0
$l.r1		DCD	0
$l.past
		STR	r0, $l.r0
		STR	r1, $l.r1

		[	:DEF: DeviceInitialised			; See INIT_DEVICE
		[	TARGET = "ARM710T"
	; ---------------------------------------------------	
	; Section containing BadAddress should be straight thru, unbuffered, uncached
	; Translation table base to r0
	; ---------------------------------------------------	
		MRC	CP_SYSTEM, 0, r0, CPSYS_Tran_TBL_Base, c0, 0
	; ---------------------------------------------------	
	; Straight thru section low bytes to r1
	; ---------------------------------------------------	
		MOV	r1, #0x00000C10		; r1 = 0x00000C10
		ADD	r1, r1,#0x00000002	; r1 = 0x00000C12
		STR	r1,[r0]			; Section 0 0x00000C12
		SetSection r1, $addr
		]	
		]

	; get low abort address into register
		LDR	r0,=$addr	
		[	"$block_size" = ""
		SET_ABORT r0, READ_WRITE, (0x10/4)
		|
		SET_ABORT r0, READ_WRITE, ($block_size/4)
		]
	
		LDR	r0, $l.r0
		LDR	r1, $l.r1
		LOCAL_END
		MEND

		
		
	; -----------------------------
	; Global Variables
	; -----------------------------
	; 18/08/97 P Pearse - Added Current_ICE_Regs
	; -----------------------------	
	MACRO 
	Define_Globals
	[ :LNOT::DEF:Define_Globals_Included
	GBLL	Define_Globals_Included
	; -----------------------------	
	; Current_ICE_Regs:
	; -----------------------------		
	GBLA	Current_CTL	; Debug Control Register
	GBLA	Current_AV0
	GBLA	Current_AM0
	GBLA	Current_CV0	
	GBLA	Current_CM0
	GBLA	Current_DV0
	GBLA	Current_DM0
	GBLA	Current_AV1
	GBLA	Current_AM1
	GBLA	Current_CV1	
	GBLA	Current_CM1	
	GBLA	Current_DV1
	GBLA	Current_DM1				
	GBLA	PCBRK0
	GBLA	PCBRK1
	GBLA	PCBRK2
	GBLA	PCBRK3
	GBLA	PCWATCH
	GBLA	MOVVAL		; op codes to allow stores to be relocatable
	GBLA	STRVAL		; - as above
	GBLA	SUBVAL		; - as above
	GBLA	TMPVAL		; - as above
	GBLA	RETVAL		; Magic number to keep running count of
				; increments applied to PC so that
				; SUB pc,pc or B can be used to
				; return to the breakpointed instruction or
				; instruction after watchpointed instruction
				; MACROs are written for these cases
				; - adjustments may be required for special
				;   cases e.g. PFA on watchpoint/break,
				;   IRQ pending at break etc.
	GBLA	Address1	; For inserting addresses into BST code
	GBLA	Address2	; For inserting addresses into BST code
	GBLA	Data1		; For inserting data	  into BST code
	GBLA	Data2		; For inserting data	  into BST code
	GBLS	TestName
	GBLS	UndefHandler
	GBLA	dbgWriteValue
	GBLA	dbgReadValue
	GBLA	dbgDummyRead
	GBLA	dbgDummyWrite
	GBLA	CTR1			; General ctr for e.g. WHILE assembly