clock_timer_good.lst

cy8c24794单片机程序

    0000: 80 67    JMP   0x0068
    0002: 30       HALT  
    0003: 30       HALT  
FILE: .\boot.asm
(0001) ; Generated by PSoC Designer ver 4.2  b1013 : 02 September, 2004
(0002) ;
(0003) ;@Id: boot.tpl#681 @
(0004) ;=============================================================================
(0005) ;  FILENAME:   boot.asm
(0006) ;  VERSION:    4.16
(0007) ;  DATE:       6 October 2005
(0008) ;
(0009) ;  DESCRIPTION:
(0010) ;  M8C Boot Code for CY8C24x90 microcontroller devices.
(0011) ;
(0012) ;  Copyright (C) Cypress Semiconductor 2000-2005. All rights reserved.
(0013) ;
(0014) ; NOTES:
(0015) ; PSoC Designer's Device Editor uses a template file, BOOT.TPL, located in
(0016) ; the project's root directory to create BOOT.ASM. Any changes made to
(0017) ; BOOT.ASM will be  overwritten every time the project is generated; therefore
(0018) ; changes should be made to BOOT.TPL not BOOT.ASM. Care must be taken when
(0019) ; modifying BOOT.TPL so that replacement strings (such as @PROJECT_NAME)
(0020) ; are not accidentally modified.
(0021) ;
(0022) ;=============================================================================
(0023) 
(0024) include ".\lib\GlobalParams.inc"
(0025) include "m8c.inc"
(0026) include "m8ssc.inc"
(0027) include "memory.inc"
(0028) 
(0029) ;--------------------------------------
(0030) ; Export Declarations
(0031) ;--------------------------------------
(0032) 
(0033) export __Start
(0034) export __bss_start
(0035) export __data_start
(0036) export __idata_start
(0037) export __func_lit_start
(0038) export __text_start
(0039) export  _bGetPowerSetting
(0040) export   bGetPowerSetting
(0041) 
(0042) 
(0043) ;--------------------------------------
(0044) ; Optimization flags
(0045) ;--------------------------------------
(0046) ;
(0047) ; To change the value of these flags, modify the file boot.tpl, not
(0048) ; boot.asm. See the notes in the banner comment at the beginning of
(0049) ; this file.
(0050) 
(0051) ; Optimization for Assembly language (only) projects and C-language projects
(0052) ; that do not depend on the C compiler to initialize the values of RAM variables.
(0053) ;   Set to 1: Support for C Run-time Environment initialization
(0054) ;   Set to 0: Support for C not included. Faster start up, smaller code space.
(0055) ;
(0056) C_LANGUAGE_SUPPORT:              equ 1
(0057) 
(0058) 
(0059) ; For historical reasons, by default the boot code uses an lcall instruction
(0060) ; to invoke the user's _main code. If _main executes a return instruction,
(0061) ; boot provides an infinite loop. By changing the following equate from zero
(0062) ; to 1, boot's lcall will be replaced by a ljmp instruction, saving two
(0063) ; bytes on the stack which are otherwise required for the return address. If
(0064) ; this option is enabled, _main must not return. (Beginning with the 4.2
(0065) ; release, the C compiler automatically places an infinite loop at the end
(0066) ; of main, rather than a return instruction.)
(0067) ;
(0068) ENABLE_LJMP_TO_MAIN:             equ 0
(0069) 
(0070) 
(0071) ;-----------------------------------------------------------------------------
(0072) ; Interrupt Vector Table
(0073) ;-----------------------------------------------------------------------------
(0074) ;
(0075) ; Interrupt vector table entries are 4 bytes long.  Each one contains
(0076) ; a jump instruction to an ISR (Interrupt Service Routine), although
(0077) ; very short ISRs could be encoded within the table itself. Normally,
(0078) ; vector jump targets are modified automatically according to the user
(0079) ; modules selected. This occurs when the 'Generate Application' opera-
(0080) ; tion is run causing PSoC Designer to create boot.asm and the other
(0081) ; configuration files. If you need to hard code a vector, update the
(0082) ; file boot.tpl, not boot.asm. See the banner comment at the beginning
(0083) ; of this file.
(0084) ;-----------------------------------------------------------------------------
(0085) 
(0086)     AREA TOP (ROM, ABS, CON)
(0087) 
(0088)     org   0                        ;Reset Interrupt Vector
(0089)     jmp   __Start                  ;First instruction executed following a Reset
(0090) 
(0091)     org   04h                      ;Supply Monitor Interrupt Vector
(0092)     halt                           ;Stop execution if power falls too low
    0004: 30       HALT  
    0005: 30       HALT  
    0006: 30       HALT  
    0007: 30       HALT  
(0093) 
(0094)     org   08h                      ;Analog Column 0 Interrupt Vector
(0095)     // call	void_handler
(0096)     reti
    0008: 7E       RETI  
    0009: 30       HALT  
    000A: 30       HALT  
    000B: 30       HALT  
(0097) 
(0098)     org   0Ch                      ;Analog Column 1 Interrupt Vector
(0099)     // call	void_handler
(0100)     reti
    000C: 7E       RETI  
    000D: 30       HALT  
    000E: 30       HALT  
    000F: 30       HALT  
    0010: 30       HALT  
    0011: 30       HALT  
    0012: 30       HALT  
    0013: 30       HALT  
    0014: 30       HALT  
    0015: 30       HALT  
    0016: 30       HALT  
    0017: 30       HALT  
(0101) 
(0102)     org   18h                      ;VC3 Interrupt Vector
(0103)     // call	void_handler
(0104)     reti
    0018: 7E       RETI  
    0019: 30       HALT  
    001A: 30       HALT  
    001B: 30       HALT  
(0105) 
(0106)     org   1Ch                      ;GPIO Interrupt Vector
(0107)     ljmp	PSoC_GPIO_ISR
    001C: 7D 0A B0 LJMP  PSoC_GPIO_ISR
(0108)     reti
    001F: 7E       RETI  
(0109) 
(0110)     org   20h                      ;PSoC Block DBB00 Interrupt Vector
(0111)     ljmp	_Timer8_ISR
    0020: 7D 03 2E LJMP  0x032E
(0112)     reti
    0023: 7E       RETI  
(0113) 
(0114)     org   24h                      ;PSoC Block DBB01 Interrupt Vector
(0115)     // call	void_handler
(0116)     reti
    0024: 7E       RETI  
    0025: 30       HALT  
    0026: 30       HALT  
    0027: 30       HALT  
(0117) 
(0118)     org   28h                      ;PSoC Block DCB02 Interrupt Vector
(0119)     ljmp	_Timer16_ISR
    0028: 7D 03 32 LJMP  0x0332
(0120)     reti
    002B: 7E       RETI  
(0121) 
(0122)     org   2Ch                      ;PSoC Block DCB03 Interrupt Vector
(0123)     // call	void_handler
(0124)     reti
    002C: 7E       RETI  
    002D: 30       HALT  
    002E: 30       HALT  
    002F: 30       HALT  
    0030: 30       HALT  
    0031: 30       HALT  
    0032: 30       HALT  
    0033: 30       HALT  
    0034: 30       HALT  
    0035: 30       HALT  
    0036: 30       HALT  
    0037: 30       HALT  
    0038: 30       HALT  
    0039: 30       HALT  
    003A: 30       HALT  
    003B: 30       HALT  
    003C: 30       HALT  
    003D: 30       HALT  
    003E: 30       HALT  
    003F: 30       HALT  
(0125) 
(0126)     org   40h                      ;USB Reset Interrupt Vector
(0127)     // call	void_handler
(0128)     reti
    0040: 7E       RETI  
    0041: 30       HALT  
    0042: 30       HALT  
    0043: 30       HALT  
(0129) 
(0130)     org   44h                      ;USB SOF Interrupt Vector
(0131)     // call	void_handler
(0132)     reti
    0044: 7E       RETI  
    0045: 30       HALT  
    0046: 30       HALT  
    0047: 30       HALT  
(0133) 
(0134)     org   48h                      ;USB EP0 Interrupt Vector
(0135)     // call	void_handler
(0136)     reti
    0048: 7E       RETI  
    0049: 30       HALT  
    004A: 30       HALT  
    004B: 30       HALT  
(0137) 
(0138)     org   4Ch                      ;USB EP1 Interrupt Vector
(0139)     // call	void_handler
(0140)     reti
    004C: 7E       RETI  
    004D: 30       HALT  
    004E: 30       HALT  
    004F: 30       HALT  
(0141) 
(0142)     org   50h                      ;USB EP2 Interrupt Vector
(0143)     // call	void_handler
(0144)     reti
    0050: 7E       RETI  
    0051: 30       HALT  
    0052: 30       HALT  
    0053: 30       HALT  
(0145) 
(0146)     org   54h                      ;USB EP3 Interrupt Vector
(0147)     // call	void_handler
(0148)     reti
    0054: 7E       RETI  
    0055: 30       HALT  
    0056: 30       HALT  
    0057: 30       HALT  
(0149) 
(0150)     org   58h                      ;USB EP4 Interrupt Vector
(0151)     // call	void_handler
(0152)     reti
    0058: 7E       RETI  
    0059: 30       HALT  
    005A: 30       HALT  
    005B: 30       HALT  
(0153) 
(0154)     org   5Ch                      ;USB Wakeup Interrupt Vector
(0155)     // call	void_handler
(0156)     reti
    005C: 7E       RETI  
    005D: 30       HALT  
    005E: 30       HALT  
    005F: 30       HALT  
(0157) 
(0158)     org   60h                      ;PSoC I2C Interrupt Vector
(0159)     // call	void_handler
(0160)     reti
    0060: 7E       RETI  
    0061: 30       HALT  
    0062: 30       HALT  
    0063: 30       HALT  
(0161) 
(0162)     org   64h                      ;Sleep Timer Interrupt Vector
(0163)     // call	void_handler
(0164)     reti
    0064: 7E       RETI  
    0065: 30       HALT  
    0066: 30       HALT  
    0067: 30       HALT  
(0165) 
(0166) ;-----------------------------------------------------------------------------
(0167) ;  Start of Execution.
(0168) ;-----------------------------------------------------------------------------
(0169) ;  The Supervisory ROM SWBootReset function has already completed the
(0170) ;  calibrate1 process, loading trim values for 5 volt operation.
(0171) ;
(0172)     org 68h
(0173) __Start:
(0174) 
(0175)     ; initialize values for voltage stabilization, if required,
(0176)     ; leaving power-on reset (POR) level at the default (low) level, at
(0177)     ; least for now. 
(0178)     ;
(0179)     M8C_SetBank1
    0068: 71 10    OR    F,16
(0180)     mov   reg[VLT_CR], LVD_TBEN_JUST | TRIP_VOLTAGE_JUST
    006A: 62 E3 07 MOV   REG[227],7
(0181)     M8C_SetBank0
    006D: 70 EF    AND   F,239
(0182) 
(0183)     ; %53%20%46%46% Apply Erratum 001-05137 workaround
(0184)     mov   A, 20h
    006F: 50 20    MOV   A,32
(0185)     romx
    0071: 28       ROMX  
(0186)     ; %45%20%46%46% End workaround
(0187) 	
(0188) IF ( WATCHDOG_ENABLE )             ; WDT selected in Global Params
(0189)     M8C_EnableWatchDog
(0190) ENDIF
(0191) 
(0192)     and  reg[CPU_SCR1], ~CPU_SCR1_ECO_ALLOWED  ; Prevent ECO from being enabled
    0072: 41 FE FB AND   REG[254],251
(0193) 
(0194)     ;---------------------------
(0195)     ; Set up the Temporary stack
(0196)     ;---------------------------
(0197)     ; A temporary stack is set up for the SSC instructions.
(0198)     ; The real stack start will be assigned later.
(0199)     ;
(0200) _stack_start:          equ 80h
(0201)     mov   A, _stack_start          ; Set top of stack to end of used RAM
    0075: 50 80    MOV   A,128
(0202)     swap  SP, A                    ; This is only temporary if going to LMM
    0077: 4E       SWAP  SP,A
(0203) 
(0204)     ;------------------------
(0205)     ; Set Power-related Trim 
(0206)     ;------------------------
(0207) 
(0208) IF ( POWER_SETTING & POWER_SET_5V0)            ; *** 5.0 Volt operation   ***