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0013 PRT4DM2: equ 13h ; Port 4 Drive Mode 2 (RW)
0000 ; Port 5
0014 PRT5DR: equ 14h ; Port 5 Data Register (RW)
0015 PRT5IE: equ 15h ; Port 5 Interrupt Enable Register (RW)
0016 PRT5GS: equ 16h ; Port 5 Global Select Register (RW)
0017 PRT5DM2: equ 17h ; Port 5 Drive Mode 2 (RW)
0000 ; Port 7
001C PRT7DR: equ 1Ch ; Port 7 Data Register (RW)
001D PRT7IE: equ 1Dh ; Port 7 Interrupt Enable Register (RW)
001E PRT7GS: equ 1Eh ; Port 7 Global Select Register (RW)
001F PRT7DM2: equ 1Fh ; Port 7 Drive Mode 2 (RW)
0000
0000
0000 ;------------------------------------------------
0000 ; Digital PSoC(tm) block Registers
0000 ; Note: Also see this address range in Bank 1.
0000 ;------------------------------------------------
0000 ; Digital PSoC block 00, Basic Type B
0020 DBB00DR0: equ 20h ; data register 0 (#)
0021 DBB00DR1: equ 21h ; data register 1 (W)
0022 DBB00DR2: equ 22h ; data register 2 (RW)
0023 DBB00CR0: equ 23h ; control & status register 0 (#)
0000
0000 ; Digital PSoC block 01, Basic Type B
0024 DBB01DR0: equ 24h ; data register 0 (#)
0025 DBB01DR1: equ 25h ; data register 1 (W)
0026 DBB01DR2: equ 26h ; data register 2 (RW)
0027 DBB01CR0: equ 27h ; control & status register 0 (#)
0000
0000 ; Digital PSoC block 02, Communications Type B
0028 DCB02DR0: equ 28h ; data register 0 (#)
0029 DCB02DR1: equ 29h ; data register 1 (W)
002A DCB02DR2: equ 2Ah ; data register 2 (RW)
002B DCB02CR0: equ 2Bh ; control & status register 0 (#)
0000
0000 ; Digital PSoC block 03, Communications Type B
002C DCB03DR0: equ 2Ch ; data register 0 (#)
002D DCB03DR1: equ 2Dh ; data register 1 (W)
002E DCB03DR2: equ 2Eh ; data register 2 (RW)
002F DCB03CR0: equ 2Fh ; control & status register 0 (#)
0000
0000 ;------------------------------------------------
0000 ; PMA Data Registers
0000 ;------------------------------------------------
0000
0040 PMA0_DR: equ 40h ; PMA Data Register (RW)
0041 PMA1_DR: equ 41h ; PMA Data Register (RW)
0042 PMA2_DR: equ 42h ; PMA Data Register (RW)
0043 PMA3_DR: equ 43h ; PMA Data Register (RW)
0044 PMA4_DR: equ 44h ; PMA Data Register (RW)
0045 PMA5_DR: equ 45h ; PMA Data Register (RW)
0046 PMA6_DR: equ 46h ; PMA Data Register (RW)
0047 PMA7_DR: equ 47h ; PMA Data Register (RW)
0000
0000 ;------------------------------------------------
0000 ; USB Registers
0000 ;------------------------------------------------
0000
0048 USB_SOF0: equ 48h ; SOF Frame Number LSB(7:0) (R)
0049 USB_SOF1: equ 49h ; SOF Frame Number MSB(10:8) (R)
0000
004A USB_CR0: equ 4Ah ; USB Control Register 0 (RW)
0080 USB_CR0_ENABLE: equ 80h ; MASK: enable/disable USB SIE (RW)
007F USB_CR0_DEVICE_ADDR: equ 7Fh ; MASK: USB Device Address (RW)
0000
004B USBIO_CR0: equ 4Bh ; USB IO Control Register 0 (#)
0080 USBIO_CR0_TEN: equ 80h ; MASK: enable/disable manual tx on D+ D-(RW)
0040 USBIO_CR0_TSE0: equ 40h ; MASK: transmit a single ended 0 (RW)
0020 USBIO_CR0_TD: equ 20h ; MASK: transmit J or K state on Bus (RW)
0001 USBIO_CR0_RD: equ 01h ; MASK: read state of differential rx (R)
0000
004C USBIO_CR1: equ 4Ch ; USB IO Control Register 0 (#)
0080 USBIO_CR1_IOMODE: equ 80h ; MASK: select Bit Bang Mode/USB Mode (RW)
0040 USBIO_CR1_DRIVE_MODE: equ 40h ; MASK: select CMOS mode/Open Drain mode (RW)
0020 USBIO_CR1_DPI: equ 20h ; MASK: drive D+ high/low (RW)
0010 USBIO_CR1_DMI: equ 10h ; MASK: drive D- high/low (RW)
0008 USBIO_CR1_PS2PUEN: equ 08h ; MASK: enable/disable 5K Pullup on D+/D-(RW)
0004 USBIO_CR1_USBPUEN: equ 04h ; MASK: enable/disable USB Pullup on D+ (RW)
0002 USBIO_CR1_DPO: equ 02h ; MASK: read D+ pin (R)
0001 USBIO_CR1_DMO: equ 01h ; MASK: read D- pin (R)
0000
0000
0000 ;------------------------------------------------
0000 ; USB Endpoint Registers
0000 ;------------------------------------------------
0000
004E EP1_CNT1: equ 4Eh ; Endpoint 1 Count Register 1 (#)
0080 EP1_CNT1_DATA_TOGGLE: equ 80h ; MASK: select data toggle 1/0 (RW)
0040 EP1_CNT1_DATA_VALID: equ 40h ; MASK: read error status on rx data (R)
0001 EP1_CNT1_CNT_MSB: equ 01h ; MASK: MSB of 9-bit count value (RW)
0000
004F EP1_CNT: equ 4Fh ; Endpoint 1 Count Register 0 (RW)
0000
0050 EP2_CNT1: equ 50h ; Endpoint 2 Count Register 1 (#)
0080 EP2_CNT1_DATA_TOGGLE: equ 80h ; MASK: select data toggle 1/0 (RW)
0040 EP2_CNT1_DATA_VALID: equ 40h ; MASK: read error status on rx data (R)
0001 EP2_CNT1_CNT_MSB: equ 01h ; MASK: MSB of 9-bit count value (RW)
0000
0051 EP2_CNT: equ 51h ; Endpoint 2 Count Register 0 (RW)
0000
0052 EP3_CNT1: equ 52h ; Endpoint 3 Count Register 1 (#)
0080 EP3_CNT1_DATA_TOGGLE: equ 80h ; MASK: select data toggle 1/0 (RW)
0040 EP3_CNT1_DATA_VALID: equ 40h ; MASK: read error status on rx data (R)
0001 EP3_CNT1_CNT_MSB: equ 01h ; MASK: MSB of 9-bit count value (RW)
0000
0053 EP3_CNT: equ 53h ; Endpoint 3 Count Register 0 (RW)
0000
0054 EP4_CNT1: equ 54h ; Endpoint 4 Count Register 1 (#)
0080 EP4_CNT1_DATA_TOGGLE: equ 80h ; MASK: select data toggle 1/0 (RW)
0040 EP4_CNT1_DATA_VALID: equ 40h ; MASK: read error status on rx data (R)
0001 EP4_CNT1_CNT_MSB: equ 01h ; MASK: MSB of 9-bit count value (RW)
0000
0055 EP4_CNT: equ 55h ; Endpoint 4 Count Register 0 (RW)
0000
0056 EP0_CR0: equ 56h ; Endpoint 0 Control Register 0 (#)
0080 EP0_CR0_SETUP_RCVD: equ 80h ; MASK: Setup received (RC)
0040 EP0_CR0_IN_RCVD: equ 40h ; MASK: IN received (RC)
0020 EP0_CR0_OUT_RCVD: equ 20h ; MASK: OUT received (RC)
0010 EP0_CR0_ACKD: equ 10h ; MASK: Acked transaction (RC)
000F EP0_CR0_MODE: equ 0Fh ; MASK: Mode response for endpoint (RW)
0000
0057 EP0_CNT: equ 57h ; Endpoint 0 Count Register (#)
0080 EP0_CNT_DATA_TOGGLE: equ 80h ; MASK: select data toggle 1/0 (RW)
0040 EP0_CNT_DATA_VALID: equ 40h ; MASK: read error status on rx data (RC)
000F EP0_CNT_BYTE_CNT: equ 0Fh ; MASK: MSB of 9-bit count value (RW)
0000
0058 EP0_DR0: equ 58h ; Endpoint 0 Data Register 0 (RW)
0059 EP0_DR1: equ 59h ; Endpoint 0 Data Register 1 (RW)
005A EP0_DR2: equ 5Ah ; Endpoint 0 Data Register 2 (RW)
005B EP0_DR3: equ 5Bh ; Endpoint 0 Data Register 3 (RW)
005C EP0_DR4: equ 5Ch ; Endpoint 0 Data Register 4 (RW)
005D EP0_DR5: equ 5Dh ; Endpoint 0 Data Register 5 (RW)
005E EP0_DR6: equ 5Eh ; Endpoint 0 Data Register 6 (RW)
005F EP0_DR7: equ 5Fh ; Endpoint 0 Data Register 7 (RW)
0000
0000 ;-------------------------------------
0000 ; Analog Control Registers
0000 ;-------------------------------------
0060 AMX_IN: equ 60h ; Analog Input Multiplexor Control (RW)
000C AMX_IN_ACI1: equ 0Ch ; MASK: column 1 input mux
0003 AMX_IN_ACI0: equ 03h ; MASK: column 0 input mux
0000
0061 AMUXCFG: equ 61h ; Analog Mux Bus Configuration Register (RW)
0080 AMUXCFG_BCOL0_MUX: equ 80h ; MASK: select AMuxBusB for Col1 input (RW)
0040 AMUXCFG_ACOL0_MUX: equ 40h ; MASK: select AMuxBusA for Col0 input (RW)
0030 AMUXCFG_INTCAP: equ 30h ; MASK: select pins for static operation (RW)
000E AMUXCFG_MUXCLK: equ 0Eh ; MASK: select precharge clock source (RW)
0001 AMUXCFG_EN: equ 01h ; MASK: enable/disable MUXCLK (RW)
0000
0063 ARF_CR: equ 63h ; Analog Reference Control Register (RW)
0040 ARF_CR_HBE: equ 40h ; MASK: Bias level control
0038 ARF_CR_REF: equ 38h ; MASK: Analog Reference controls
0007 ARF_CR_REFPWR: equ 07h ; MASK: Analog Reference power
0003 ARF_CR_SCPWR: equ 03h ; MASK: Switched Cap block power
0000
0064 CMP_CR0: equ 64h ; Analog Comparator Bus 0 Register (#)
0020 CMP_CR0_COMP1: equ 20h ; MASK: Column 1 comparator state (R)
0010 CMP_CR0_COMP0: equ 10h ; MASK: Column 0 comparator state (R)
0002 CMP_CR0_AINT1: equ 02h ; MASK: Column 1 interrupt source (RW)
0001 CMP_CR0_AINT0: equ 01h ; MASK: Column 0 interrupt source (RW)
0000
0065 ASY_CR: equ 65h ; Analog Synchronizaton Control (#)
0070 ASY_CR_SARCOUNT: equ 70h ; MASK: SAR support: resolution count (W)
0008 ASY_CR_SARSIGN: equ 08h ; MASK: SAR support: sign (RW)
0006 ASY_CR_SARCOL: equ 06h ; MASK: SAR support: column spec (RW)
0001 ASY_CR_SYNCEN: equ 01h ; MASK: Stall bit (RW)
0000
0066 CMP_CR1: equ 66h ; Analog Comparator Bus 1 Register (RW)
0020 CMP_CR1_CLDIS1: equ 20h ; MASK: Column 1 comparator bus synch
0010 CMP_CR1_CLDIS0: equ 10h ; MASK: Column 0 comparator bus synch
0002 CMP_CR1_CLDIX1: equ 02h ; MASK: Column 1 comparator bus synch
0001 CMP_CR1_CLDIX0: equ 01h ; MASK: Column 0 comparator bus synch
0000
0000 ;-----------------------------------------------
0000 ; Global General Purpose Data Registers
0000 ;-----------------------------------------------
006C TMP_DR0: equ 6Ch ; Temporary Data Register 0 (RW)
006D TMP_DR1: equ 6Dh ; Temporary Data Register 1 (RW)
006E TMP_DR2: equ 6Eh ; Temporary Data Register 2 (RW)
006F TMP_DR3: equ 6Fh ; Temporary Data Register 3 (RW)
0000
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