psocgpioint.inc

cy8c24794单片机程序

; Generated by PSoC Designer ver 4.2  b1013 : 02 September, 2004
;
;
;  PSoCGPIOINT.inc
;
;  Data: 29 October, 2001
;  Copyright Cypress MicroSystems 2001
;
;  This file is generated by the Device Editor on Application Generation.
;  It contains equates that are useful in writing code relating to GPIO
;  related interrupts.
;  
;  DO NOT EDIT THIS FILE MANUALLY, AS IT IS OVERWRITTEN!!!
;  Edits to this file will not be preserved.
;
; Port_5_7 address and mask equates
Port_5_7_Data_ADDR:	equ	14h
Port_5_7_DriveMode_0_ADDR:	equ	114h
Port_5_7_DriveMode_1_ADDR:	equ	115h
Port_5_7_DriveMode_2_ADDR:	equ	17h
Port_5_7_GlobalSelect_ADDR:	equ	16h
Port_5_7_IntCtrl_0_ADDR:	equ	116h
Port_5_7_IntCtrl_1_ADDR:	equ	117h
Port_5_7_IntEn_ADDR:	equ	17h
Port_5_7_MASK:	equ	80h
Port_5_7_MUXBusCtrl_ADDR:	equ	1edh
; Port_5_5 address and mask equates
Port_5_5_Data_ADDR:	equ	14h
Port_5_5_DriveMode_0_ADDR:	equ	114h
Port_5_5_DriveMode_1_ADDR:	equ	115h
Port_5_5_DriveMode_2_ADDR:	equ	17h
Port_5_5_GlobalSelect_ADDR:	equ	16h
Port_5_5_IntCtrl_0_ADDR:	equ	116h
Port_5_5_IntCtrl_1_ADDR:	equ	117h
Port_5_5_IntEn_ADDR:	equ	17h
Port_5_5_MASK:	equ	20h
Port_5_5_MUXBusCtrl_ADDR:	equ	1edh
; Port_5_4 address and mask equates
Port_5_4_Data_ADDR:	equ	14h
Port_5_4_DriveMode_0_ADDR:	equ	114h
Port_5_4_DriveMode_1_ADDR:	equ	115h
Port_5_4_DriveMode_2_ADDR:	equ	17h
Port_5_4_GlobalSelect_ADDR:	equ	16h
Port_5_4_IntCtrl_0_ADDR:	equ	116h
Port_5_4_IntCtrl_1_ADDR:	equ	117h
Port_5_4_IntEn_ADDR:	equ	17h
Port_5_4_MASK:	equ	10h
Port_5_4_MUXBusCtrl_ADDR:	equ	1edh
; Port_5_6 address and mask equates
Port_5_6_Data_ADDR:	equ	14h
Port_5_6_DriveMode_0_ADDR:	equ	114h
Port_5_6_DriveMode_1_ADDR:	equ	115h
Port_5_6_DriveMode_2_ADDR:	equ	17h
Port_5_6_GlobalSelect_ADDR:	equ	16h
Port_5_6_IntCtrl_0_ADDR:	equ	116h
Port_5_6_IntCtrl_1_ADDR:	equ	117h
Port_5_6_IntEn_ADDR:	equ	17h
Port_5_6_MASK:	equ	40h
Port_5_6_MUXBusCtrl_ADDR:	equ	1edh