📄 pwm_led.lst
字号:
__text_start:
__start:
0013 E5CF LDI R28,0x5F
0014 E0D4 LDI R29,4
0015 BFCD OUT 0x3D,R28
0016 BFDE OUT 0x3E,R29
0017 51C0 SUBI R28,0x10
0018 40D0 SBCI R29,0
0019 EA0A LDI R16,0xAA
001A 8308 STD Y+0,R16
001B 2400 CLR R0
001C E6E0 LDI R30,0x60
001D E0F0 LDI R31,0
001E E010 LDI R17,0
001F 36E7 CPI R30,0x67
0020 07F1 CPC R31,R17
0021 F011 BEQ 0x0024
0022 9201 ST R0,Z+
0023 CFFB RJMP 0x001F
0024 8300 STD Z+0,R16
0025 E2E6 LDI R30,0x26
0026 E0F0 LDI R31,0
0027 E6A0 LDI R26,0x60
0028 E0B0 LDI R27,0
0029 E010 LDI R17,0
002A 32E6 CPI R30,0x26
002B 07F1 CPC R31,R17
002C F021 BEQ 0x0031
002D 95C8 LPM
002E 9631 ADIW R30,1
002F 920D ST R0,X+
0030 CFF9 RJMP 0x002A
0031 D048 RCALL _main
_exit:
0032 CFFF RJMP _exit
FILE: D:\AVR\User\AVR_PWM\Timer.c
(0001) #include <iom8v.h>
(0002) #include <macros.h>
(0003) #include <math.h>
(0004)
(0005) #define Uchar unsigned char
(0006) #define Uint unsigned int
(0007) #define Ulong unsigned long
(0008)
(0009) Uchar time_init;
(0010) Uchar CNT1;
(0011) Uchar CNT2;
(0012) Uchar CNT3;
(0013) Uchar LMT1;
(0014) Uchar LMT2;
(0015) Uchar LMT3;
(0016)
(0017) //TIMER1 initialize - prescale:1024
(0018) // WGM: 0) Normal, TOP=0xFFFF
(0019) // desired value: 1Hz
(0020) // actual value: 1.000Hz (0.0%)
(0021) void timer1_init(void)
(0022) {
(0023) TCCR1B = 0x00; //stop
_timer1_init:
0033 2422 CLR R2
0034 BC2E OUT 0x2E,R2
(0024) TCNT1H = 0xfe; //setup
0035 EF8E LDI R24,0xFE
0036 BD8D OUT 0x2D,R24
(0025) TCNT1L = 0x00;
0037 BC2C OUT 0x2C,R2
(0026) OCR1AH = 0x0F;
0038 E08F LDI R24,0xF
0039 BD8B OUT 0x2B,R24
(0027) OCR1AL = 0x42;
003A E482 LDI R24,0x42
003B BD8A OUT 0x2A,R24
(0028) OCR1BH = 0x0F;
003C E08F LDI R24,0xF
003D BD89 OUT 0x29,R24
(0029) OCR1BL = 0x42;
003E E482 LDI R24,0x42
003F BD88 OUT 0x28,R24
(0030) ICR1H = 0x0F;
0040 E08F LDI R24,0xF
0041 BD87 OUT 0x27,R24
(0031) ICR1L = 0x42;
0042 E482 LDI R24,0x42
0043 BD86 OUT 0x26,R24
(0032) TCCR1A = 0x00;
0044 BC2F OUT 0x2F,R2
(0033) TCCR1B = 0x01; //start Timer
0045 E081 LDI R24,1
0046 BD8E OUT 0x2E,R24
0047 9508 RET
_timer1_ovf_isr:
0048 922A ST R2,-Y
0049 924A ST R4,-Y
004A 938A ST R24,-Y
004B 939A ST R25,-Y
004C B62F IN R2,0x3F
004D 922A ST R2,-Y
(0034) }
(0035)
(0036) #pragma interrupt_handler timer1_ovf_isr:9
(0037) void timer1_ovf_isr(void)
(0038) {
(0039) TCNT1H = 0xfe; //reload counter high value
004E EF8E LDI R24,0xFE
004F BD8D OUT 0x2D,R24
(0040) TCNT1L = 0x00; //reload counter low value
0050 2422 CLR R2
0051 BC2C OUT 0x2C,R2
(0041) ++CNT1;
0052 91800065 LDS R24,CNT1
0054 5F8F SUBI R24,0xFF
0055 93800065 STS CNT1,R24
(0042) if(CNT1>=LMT1)
0057 90200062 LDS R2,LMT1
0059 1582 CP R24,R2
005A F0A8 BCS 0x0070
(0043) {
(0044) CNT1=0;
005B 2422 CLR R2
005C 92200065 STS CNT1,R2
(0045) if(++CNT2>=LMT2)
005E 91800064 LDS R24,CNT2
0060 5F8F SUBI R24,0xFF
0061 2E28 MOV R2,R24
0062 92200064 STS CNT2,R2
0064 90400061 LDS R4,LMT2
0066 1584 CP R24,R4
0067 F040 BCS 0x0070
(0046) {
(0047) CNT2=0;
0068 2422 CLR R2
0069 92200064 STS CNT2,R2
(0048) CNT3=~CNT3;
006B 90200063 LDS R2,CNT3
006D 9420 COM R2
006E 92200063 STS CNT3,R2
(0049) }
(0050) }
(0051) time_init=1;
0070 E081 LDI R24,1
0071 93800066 STS time_init,R24
0073 9029 LD R2,Y+
0074 BE2F OUT 0x3F,R2
0075 9199 LD R25,Y+
0076 9189 LD R24,Y+
0077 9049 LD R4,Y+
0078 9029 LD R2,Y+
0079 9518 RETI
(0052) }
(0053)
(0054) /*void flush(UCHAR ios,UCHAR ioc)
(0055) {
(0056) UCHAR a;
(0057) if(time_init)
(0058) {
(0059) time_init=0;
(0060) if(CNT1<=CNT2)
(0061) {
(0062) PORTB=ios;
(0063) }
(0064) else
(0065) PORTB=ioc;
(0066) }
(0067) }
(0068) */
(0069) void main(void)
(0070) {
(0071) OSCCAL=0X9d;
_main:
007A E98D LDI R24,0x9D
007B BF81 OUT 0x31,R24
(0072) CLI(); //disable all interrupts
007C 94F8 BCLR 7
(0073) timer1_init();
007D DFB5 RCALL _timer1_init
(0074) PORTB = 0x00;
007E 2422 CLR R2
007F BA28 OUT 0x18,R2
(0075) DDRB = 0xff;
0080 EF8F LDI R24,0xFF
0081 BB87 OUT 0x17,R24
(0076) MCUCR = 0x00;
0082 BE25 OUT 0x35,R2
(0077) GICR = 0x00;
0083 BE2B OUT 0x3B,R2
(0078) TIMSK = 0x04; //timer interrupt sources
0084 E084 LDI R24,4
0085 BF89 OUT 0x39,R24
(0079) time_init=0;
0086 92200066 STS time_init,R2
(0080) LMT1=250;
0088 EF8A LDI R24,0xFA
0089 93800062 STS LMT1,R24
(0081) LMT2=250;
008B 93800061 STS LMT2,R24
(0082) LMT3=1;
008D E081 LDI R24,1
008E 93800060 STS LMT3,R24
(0083) CNT1=CNT2=CNT3=0;
0090 92200063 STS CNT3,R2
0092 92200064 STS CNT2,R2
0094 92200065 STS CNT1,R2
(0084) SEI(); //re-enable interrupts
0096 9478 BSET 7
0097 C029 RJMP 0x00C1
(0085)
(0086) while(1)
(0087) {
(0088) if (!CNT3)
0098 90200063 LDS R2,CNT3
009A 2022 TST R2
009B F499 BNE 0x00AF
(0089) {
(0090) if(time_init)
009C 90200066 LDS R2,time_init
009E 2022 TST R2
009F F109 BEQ 0x00C1
(0091) {
(0092) time_init=0;
00A0 2422 CLR R2
00A1 92200066 STS time_init,R2
(0093) if(CNT1<=CNT2)
00A3 90200064 LDS R2,CNT2
00A5 90300065 LDS R3,CNT1
00A7 1423 CP R2,R3
00A8 F018 BCS 0x00AC
(0094) {
(0095) PORTB=1;
00A9 E081 LDI R24,1
00AA BB88 OUT 0x18,R24
(0096) }
00AB C015 RJMP 0x00C1
(0097) else
(0098) PORTB=0;
00AC 2422 CLR R2
00AD BA28 OUT 0x18,R2
(0099) }
(0100) }
00AE C012 RJMP 0x00C1
(0101) else
(0102) if(time_init)
00AF 90200066 LDS R2,time_init
00B1 2022 TST R2
00B2 F071 BEQ 0x00C1
(0103) {
(0104) time_init=0;
00B3 2422 CLR R2
00B4 92200066 STS time_init,R2
(0105) if(CNT1<=CNT2)
00B6 90200064 LDS R2,CNT2
00B8 90300065 LDS R3,CNT1
00BA 1423 CP R2,R3
00BB F018 BCS 0x00BF
(0106) {
(0107) PORTB=0;
00BC 2422 CLR R2
00BD BA28 OUT 0x18,R2
(0108) }
00BE C002 RJMP 0x00C1
(0109) else
(0110) PORTB=1;
FILE: <library>
00BF E081 LDI R24,1
00C0 BB88 OUT 0x18,R24
00C1 CFD6 RJMP 0x0098
00C2 9508 RET
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