enc28j60.c

Taiwan sunplus develop spce3200, it is a test program ----- testboard source code

	}

	// Calculate and set the DMA end address
	i.Val = TXSTART + (WORD)UnmaskedPatternLen - 1;
	WriteReg(EDMANDL, i.v[0]);
	WriteReg(EDMANDH, i.v[1]);

	// Calculate the checksum on the given pattern using the DMA module
	BFSReg(ECON1, ECON1_DMAST | ECON1_CSUMEN);
	while(ReadETHReg(ECON1).ECON1bits.DMAST);

	// Make certain that the PM filter isn't enabled while it is 
	// being reconfigured.
	BankSel(ERXFCON);
	WriteReg(ERXFCON, ERXFCON_UCEN | ERXFCON_CRCEN | ERXFCON_BCEN);

	// Get the calculated DMA checksum and store it in the PM 
	// checksum registers
	i.v[0] == ReadETHReg(EDMACSL).Val;
	i.v[1] == ReadETHReg(EDMACSH).Val;
	WriteReg(EPMCSL, i.v[0]);
	WriteReg(EPMCSH, i.v[0]);

	// Set the Pattern Match offset and 8 byte mask
	WriteReg(EPMOL, ((WORD_VAL*)&PatternOffset)->v[0]);
	WriteReg(EPMOH, ((WORD_VAL*)&PatternOffset)->v[1]);
	for(i.Val = EPMM0; i.Val <= EPMM7 ; i.Val++)
	{
		WriteReg(i.Val, *PatternMask++);
	}

	// Begin using the new Pattern Match filter instead of the 
	// broadcast filter
	WriteReg(ERXFCON, ERXFCON_UCEN | ERXFCON_CRCEN | ERXFCON_PMEN);
}//end MACSetPMFilter


/******************************************************************************
 * Function:		void MACDisablePMFilter(void)
 *
 * PreCondition:	SPI bus must be initialized (done in MACInit()).
 *
 * Input:			None
 *
 * Output:			None
 *
 * Side Effects:    None
 *
 * Overview:        MACDisablePMFilter disables the Pattern Match receive 
 *					filter (if enabled) and returns to the default filter 
 *					configuration of: CRC AND (Unicast OR Broadcast).
 *
 * Note:            None
 *****************************************************************************/
void MACDisablePMFilter(void)
{
	BankSel(ERXFCON);
	WriteReg(ERXFCON, ERXFCON_UCEN | ERXFCON_CRCEN | ERXFCON_BCEN);
	return;
}//end MACDisablePMFilter
#endif // end of MAC_FILTER_BROADCASTS specific code


/******************************************************************************
 * Function:        	unsigned char MACGet()
 *
 * PreCondition:    	SPI bus must be initialized (done in MACInit()).
 * 						ERDPT must point to the place to read from.
 *
 * Input:           	None
 *
 * Output:          	Byte read from the ENC28J60's RAM
 *
 * Side Effects:    	None
 *
 * Overview:        	MACGet returns the byte pointed to by ERDPT and 
 *						increments ERDPT so MACGet() can be called again.  The 
 *						increment will follow the receive buffer wrapping boundary.
 *
 * Note:            	None
 *****************************************************************************/
unsigned char MACGet()
{

	unsigned char data;
	data = getSPIchar( RBM );

  	return data;
   
}//end MACGet



/******************************************************************************
 * Function:        	WORD MACGetArray(unsigned char *val, WORD len)
 *
 * PreCondition:    	SPI bus must be initialized (done in MACInit()).
 * 						ERDPT must point to the place to read from.
 *
 * Input:           	*val: Pointer to storage location
 *						len: Number of bytes to read from the data buffer.
 *
 * Output:          	Byte(s) of data read from the data buffer.
 *
 * Side Effects:    	None
 *
 * Overview:        	Burst reads several sequential bytes from the data buffer 
 *						and places them into local memory.  With SPI burst support, 
 *						it performs much faster than multiple MACGet() calls.
 *						ERDPT is incremented after each byte, following the same 
 *						rules as MACGet().
 *
 * Note:            	None
 *****************************************************************************/
WORD MACGetArray(unsigned char *val, WORD len)
{

   	WORD i;
	i =0;

    while(i<len)
    {
    	*val = getSPIchar( RBM );
   		val++;
		i++;
    }

	return i;
}//end MACGetArray


/******************************************************************************
 * Function:        	void MACPut(unsigned char val)
 *
 * PreCondition:    	SPI bus must be initialized (done in MACInit()).
 * 						EWRPT must point to the location to begin writing.
 *
 * Input:           	Byte to write into the ENC28J60 buffer memory
 *
 * Output:          	None
 *
 * Side Effects:    	None
 *
 * Overview:        	MACPut outputs the Write Buffer Memory opcode/constant 
 *						(8 bits) and data to write (8 bits) over the SPI.  
 *						EWRPT is incremented after the write.
 *
 * Note:            	None
 *****************************************************************************/
void MACPut(unsigned char val)
{

	putSPIchar2( WBM,  val);

}//end MACPut


/******************************************************************************
 * Function:        	void MACPutArray(unsigned char *val, WORD len)
 *
 * PreCondition:    	SPI bus must be initialized (done in MACInit()).
 * 						EWRPT must point to the location to begin writing.
 *
 * Input:           	*val: Pointer to source of bytes to copy.
 *						len:  Number of bytes to write to the data buffer.
 *
 * Output:          	None
 *
 * Side Effects:    	None
 *
 * Overview:        	MACPutArray writes several sequential bytes to the 
 *						ENC28J60 RAM.  It performs faster than multiple MACPut()
 *						calls.  EWRPT is incremented by len.
 *
 * Note:            	None
 *****************************************************************************/
void MACPutArray(unsigned char *val, WORD len)
{

	while(len)
 	{
 		putSPIchar2(WBM, *val);
		val++;	
 		len--;
 	}
 
}//end MACPutArray


/******************************************************************************
 * Function:        	static void SendSystemReset(void)
 *
 * PreCondition:    	SPI bus must be initialized (done in MACInit()).
 *
 * Input:           	None
 *
 * Output:          	None
 *
 * Side Effects:    	None
 *
 * Overview:        	SendSystemReset sends the System Reset SPI command to 
 *						the Ethernet controller.  It resets all register contents 
 *						(except for ECOCON) and returns the device to the power 
 *						on default state.
 *
 * Note:            	None
 *****************************************************************************/
void SendSystemReset(void)
{
	putSPIchar(0xff);
}//end SendSystemReset


/******************************************************************************
 * Function:        	REG ReadETHReg(unsigned char Address)
 *
 * PreCondition:    	SPI bus must be initialized (done in MACInit()).
 * 						Bank select bits must be set corresponding to the register 
 * 						to read from.
 *
 * Input:           	5 bit address of the ETH control register to read from.
 *						The top 3 bits must be 0.
 *
 * Output:         		Byte read from the Ethernet controller's ETH register.
 *
 * Side Effects:    	None
 *
 * Overview:        	ReadETHReg sends the 8 bit RCR opcode/Address byte over 
 *						the SPI and then retrives the register contents in the 
 *						next 8 SPI clocks.
 *
 * Note:            	This routine cannot be used to access MAC/MII or PHY 
 *						registers.  Use ReadMACReg() or ReadPHYReg() for that 
 *						purpose.  
 *****************************************************************************/
REG ReadETHReg(unsigned char Address)
{
	// Select the chip and send the Read Control Register opcode/address

	unsigned int data;

    data=Read_RCR(Address);
    return *((REG*)&data);
}//end ReadETHReg


/******************************************************************************
 * Function:        REG ReadMACReg(unsigned char Address)
 *
 * PreCondition:    SPI bus must be initialized (done in MACInit()).
 * 					Bank select bits must be set corresponding to the register 
 * 					to read from.
 *
 * Input:           5 bit address of the MAC or MII register to read from.
 *					  The top 3 bits must be 0.
 *
 * Output:          Byte read from the Ethernet controller's MAC/MII register.
 *
 * Side Effects:    None
 *
 * Overview:        ReadMACReg sends the 8 bit RCR opcode/Address byte as well 
 *					as a dummy byte over the SPI and then retrives the 
 *					register contents in the last 8 SPI clocks.
 *
 * Note:            This routine cannot be used to access ETH or PHY 
 *					registers.  Use ReadETHReg() or ReadPHYReg() for that 
 *					purpose.  
 *****************************************************************************/
REG ReadMACReg(unsigned char Address)
{

	unsigned int data;
    data=Read_MACRCR(Address);
    return *((REG*)&data);
}//end ReadMACReg


/******************************************************************************
 * Function:        ReadPHYReg
 *
 * PreCondition:    SPI bus must be initialized (done in MACInit()).
 *
 * Input:           Address of the PHY register to read from.
 *
 * Output:          16 bits of data read from the PHY register.
 *
 * Side Effects:    Alters bank bits to point to Bank 2
 *
 * Overview:        ReadPHYReg performs an MII read operation.  While in 
 *					progress, it simply polls the MII BUSY bit wasting time.
 *
 * Note:            None
 *****************************************************************************/
PHYREG ReadPHYReg(unsigned char Register)
{
	PHYREG Result;

	// Set the right address and start the register read operation
	BankSel(MIREGADR);
	WriteReg(MIREGADR, Register);
	WriteReg(MICMD, MICMD_MIIRD);	

	// Loop to wait until the PHY register has been read through the MII
	// This requires 10.24us
	BankSel(MISTAT);
	while(ReadMACReg(MISTAT).MISTATbits.BUSY);

	// Stop reading
	BankSel(MIREGADR);
	WriteReg(MICMD, 0x00);	
	
	// Obtain results and return
	Result.VAL.v[0] = ReadMACReg(MIRDL).Val;
	Result.VAL.v[1] = ReadMACReg(MIRDH).Val;
	return Result;
}//end ReadPHYReg


/******************************************************************************
 * Function:        void WriteReg(unsigned char Address, unsigned char Data)
 *
 * PreCondition:    SPI bus must be initialized (done in MACInit()).
 * 					Bank select bits must be set corresponding to the register 
 *					to modify.
 *
 * Input:           5 bit address of the ETH, MAC, or MII register to modify.  
 *					The top 3 bits must be 0.  
 *					Byte to be written into the register.
 *
 * Output:          None
 *
 * Side Effects:    None
 *
 * Overview:        WriteReg sends the 8 bit WCR opcode/Address byte over the 
 *					SPI and then sends the data to write in the next 8 SPI 
 *					clocks.
 *
 * Note:            This routine is almost identical to the BFCReg() and 
 *					BFSReg() functions.  It is seperate to maximize speed.  
 *					Unlike the ReadETHReg/ReadMACReg functions, WriteReg() 
 *					can write to any ETH or MAC register.  Writing to PHY 
 *					registers must be accomplished with WritePHYReg().
 *****************************************************************************/
void WriteReg(unsigned char Address, unsigned char Data)
{

	Write_WCR((unsigned char)Address,Data);
}//end WriteReg


/******************************************************************************
 * Function:        void BFCReg(unsigned char Address, unsigned char Data)
 *
 * PreCondition:    SPI bus must be initialized (done in MACInit()).
 * 					Bank select bits must be set corresponding to the register 
 *					to modify.
 *
 * Input:           5 bit address of the register to modify.  The top 3 bits 
 *					must be 0.  
 *					Byte to be used with the Bit Field Clear operation.
 *
 * Output:          None
 *
 * Side Effects:    None
 *
 * Overview:        BFCReg sends the 8 bit BFC opcode/Address byte over the 
 *					SPI and then sends the data in the next 8 SPI clocks.
 *
 * Note:            This routine is almost identical to the WriteReg() and 
 *					BFSReg() functions.  It is separate to maximize speed.  
 *					BFCReg() must only be used on ETH registers.
 *****************************************************************************/
void BFCReg(unsigned char Address, unsigned char Data)
{

    Clear_BFC(Address,Data);
}//end BFCReg


/******************************************************************************
 * Function:        void BFSReg(unsigned char Address, unsigned char Data)
 *
 * PreCondition:    SPI bus must be initialized (done in MACInit()).
 * 					Bank select bits must be set corresponding to the register 
 *					to modify.
 *
 * Input:           5 bit address of the register to modify.  The top 3 bits 
 *					must be 0.  
 *					Byte to be used with the Bit Field Set operation.
 *
 * Output:          None
 *
 * Side Effects:    None
 *
 * Overview:        BFSReg sends the 8 bit BFC opcode/Address byte over the 
 *					SPI and then sends the data in the next 8 SPI clocks.
 *
 * Note:            This routine is almost identical to the WriteReg() and 
 *					BFCReg() functions.  It is separate to maximize speed.
 *					BFSReg() must only be used on ETH registers.
 *****************************************************************************/