epson1355fb.c

Epson S1D13505 Embedded RAMDAC LCD/CRT Controller linux 驱动

/*
 * linux/drivers/video/epson1355fb.c -- Epson S1D13505 frame buffer for 2.5.
 *
 * Epson Research S1D13505 Embedded RAMDAC LCD/CRT Controller
 *   (previously known as SED1355)
 *
 * Cf. http://www.erd.epson.com/vdc/html/S1D13505.html
 *
 *
 * Copyright (C) Hewlett-Packard Company.  All rights reserved.
 *
 * Written by Christopher Hoover <[e-mail]>
 *
 * Adapted from:
 *
 *  linux/drivers/video/skeletonfb.c
 *  Modified to new api Jan 2001 by James Simmons ([e-mail])
 *  Created 28 Dec 1997 by Geert Uytterhoeven
 *
 *  linux/drivers/video/epson1355fb.c (2.4 driver)
 *  Copyright (C) 2000 Philipp Rumpf <[e-mail]>
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License. See the file COPYING in the main directory of this archive for
 * more details.
 *
 *
 * Noteworthy Issues
 * -----------------
 *
 * This driver is complicated by the fact that this is a 16-bit chip
 * and, on at least one platform (ceiva), we can only do 16-bit reads
 * and writes to the framebuffer.  We hide this from user space
 * except in the case of mmap().
 *
 *
 * To Do
 * -----
 *
 * - Test 8-bit pseudocolor mode
 * - Allow setting bpp, virtual resolution
 * - Implement horizontal panning
 * - (maybe) Implement hardware cursor
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/tty.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/fb.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/platform_device.h>

#include <asm/types.h>
#include <asm/io.h>
#include <asm/uaccess.h>

#include <video/epson1355.h>

struct epson1355_par {
	unsigned long reg_addr;
};

/* ------------------------------------------------------------------------- */

#ifdef CONFIG_SUPERH

static inline u8 epson1355_read_reg(int index)
{
	return ctrl_inb(par.reg_addr + index);
}

static inline void epson1355_write_reg(u8 data, int index)
{
	ctrl_outb(data, par.reg_addr + index);
}

#elif defined(CONFIG_ARM)

# ifdef CONFIG_ARCH_CEIVA
#  include <asm/arch/hardware.h>
#  define EPSON1355FB_BASE_PHYS	(CEIVA_PHYS_SED1355)
# endif

static inline u8 epson1355_read_reg(struct epson1355_par *par, int index)
{
	return __raw_readb(par->reg_addr + index);
}

static inline void epson1355_write_reg(struct epson1355_par *par, u8 data, int index)
{
	__raw_writeb(data, par->reg_addr + index);
}

#else
# error "no architecture-specific epson1355_{read,write}_reg"
#endif

#ifndef EPSON1355FB_BASE_PHYS
# error  "EPSON1355FB_BASE_PHYS is not defined"
#endif

#define EPSON1355FB_REGS_OFS	(0)
#define EPSON1355FB_REGS_PHYS	(EPSON1355FB_BASE_PHYS + EPSON1355FB_REGS_OFS)
#define EPSON1355FB_REGS_LEN	(64)

#define EPSON1355FB_FB_OFS	(0x00200000)
#define EPSON1355FB_FB_PHYS	(EPSON1355FB_BASE_PHYS + EPSON1355FB_FB_OFS)
#define EPSON1355FB_FB_LEN	(2 * 1024 * 1024)

/* ------------------------------------------------------------------------- */

static inline u16 epson1355_read_reg16(struct epson1355_par *par, int index)
{
	u8 lo = epson1355_read_reg(par, index);
	u8 hi = epson1355_read_reg(par, index + 1);

	return (hi << 8) | lo;
}

static inline void epson1355_write_reg16(struct epson1355_par *par, u16 data, int index)
{
	u8 lo = data & 0xff;
	u8 hi = (data >> 8) & 0xff;

	epson1355_write_reg(par, lo, index);
	epson1355_write_reg(par, hi, index + 1);
}

static inline u32 epson1355_read_reg20(struct epson1355_par *par, int index)
{
	u8 b0 = epson1355_read_reg(par, index);
	u8 b1 = epson1355_read_reg(par, index + 1);
	u8 b2 = epson1355_read_reg(par, index + 2);

	return (b2 & 0x0f) << 16 | (b1 << 8) | b0;
}

static inline void epson1355_write_reg20(struct epson1355_par *par, u32 data, int index)
{
	u8 b0 = data & 0xff;
	u8 b1 = (data >> 8) & 0xff;
	u8 b2 = (data >> 16) & 0x0f;

	epson1355_write_reg(par, b0, index);
	epson1355_write_reg(par, b1, index + 1);
	epson1355_write_reg(par, b2, index + 2);
}

/* ------------------------------------------------------------------------- */

static void set_lut(struct epson1355_par *par, u8 index, u8 r, u8 g, u8 b)
{
	epson1355_write_reg(par, index, REG_LUT_ADDR);
	epson1355_write_reg(par, r, REG_LUT_DATA);
	epson1355_write_reg(par, g, REG_LUT_DATA);
	epson1355_write_reg(par, b, REG_LUT_DATA);
}


/**
 *  	epson1355fb_setcolreg - sets a color register.
 *      @regno: Which register in the CLUT we are programming
 *      @red: The red value which can be up to 16 bits wide
 *	@green: The green value which can be up to 16 bits wide
 *	@blue:  The blue value which can be up to 16 bits wide.
 *	@transp: If supported the alpha value which can be up to 16 bits wide.
 *      @info: frame buffer info structure
 *
 *	Returns negative errno on error, or zero on success.
 */
static int epson1355fb_setcolreg(unsigned regno, unsigned r, unsigned g,
				 unsigned b, unsigned transp,
				 struct fb_info *info)
{
	struct epson1355_par *par = info->par;

	if (info->var.grayscale)
		r = g = b = (19595 * r + 38470 * g + 7471 * b) >> 16;

	switch (info->fix.visual) {
	case FB_VISUAL_TRUECOLOR:
		if (regno >= 16)
			return -EINVAL;

		((u32 *) info->pseudo_palette)[regno] =
		    (r & 0xf800) | (g & 0xfc00) >> 5 | (b & 0xf800) >> 11;

		break;
	case FB_VISUAL_PSEUDOCOLOR:
		if (regno >= 256)
			return -EINVAL;

		set_lut(par, regno, r >> 8, g >> 8, b >> 8);

		break;
	default:
		return -ENOSYS;
	}
	return 0;
}

/* ------------------------------------------------------------------------- */

/**
 *      epson1355fb_pan_display - Pans the display.
 *      @var: frame buffer variable screen structure
 *      @info: frame buffer structure that represents a single frame buffer
 *
 *	Pan (or wrap, depending on the `vmode' field) the display using the
 *  	`xoffset' and `yoffset' fields of the `var' structure.
 *  	If the values don't fit, return -EINVAL.
 *
 *      Returns negative errno on error, or zero on success.
 */
static int epson1355fb_pan_display(struct fb_var_screeninfo *var,
				   struct fb_info *info)
{
	struct epson1355_par *par = info->par;
	u32 start;

	if (var->xoffset != 0)	/* not yet ... */
		return -EINVAL;

	if (var->yoffset + info->var.yres > info->var.yres_virtual)
		return -EINVAL;

	start = (info->fix.line_length >> 1) * var->yoffset;

	epson1355_write_reg20(par, start, REG_SCRN1_DISP_START_ADDR0);

	return 0;
}

/* ------------------------------------------------------------------------- */

static void lcd_enable(struct epson1355_par *par, int enable)
{
	u8 mode = epson1355_read_reg(par, REG_DISPLAY_MODE);

	if (enable)
		mode |= 1;
	else
		mode &= ~1;

	epson1355_write_reg(par, mode, REG_DISPLAY_MODE);
}

#if defined(CONFIG_ARCH_CEIVA)
static void backlight_enable(int enable)
{
	/* ### this should be protected by a spinlock ... */
	u8 pddr = clps_readb(PDDR);
	if (enable)
		pddr |= (1 << 5);
	else
		pddr &= ~(1 << 5);
	clps_writeb(pddr, PDDR);
}
#else
static void backlight_enable(int enable)
{
}
#endif


/**
 *      epson1355fb_blank - blanks the display.
 *      @blank_mode: the blank mode we want.
 *      @info: frame buffer structure that represents a single frame buffer
 *
 *      Blank the screen if blank_mode != 0, else unblank. Return 0 if
 *      blanking succeeded, != 0 if un-/blanking failed due to e.g. a
 *      video mode which doesn't support it. Implements VESA suspend
 *      and powerdown modes on hardware that supports disabling hsync/vsync:
 *      blank_mode == 2: suspend vsync
 *      blank_mode == 3: suspend hsync
 *      blank_mode == 4: powerdown
 *
 *      Returns negative errno on error, or zero on success.
 *
 */
static int epson1355fb_blank(int blank_mode, struct fb_info *info)
{
	struct epson1355_par *par = info->par;

	switch (blank_mode) {
	case FB_BLANK_UNBLANKING:
	case FB_BLANK_NORMAL:
		lcd_enable(par, 1);
		backlight_enable(1);
		break;
	case FB_BLANK_VSYNC_SUSPEND:
	case FB_BLANK_HSYNC_SUSPEND:
		backlight_enable(0);
		break;
	case FB_BLANK_POWERDOWN:
		backlight_enable(0);
		lcd_enable(par, 0);
		break;
	default:
		return -EINVAL;
	}

	/* let fbcon do a soft blank for us */
	return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0;
}

/* ------------------------------------------------------------------------- */

/*
 * We can't use the cfb generic routines, as we have to limit
 * ourselves to 16-bit or 8-bit loads and stores to this 16-bit
 * chip.
 */

static inline void epson1355fb_fb_writel(unsigned long v, unsigned long *a)
{
	u16 *p = (u16 *) a;
	u16 l = v & 0xffff;
	u16 h = v >> 16;

	fb_writew(l, p);
	fb_writew(h, p + 1);
}

static inline unsigned long epson1355fb_fb_readl(const unsigned long *a)
{
	const u16 *p = (u16 *) a;
	u16 l = fb_readw(p);
	u16 h = fb_readw(p + 1);

	return (h << 16) | l;
}

#define FB_READL epson1355fb_fb_readl
#define FB_WRITEL epson1355fb_fb_writel

/* ------------------------------------------------------------------------- */

static inline unsigned long copy_from_user16(void *to, const void *from,
					     unsigned long n)
{
	u16 *dst = (u16 *) to;
	u16 *src = (u16 *) from;

	if (!access_ok(VERIFY_READ, from, n))
		return n;

	while (n > 1) {
		u16 v;
		if (__get_user(v, src))
			return n;

		fb_writew(v, dst);

		src++, dst++;
		n -= 2;
	}

	if (n) {
		u8 v;

		if (__get_user(v, ((u8 *) src)))
			return n;

		fb_writeb(v, dst);
	}
	return 0;
}

static inline unsigned long copy_to_user16(void *to, const void *from,
					   unsigned long n)
{
	u16 *dst = (u16 *) to;
	u16 *src = (u16 *) from;

	if (!access_ok(VERIFY_WRITE, to, n))
		return n;

	while (n > 1) {
		u16 v = fb_readw(src);