atm.cr.mti

来自「atm信元检测」· MTI 代码 · 共 49 行

{F:/course/Boradband Network/fpga/sim/atm.vhd} {2 {vcom -work work -2002 -explicit -novopt {F:/course/Boradband Network/fpga/sim/atm.vhd}
Model Technology ModelSim SE vcom 6.1d Compiler 2006.01 Jan 23 2006
-- Loading package standard
-- Loading package std_logic_1164
-- Loading package std_logic_arith
-- Loading package std_logic_unsigned
-- Compiling entity atm
-- Compiling architecture rtl of atm
** Warning: [4] F:/course/Boradband Network/fpga/sim/atm.vhd(69): (vcom-1207) An abstract literal and an identifier must have a separator between them.
** Warning: [4] F:/course/Boradband Network/fpga/sim/atm.vhd(73): (vcom-1207) An abstract literal and an identifier must have a separator between them.

} {} {}} {F:/course/Boradband Network/fpga/sim/decoder.vhd} {1 {vcom -work work -2002 -explicit -novopt {F:/course/Boradband Network/fpga/sim/decoder.vhd}
Model Technology ModelSim SE vcom 6.1d Compiler 2006.01 Jan 23 2006
-- Loading package standard
-- Loading package std_logic_1164
-- Loading package std_logic_arith
-- Loading package std_logic_unsigned
-- Compiling entity decoder
-- Compiling architecture behavior of decoder

} {} {}} {F:/course/Boradband Network/fpga/sim/encoder.vhd} {1 {vcom -work work -2002 -explicit -novopt {F:/course/Boradband Network/fpga/sim/encoder.vhd}
Model Technology ModelSim SE vcom 6.1d Compiler 2006.01 Jan 23 2006
-- Loading package standard
-- Loading package std_logic_1164
-- Loading package std_logic_arith
-- Loading package std_logic_unsigned
-- Compiling entity encoder
-- Compiling architecture behavior of encoder

} {} {}} {F:/course/Boradband Network/fpga/sim/sender.vhd} {1 {vcom -work work -2002 -explicit -novopt {F:/course/Boradband Network/fpga/sim/sender.vhd}
Model Technology ModelSim SE vcom 6.1d Compiler 2006.01 Jan 23 2006
-- Loading package standard
-- Loading package std_logic_1164
-- Loading package std_logic_arith
-- Loading package std_logic_unsigned
-- Compiling entity sender
-- Compiling architecture rtl of sender

} {} {}} {F:/course/Boradband Network/fpga/sim/receiver.vhd} {1 {vcom -work work -2002 -explicit -novopt {F:/course/Boradband Network/fpga/sim/receiver.vhd}
Model Technology ModelSim SE vcom 6.1d Compiler 2006.01 Jan 23 2006
-- Loading package standard
-- Loading package std_logic_1164
-- Loading package std_logic_arith
-- Loading package std_logic_unsigned
-- Compiling entity receiver
-- Compiling architecture rtl of receiver

} {} {}}