_info

atm信元检测

m255
13
cModel Technology
dC:\Modeltech_6.2b\examples
T_opt
VFMoGHTRH;8F=KQZkU9>aZ0
04 3 3 work atm rtl 0
o-quiet -auto_acc_if_foreign -work work
tExplicit 1
OE;O;6.2b;35
Eatm
w1182415772
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_unsigned hEMVMlaNCR^<OOoVNV;m90
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
dF:\course\Boradband Network\fpga\sim
FF:/course/Boradband Network/fpga/sim/atm.vhd
l0
L6
VdKL<cEJca_HGh9VJRYc>c3
OE;C;6.1d;31
32
o-work work -2002 -explicit
tExplicit 1 GenerateLoopIterationMax 100000
Artl
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_unsigned hEMVMlaNCR^<OOoVNV;m90
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work atm dKL<cEJca_HGh9VJRYc>c3
l47
L15
VJE=VViWAzWbo]IJ6]_BIk2
OE;C;6.1d;31
32
M3 ieee std_logic_1164
M2 ieee std_logic_unsigned
M1 ieee std_logic_arith
o-work work -2002 -explicit
tExplicit 1 GenerateLoopIterationMax 100000
Edecoder
w1182414156
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_unsigned hEMVMlaNCR^<OOoVNV;m90
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
dF:\course\Boradband Network\fpga\sim
FF:/course/Boradband Network/fpga/sim/decoder.vhd
l0
L6
V>dP51kO_^9Pz@AjU;I`ib3
OE;C;6.1d;31
32
o-work work -2002 -explicit
tExplicit 1 GenerateLoopIterationMax 100000
Abehavior
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_unsigned hEMVMlaNCR^<OOoVNV;m90
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work decoder >dP51kO_^9Pz@AjU;I`ib3
l34
L23
VCTm9B8LK:f5H8H731U^U82
OE;C;6.1d;31
32
M3 ieee std_logic_1164
M2 ieee std_logic_unsigned
M1 ieee std_logic_arith
o-work work -2002 -explicit
tExplicit 1 GenerateLoopIterationMax 100000
Eencoder
w1182163980
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_unsigned hEMVMlaNCR^<OOoVNV;m90
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
dF:\course\Boradband Network\fpga\sim
FF:/course/Boradband Network/fpga/sim/encoder.vhd
l0
L6
VO;V[RRlU@be1LmXbZ5Jm`1
OE;C;6.1d;31
32
o-work work -2002 -explicit
tExplicit 1 GenerateLoopIterationMax 100000
Abehavior
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_unsigned hEMVMlaNCR^<OOoVNV;m90
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work encoder O;V[RRlU@be1LmXbZ5Jm`1
l20
L17
V8BPZaijNETdbJoiRF0`@o0
OE;C;6.1d;31
32
M3 ieee std_logic_1164
M2 ieee std_logic_unsigned
M1 ieee std_logic_arith
o-work work -2002 -explicit
tExplicit 1 GenerateLoopIterationMax 100000
Ereceiver
w1182415823
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_unsigned hEMVMlaNCR^<OOoVNV;m90
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
dF:\course\Boradband Network\fpga\sim
FF:/course/Boradband Network/fpga/sim/receiver.vhd
l0
L6
VZjnE2g_9HT4c;=RaUKbjW3
OE;C;6.1d;31
32
o-work work -2002 -explicit
tExplicit 1 GenerateLoopIterationMax 100000
Artl
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_unsigned hEMVMlaNCR^<OOoVNV;m90
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work receiver ZjnE2g_9HT4c;=RaUKbjW3
l51
L18
VbCcFRVA^iok>7d:ken@j00
OE;C;6.1d;31
32
M3 ieee std_logic_1164
M2 ieee std_logic_unsigned
M1 ieee std_logic_arith
o-work work -2002 -explicit
tExplicit 1 GenerateLoopIterationMax 100000
Esender
w1182412134
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_unsigned hEMVMlaNCR^<OOoVNV;m90
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
dF:\course\Boradband Network\fpga\sim
FF:/course/Boradband Network/fpga/sim/sender.vhd
l0
L6
VmGX7B5T<]@oaYBhbjj0L02
OE;C;6.1d;31
32
o-work work -2002 -explicit
tExplicit 1 GenerateLoopIterationMax 100000
Artl
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_unsigned hEMVMlaNCR^<OOoVNV;m90
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work sender mGX7B5T<]@oaYBhbjj0L02
l40
L15
VV_AHg7NV<8_H@QRm:WR7f1
OE;C;6.1d;31
32
M3 ieee std_logic_1164
M2 ieee std_logic_unsigned
M1 ieee std_logic_arith
o-work work -2002 -explicit
tExplicit 1 GenerateLoopIterationMax 100000