📄 interop_asmtoc.lst
字号:
0000: 80 3F JMP 0x0040
0002: 30 HALT
0003: 30 HALT
FILE: .\boot.asm
(0001) ;@Id: boot.tpl#6 @
(0002) ;=============================================================================
(0003) ; FILENAME: boot.asm
(0004) ; VERSION: 3.20
(0005) ; DATE: 10 October 2002
(0006) ;
(0007) ; DESCRIPTION:
(0008) ; M8C Boot Code from Reset.
(0009) ;
(0010) ; Copyright (C) Cypress MicroSystems 2001, 2002. All rights reserved.
(0011) ;
(0012) ; NOTES:
(0013) ; PSoC Designer's Device Editor uses a template file, BOOT.TPL, located in
(0014) ; the project's root directory to create BOOT.ASM. Any changes made to
(0015) ; BOOT.ASM will be overwritten every time the project is generated; therfore
(0016) ; changes should be made to BOOT.TPL not BOOT.ASM. Care must be taken when
(0017) ; modifying BOOT.TPL so that replacement strings (such as @PROJECT_NAME)
(0018) ; are not accidentally modified.
(0019) ;
(0020) ; The start of _main is at a fixed location so care must be taken when adding
(0021) ; user code for any interrupts within boot.asm. If too much code is added,the
(0022) ; end of BOOT.ASM will extend into _main and cause a linker error. The safest
(0023) ; way to add code for an interrupt is to LCALL or LJMP to a normal routine
(0024) ; located in a seperate file that contains the desired additional interrupt
(0025) ; code.
(0026) ;=============================================================================
(0027)
(0028) include ".\lib\interop_asmtoc_GlobalParams.inc"
(0029) include "m8c.inc"
(0030) include "m8ssc.inc"
(0031)
(0032) ;-----------------------------------------------------------------------------
(0033) ; Optimization flags
(0034) ;-----------------------------------------------------------------------------
(0035)
(0036) C_LANGUAGE_SUPPORT: equ 1 ;Set to 0 to optimize for ASM only
(0037)
(0038) ;-----------------------------------------------------------------------------
(0039) ; The following equate is required for proper operation. Reseting its value
(0040) ; is discouraged.
(0041) ;-----------------------------------------------------------------------------
(0042)
(0043) WAIT_FOR_32K: equ 1 ; Wait for Crystal to start before allowing main()
(0044) ; Is effective only if the crystal oscillator is
(0045) ; selected. If the designer choses to not WAIT,
(0046) ; then the ECO and PLL_Lock process must be taken
(0047) ; care of with user code.
(0048)
(0049) ;-----------------------------------------------------------------------------
(0050) ; Export Declarations
(0051) ;-----------------------------------------------------------------------------
(0052)
(0053) export __Start
(0054) export __Exit
(0055) export __bss_start
(0056)
(0057) export __lit_start
(0058) export __idata_start
(0059) export __data_start
(0060) export __func_lit_start
(0061) export __text_start
(0062)
(0063)
(0064) ;-----------------------------------------------------------------------------
(0065) ; Interrupt Vector Table
(0066) ;-----------------------------------------------------------------------------
(0067) ;
(0068) ; Interrupt vector table entries are 4 bytes long and contain the code
(0069) ; that services the interrupt (or causes it to be serviced).
(0070) ;
(0071) ;-----------------------------------------------------------------------------
(0072)
(0073)
(0074) AREA TOP(ROM, ABS)
(0075)
(0076) org 0 ;Reset Interrupt Vector
(0077) jmp __Start ;First instruction executed following a Reset
(0078)
(0079) org 04h ;Supply Monitor Interrupt Vector
(0080) halt ;Stop execution if power falls too low
0004: 30 HALT
(0081) reti
0005: 7E RETI
0006: 30 HALT
0007: 30 HALT
(0082)
(0083) org 08h ;PSoC Block DBA00 Interrupt Vector
(0084) // call void_handler
(0085) reti
0008: 7E RETI
0009: 30 HALT
000A: 30 HALT
000B: 30 HALT
(0086)
(0087) org 0Ch ;PSoC Block DBA01 Interrupt Vector
(0088) // call void_handler
(0089) reti
000C: 7E RETI
000D: 30 HALT
000E: 30 HALT
000F: 30 HALT
(0090)
(0091) org 10h ;PSoC Block DBA02 Interrupt Vector
(0092) // call void_handler
(0093) reti
0010: 7E RETI
0011: 30 HALT
0012: 30 HALT
0013: 30 HALT
(0094)
(0095) org 14h ;PSoC Block DBA03 Interrupt Vector
(0096) // call void_handler
(0097) reti
0014: 7E RETI
0015: 30 HALT
0016: 30 HALT
0017: 30 HALT
(0098)
(0099) org 18h ;PSoC Block DCA04 Interrupt Vector
(0100) // call void_handler
(0101) reti
0018: 7E RETI
0019: 30 HALT
001A: 30 HALT
001B: 30 HALT
(0102)
(0103) org 1Ch ;PSoC Block DCA05 Interrupt Vector
(0104) // call void_handler
(0105) reti
001C: 7E RETI
001D: 30 HALT
001E: 30 HALT
001F: 30 HALT
(0106)
(0107) org 20h ;PSoC Block DCA06 Interrupt Vector
(0108) // call void_handler
(0109) reti
0020: 7E RETI
0021: 30 HALT
0022: 30 HALT
0023: 30 HALT
(0110)
(0111) org 24h ;PSoC Block DCA07 Interrupt Vector
(0112) // call void_handler
(0113) reti
0024: 7E RETI
0025: 30 HALT
0026: 30 HALT
0027: 30 HALT
(0114)
(0115) org 28h ;Analog Column 0 Interrupt Vector
(0116) // call void_handler
(0117) reti
0028: 7E RETI
0029: 30 HALT
002A: 30 HALT
002B: 30 HALT
(0118)
(0119) org 2Ch ;Analog Column 1 Interrupt Vector
(0120) // call void_handler
(0121) reti
002C: 7E RETI
002D: 30 HALT
002E: 30 HALT
002F: 30 HALT
(0122)
(0123) org 30h ;Analog Column 2 Interrupt Vector
(0124) // call void_handler
(0125) reti
0030: 7E RETI
0031: 30 HALT
0032: 30 HALT
0033: 30 HALT
(0126)
(0127) org 34h ;Analog Column 3 Interrupt Vector
(0128) // call void_handler
(0129) reti
0034: 7E RETI
0035: 30 HALT
0036: 30 HALT
0037: 30 HALT
(0130)
(0131) org 38h ;GPIO Interrupt Vector
(0132) // call void_handler
(0133) reti
0038: 7E RETI
0039: 30 HALT
003A: 30 HALT
003B: 30 HALT
(0134)
(0135) org 3Ch ;Sleep Timer Interrupt Vector
(0136) // call void_handler
(0137) reti
003C: 7E RETI
003D: 30 HALT
003E: 30 HALT
003F: 30 HALT
(0138)
(0139) ;-----------------------------------------------------------------------------
(0140) ; Start of Execution
(0141) ; CPU is operating at 3 MHz, change to 12 MHz
(0142) ; IO Bank is Bank0
(0143) ;-----------------------------------------------------------------------------
(0144) org 40h
(0145) __Start:
(0146) mov [bSSC_KEY1] ,0 ;Lockout Flash and Supervisiory operations
0040: 55 F8 00 MOV [248],0
(0147) mov [bSSC_KEYSP],0 ;(especially after a Software Reset Supervisory op)
0043: 55 F9 00 MOV [249],0
(0148)
(0149) mov A,__bss_end ;Set top of stack to end of used RAM
0046: 50 11 MOV A,17
(0150) IF (COMM_RX_PRESENT)
(0151) cmp A,40h
(0152) jnc .SetStack ; Stack must start at or above 40h
(0153) mov A,40h
(0154) ENDIF ;(COMM_RX_PRESENT)
(0155)
(0156) .SetStack:
(0157) swap SP,A
0048: 4E SWAP SP,A
(0158)
(0159) ;-------------------------------------------------------------------------
(0160) ; Set clock and BandGap trim if the operating voltage is 3.3V. On power
(0161) ; up, 5V is loaded, so this is only needed for 3.3V operation.
(0162) ;-------------------------------------------------------------------------
(0163)
(0164) IF (SUPPLY_VOLTAGE) ; 1 means 5.0V
(0165) ELSE ; 0 means 3.3V
(0166) mov [bSSC_TABLE_TableId], 1 ; Point to the Trim table
(0167) SSC_Action TABLE_READ ; Perform a table read supervisor call
(0168) M8C_SetBank1
(0169) mov A, [OSCILLATOR_TRIM_3V]
(0170) mov reg[IMO_TR], A ; Load the 3V trim oscillator setting
(0171) mov A, [VOLTAGE_TRIM_3V]
(0172) mov reg[BDG_TR], A ; Load the bandgap trim setting for 3V
(0173) M8C_SetBank0
(0174) ENDIF ;(SUPPLY_VOLTAGE)
(0175)
(0176) ;-------------------------------------------------------------------------
(0177) ; If the user has requested the Crystal oscillator then turn it on and
(0178) ; wait for it to stabilize and the system to switch over to it. The wait
(0179) ; will be one sleep timer period, approximately 1 second.
(0180) ;-------------------------------------------------------------------------
(0181)
(0182) IF (SELECT_32K & WAIT_FOR_32K)
(0183)
(0184) ; This will be used for XTAL and PLL startup, and is cancelled later on.
(0185) mov reg[INT_MSK0], INT_MSK0_Sleep ; Only turn on Sleep interrupt
(0186) mov reg[INT_MSK1], 0 ; Some could be on if s/w reset took place
(0187)
(0188) M8C_SetBank1
(0189)
(0190) mov reg[PRT1DM0],00h ; P1[0] & P1[1] Drive Mode to High Z because
(0191) mov reg[PRT1DM1],03h ; LoadConfigInit not run yet.
(0192) IF (PLL_MODE)
(0193) mov reg[ECO_TR],0Fh ; adjust ECO bias if in PLL lock mode
(0194) ENDIF ;(PLL_MODE)
(0195) M8C_SetBank0
(0196) M8C_ClearWDTAndSleep ; Reset the sleep timer
(0197)
(0198) M8C_SetBank1
(0199) mov reg[OSC_CR0], (OSC_CR0_Sleep_1Hz | SELECT_32K_JUST | OSC_CR0_CPU_12MHz)
(0200) M8C_SetBank0
(0201)
(0202) mov reg[INT_VC],0 ; Clear all pending interrupts
(0203) .WaitFor1s:
(0204) mov A, reg[INT_VC] ; read Interrupt Vector
(0205) jz .WaitFor1s ; TimeOut occurs on Sleep Timer 1s
(0206)
(0207) M8C_SetBank1
(0208) mov reg[ILO_TR], 40h ; turn off the ILO, 32K is now from the ECO
(0209) M8C_SetBank0
(0210)
(0211) ELSE ;!(SELECT_32K & WAIT_FOR_32K)
(0212) mov reg[INT_MSK0], 0 ; Turn off all interrupts
0049: 62 E0 00 MOV REG[224],0
(0213) mov reg[INT_MSK1], 0 ; some could be on if s/w reset took place
004C: 62 E1 00 MOV REG[225],0
(0214) M8C_SetBank1
004F: 71 10 OR F,16
(0215) mov reg[OSC_CR0], (OSC_CR0_Sleep_1Hz | OSC_CR0_CPU_12MHz)
0051: 62 E0 1A MOV REG[224],26
(0216) M8C_SetBank0
0054: 70 EF AND F,239
(0217) M8C_ClearWDTAndSleep ; Reset the sleep timer
0056: 62 E3 38 MOV REG[227],56
(0218)
(0219) ENDIF ;(SELECT_32K & WAIT_FOR_32K)
(0220)
(0221) ;-------------------------------------------------------------------------
(0222) ; Crystal is now fully operational.
(0223) ;-------------------------------------------------------------------------
(0224)
(0225) IF (PLL_MODE)
(0226) IF (SELECT_32K)
(0227) M8C_SetBank1
(0228) mov reg[OSC_CR0], (PLL_MODE_JUST | OSC_CR0_Sleep_64Hz | SELECT_32K_JUST | OSC_CR0_CPU_12MHz)
(0229) M8C_SetBank0
(0230)
(0231) M8C_ClearWDTAndSleep ; Reset the sleep timer
(0232)
(0233) mov reg[INT_VC],0 ; Clear all pending interrupts
(0234) .WaitFor16ms:
(0235) mov A, reg[INT_VC] ; read Interrupt Vector
(0236) jz .WaitFor16ms ; TimeOut occurs on Sleep Timer 16ms
(0237)
(0238) ELSE ;!(SELECT_32K)
(0239) ERROR_PSoC Using the PLL without the Crystal is invalid.
(0240) ENDIF ;(SELECT_32K)
(0241) ENDIF ;(PLL_MODE)
(0242)
(0243) ;-------------------------------------------------------------------------
(0244) ; default CT block RTopMux to OUT and RBotMux to AGND
(0245) ;-------------------------------------------------------------------------
(0246)
(0247) mov reg[ACA00CR0],05h
0059: 62 71 05 MOV REG[113],5
(0248) mov reg[ACA01CR0],05h
005C: 62 75 05 MOV REG[117],5
(0249) mov reg[ACA02CR0],05h
005F: 62 79 05 MOV REG[121],5
(0250) mov reg[ACA03CR0],05h
0062: 62 7D 05 MOV REG[125],5
(0251)
(0252) ;-------------------------------------------------------------------------
(0253) ; All the user selections and UserModule selections are now loaded.
(0254) ; !!! Except CPU frequency !!!! (CPU is runing at 12 MHz)
(0255) ;-------------------------------------------------------------------------
(0256)
(0257) Config:
(0258) lcall LoadConfigInit ; Configure PSoC blocks per Dev Editor
0065: 7C 01 60 LCALL 0x0160
(0259)
(0260)
(0261) IF (C_LANGUAGE_SUPPORT)
(0262) call InitCRunTime ; Initialize for C language
0068: 90 22 CALL 0x008C
(0263) ENDIF ;(C_LANGUAGE_SUPPORT)
(0264)
(0265) mov reg[INT_VC],0 ; Clear any pending interrupts which may
006A: 62 E2 00 MOV REG[226],0
(0266) ; have been set during the boot process.
(0267)
(0268) ;-------------------------------------------------------------------------
(0269) ; We always enable LVD / Voltage Monitoring by default
(0270) ;-------------------------------------------------------------------------
(0271)
(0272) M8C_EnableIntMask INT_MSK0, INT_MSK0_VoltageMonitor ; LVD only
006D: 43 E0 01 OR REG[224],1
(0273)
(0274) IF (SWITCH_MODE_PUMP ^ 1) ; !!! This value is 1 if the SMP is disabled !!!
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