i2c.inc

cypress的触摸按键模块介绍calibrating_capsense_with_the_csr_user_module___an2355_13.

;;*****************************************************************************
;;*****************************************************************************
;;  FILENAME: I2C.inc
;;  Version: 1.0, Updated on 2005/09/29 at 12:44:08
;;  Generated by PSoC Designer ver 4.2  b1013 : 02 September, 2004
;;
;;  DESCRIPTION: Assembler declarations for the EzI2Cs user module for the 
;;               29/27/24/22xxx PSoC family of devices
;;-----------------------------------------------------------------------------
;;  Copyright (c) Cypress MicroSystems 2004. All Rights Reserved.
;;*****************************************************************************
;;*****************************************************************************


;--------------------------------------------------
; Constants for I2C API's.
;--------------------------------------------------
I2C_DYNAMIC_ADDR:                      equ   1
I2C_ROM_ENABLE:                        equ   0
I2C_SYNC_FIX:                          equ   0

IF (I2C_ROM_ENABLE) 
   I2C_ADDR_MASK:                           equ  0x7E    ; Mask off ROM Addr and R/W bit
ELSE
   I2C_ADDR_MASK:                           equ  0xFE    ; Mask off  R/W bit
ENDIF

;; I2C_CFG Register definitions
I2C_CFG_PSelect:                            equ  0x40   ; Pin Select, 0 = P1,7/5, 1 = P1,1,0
I2C_CFG_BUS_ERROR_IE:                       equ  0x20   ; Enable Interrupt on bus error
I2C_CFG_STOP_IE:                            equ  0x10   ; Enable Interrupt on Stop condition
I2C_CFG_CLOCK_100K:                         equ  0x00   ; 100kHz Standard clock rate
I2C_CFG_CLOCK_400K:                         equ  0x04   ; 400kHz Fast Mode
I2C_CFG_CLOCK_50K:                          equ  0x08   ; 50kHz  Standard Mode
I2C_CFG_Master_EN:                          equ  0x02   ; Enable Master Mode.               
I2C_CFG_Slave_EN:                           equ  0x01   ; Enable Slave Mode.               

;; I2C_SCR Register definitions
I2C_SCR_BUS_ERROR:                          equ  0x80  ; Bus Error                    
I2C_SCR_LOST_ARB:                           equ  0x40  ; Lost Arbitration  (Master Only)
I2C_SCR_STOP_STATUS:                        equ  0x20  ; Stop Status                  
I2C_SCR_ACK:                                equ  0x10  ; ACK Status                   
I2C_SCR_NAK:                                equ  0x00  ; NAK Status                   
I2C_SCR_ADDRESS:                            equ  0x08  ; Data is address.
I2C_SCR_TRANSMIT:                           equ  0x04  ; Sets direction of data flow                
I2C_SCR_LRB:                                equ  0x02  ; Last Received Bit                
I2C_SCR_BYTE_COM:                           equ  0x01  ; Byte Complete   

;; I2C_DR  Register definitions (Data Register)

;; I2C_MSCR Register definitions  (Master Mode Only)
I2C_MSCR_BUS_BUSY:                          equ  0x08  ; Bus is Busy with other trafic        
I2C_MSCR_MASTER_MODE:                       equ  0x04  ; ?????
I2C_MSCR_RESTART_REN:                       equ  0x02  ; Generate a Restart
I2C_MSCR_START_REN:                         equ  0x01  ; Generate a Start


;; Valid address
I2C_SLAVE_ADDR:                             equ  (0x38<<1)        ; Permanent Slave Address
I2C_ALT_SLAVE_ADDR:                         equ  ((0x38<<1)&0x80) ; Permanent Slave Address

I2C_ALT_ADDR_BIT:                           equ  0x80 ; Alternate Address bit
I2C_RW_FLAG:                                equ  0x01 ; Read/Write flag      
I2C_RD_FLAG:                                equ  0x01 ; Read/Write flag      
I2C_WR_FLAG:                                equ  0x00 ; Read/Write flag      

I2C_CFG_REG:    equ d6h                 ; I2C Configuration Register
I2C_SCR_REG:    equ d7h                 ; I2C Enable Master/Slave Block Operation
I2C_DR_REG: equ d8h                     ; I2C Status and Control Register
I2C_MSCR_REG:   equ d9h                 ; I2C Master Status and Control


;; Bit definitions for I2C_bState
I2C_ACTIVITY_MASK:      equ  0xB0      ; Activity Mask
I2C_ANY_ACTIVITY:       equ  0x80      ; Any I2C bus activity.
I2C_READ_ACTIVITY:      equ  0x20      ; I2C read activity at primary address.
I2C_WRITE_ACTIVITY:     equ  0x10      ; I2C write activity at primary address.

;--------------------------------------------------
;   I2C API Constants
;--------------------------------------------------

I2C_INT_REG:                               equ 0x0de
I2C_INT_MASK:                              equ 0x01


;I2C_(status and control) reg write macro
;----------------------------------------------------
;  I2C_SCR and I2C_MSCR reg write macro
;
;  Use the following macros to write to the I2C_SCR register
;  Usage:    SetI2C_SCR  WRITE_VALUE
;
;  where WRITE_VALUE is the data to be writen
;
;----------------------------------------------------


; Write to the  I2C_SCR register
    macro SetI2C_SCR
IF (I2C_SYNC_FIX)
        or    F, FLAG_XIO_MASK            ; set bank1
        push  X
        mov   X, A                        ; if data for I2C_SCR was in A save it in X
        mov   A, reg[OSC_CR0]             ;
        push  A
        and   A, ~0x07                          ; Mask off CPU speed
        or    A, 0x01                           ; Set CPU to 6 MHz
        mov   reg[OSC_CR0], A                   ; 
        and   F, ~FLAG_XIO_MASK                 ; set bank0
        mov   A, X                              ; if the operation uses data in A get it out of X
        mov   reg[I2C_SCR_REG], @0 ; write data to reg[I2C_SCR]
        or    F, FLAG_XIO_MASK                  ; set bank1
        pop   A                                 ; restore original clock speed
        mov   reg[OSC_CR0], A
        and   F, ~FLAG_XIO_MASK                 ; set bank0
        mov   A, X                              ; if A was data restore it from X now
        pop   X                                 ; restore original accumulator
ELSE
        mov   reg[I2C_SCR_REG], @0 ; write data to reg[I2C_SCR]
ENDIF
    endm

; end of file I2C.inc