i2cint.asm

cypress的触摸按键模块介绍calibrating_capsense_with_the_csr_user_module___an2355_13.

;;*****************************************************************************
;;*****************************************************************************
;;  FILENAME: I2CINT.asm
;;  Version: 1.0, Updated on 2005/09/29 at 12:44:08
;;  Generated by PSoC Designer ver 4.2  b1013 : 02 September, 2004
;;
;;  DESCRIPTION: I2CFXM (Slave) Interrupt Service Routine
;;  
;;-----------------------------------------------------------------------------
;;  Copyright (c) Cypress MicroSystems 2003. All Rights Reserved.
;;*****************************************************************************
;;*****************************************************************************
include "I2C.inc"
include "m8c.inc"
include "memory.inc"




;-----------------------------------------------
;  Global Symbols
;-----------------------------------------------

export    I2C_varPage      
export   _I2C_varPage      

export    I2C_bState  
export   _I2C_bState

export    I2C_bRAM_RWoffset
export   _I2C_bRAM_RWoffset

export    I2C_bRAM_RWcntr
export   _I2C_bRAM_RWcntr

export   _I2C_pRAM_Buf_Addr_LSB
export    I2C_pRAM_Buf_Addr_LSB

IF (SYSTEM_LARGE_MEMORY_MODEL)
export   _I2C_pRAM_Buf_Addr_MSB
export    I2C_pRAM_Buf_Addr_MSB
ENDIF

export   _I2C_bRAM_Buf_Size                                
export    I2C_bRAM_Buf_Size    

export   _I2C_bRAM_Buf_WSize               
export    I2C_bRAM_Buf_WSize  

IF (I2C_ROM_ENABLE)
export    I2C_bROM_RWoffset
export   _I2C_bROM_RWoffset

export    I2C_bROM_RWcntr   
export   _I2C_bROM_RWcntr   

export   _I2C_pROM_Buf_Addr_LSB
export    I2C_pROM_Buf_Addr_LSB
export   _I2C_pROM_Buf_Addr_MSB
export    I2C_pROM_Buf_Addr_MSB

export   _I2C_bROM_Buf_Size                           
export    I2C_bROM_Buf_Size

ENDIF


AREA InterruptRAM (RAM, REL, CON)

;-----------------------------------------------
; Variable Allocation
;-----------------------------------------------


;; Exported variables
 _I2C_varPage:                                     ; This points to the variable page
  I2C_varPage:          

 _I2C_bState:
  I2C_bState:                                blk 1

;; RAM space variables
 _I2C_bRAM_RWoffset:                               ; RAM address counter.  This is reset each time
  I2C_bRAM_RWoffset:                         blk 1 ; a read or write is initiated.

 _I2C_bRAM_RWcntr:                                 ; RAM Read/Write counter.  Keeps track of offset 
  I2C_bRAM_RWcntr:                           blk 1 ; during a read or write operation.  Reset to
                                                      ; _bRAM_RWoffset at start of R/W command.

IF (SYSTEM_LARGE_MEMORY_MODEL)
 _I2C_pRAM_Buf_Addr_MSB:                           ; Base address (MSB) to RAM buffer.  
  I2C_pRAM_Buf_Addr_MSB:                     blk 1 ; 
ENDIF

 _I2C_pRAM_Buf_Addr_LSB:                           ; Base address (LSB) to RAM buffer.  
  I2C_pRAM_Buf_Addr_LSB:                     blk 1 ; 

 _I2C_bRAM_Buf_Size:                               ; Size of RAM buffer.   
  I2C_bRAM_Buf_Size:                         blk 1 ; 

 _I2C_bRAM_Buf_WSize:                              ; Portion of the RAM buffer size that is writable.
  I2C_bRAM_Buf_WSize:                        blk 1 ; 

;; ROM space variables
IF (I2C_ROM_ENABLE)
 _I2C_bROM_RWoffset:                               ; ROM address counter.  This is reset each time
  I2C_bROM_RWoffset:                         blk 1 ; a read is initiated

 _I2C_bROM_RWcntr:                                 ; ROM read counter. Keeps track of offset 
  I2C_bROM_RWcntr:                           blk 1 ; during a read operation.  Reset to
                                                      ; _bRAM_RWoffset at start of command.

 _I2C_pROM_Buf_Addr_MSB:                           ; ROM address (MSB) counter. (Relative to buffer)  This
  I2C_pROM_Buf_Addr_MSB:                     blk 1 ; counter is reset each time a read is initiated.

 _I2C_pROM_Buf_Addr_LSB:                           ; ROM address (MSB) counter. (Relative to buffer)  This
  I2C_pROM_Buf_Addr_LSB:                     blk 1 ; counter is reset each time a read is initiated.

 _I2C_bROM_Buf_Size:                               ; Size of RAM buffer.                            
  I2C_bROM_Buf_Size:                         blk 1 ; 

ENDIF

IF (I2C_DYNAMIC_ADDR) 

export    I2C_bAddr
export   _I2C_bAddr 

 _I2C_bAddr:
  I2C_bAddr:                                 blk 1
ENDIF

;-----------------------------------------------
;  EQUATES and TABLES
;-----------------------------------------------

;; Bit definitions for I2C_bState
STATE_IDLE:         equ  0x00      ; Wait for Correct Address
STATE_WR_RAM_ADDR:  equ  0x02      ; Wait for Secondary address on write
STATE_WR_RAM:       equ  0x04      ; Write RAM Data
STATE_RD_RAM:       equ  0x06      ; Read RAM Data

STATE_WR_ROM_ADDR:  equ  0x08      ; Wait for Secondary address on write
STATE_RD_ROM:       equ  0x0A      ; Read ROM Data

STATE_WR_ROM:       equ  0x0C      ; Write ROM (Not supported at this time)
STATE_RESET:        equ  0x0E      ; Reset state machine

STATE_MASK:         equ  0x0E
STATE_MASK2:        equ  0x0F      ; State Mask

ALT_MODE_FLAG:      equ  0x40      ; Reserved


;@PSoC_UserCode_INIT@ (Do not change this line.)
;---------------------------------------------------
; Insert your custom declarations below this banner
;---------------------------------------------------

;------------------------
;  Constant Definitions
;------------------------


;------------------------
; Variable Allocation
;------------------------


;---------------------------------------------------
; Insert your custom declarations above this banner
;---------------------------------------------------
;@PSoC_UserCode_END@ (Do not change this line.)




AREA UserModules (ROM, REL, CON)

export _I2C_ISR
;;****************************************************
;; I2C_ISR  main entry point from vector 60h
;;
;;****************************************************

 I2C_ISR:
_I2C_ISR:

    push A
    push X

;; The folling conditional code is only valid when using the
;; large memory model.
IF (SYSTEM_LARGE_MEMORY_MODEL)
   RAM_CHANGE_PAGE_MODE FLAG_PGMODE_2              ; Set Page Mode
   REG_PRESERVE IDX_PP                             ; Save Index Page Pointer
   REG_PRESERVE CUR_PP                             ; Save Current Page Pointer
   RAM_SETPAGE_CUR  >I2C_varPage      ; Set the current page mode Pointer
   mov   A, [I2C_pRAM_Buf_Addr_MSB]   ; Set Index page mode pointer
   RAM_SETPAGE_IDX A
ENDIF

    or   [I2C_bState],I2C_ANY_ACTIVITY                               ; Set Activity flag
    ; Check for Stop condition here.  If a stop condition
    ; exists, reset state machine to idle.
    tst  reg[I2C_SCR_REG],I2C_SCR_ADDRESS                            ; Check for address
    jz   .I2C_DO_STATE_MACHINE
    and  [I2C_bState],~STATE_MASK2                                   ; Clear State bits.                       
    or   [I2C_bState],STATE_IDLE                                     ; Address flag set, change to IDLE state

.I2C_DO_STATE_MACHINE:
    mov  A,[I2C_bState]    ; Get State
    and  A,STATE_MASK                   ; Mask off invalid states
    jacc I2C_STATE_JUMP_TABLE

I2C_STATE_JUMP_TABLE:
    jmp  I2C_STATE_IDLE                 ; Idle state
    jmp  I2C_STATE_WR_RAM_ADDR              ; Wait for Address write state
    jmp  I2C_STATE_WR_RAM               ; 
    jmp  I2C_STATE_RD_RAM
IF (I2C_ROM_ENABLE)        ; Only valid if ROM enabled
    jmp  I2C_STATE_WR_ROM_ADDR
    jmp  I2C_STATE_RD_ROM
    jmp  I2C_STATE_WR_ROM
ELSE
    jmp  I2C_STATE_RESET
    jmp  I2C_STATE_RESET
    jmp  I2C_STATE_RESET
ENDIF
    jmp  I2C_STATE_RESET

    jmp  I2C_ISR_END


    ;            *** I2C Idle state ***
    ;