iezw_512.v

EZW Embedded Zero-tree Wavelets Encoding,video codecs from the EZW family which use a 3D version of

			counter=0;
		end
end
always@(posedge clk)
begin
	if(!reset || !ready)
		SMAP_flag=1'b0;
	else
		if(flag==1'b0) begin
			if(counter==counter_stack)
				if(counter<5)
					if(In_IEZW==2'b10)
						SMAP_flag=1'b1;
					else
						SMAP_flag=1'b0;
				else
					SMAP_flag=1'b1;
			else
				SMAP_flag=1'b0;
		end
		else
			SMAP_flag=1'b0;
end

always@(posedge clk)
begin
	if(!reset || !ready)
		counter_stack=0;
	else
		if(flag==1'b0)
			if(stack_reset)
				if(stack_flag)
					counter_stack=5'b00100;
				else
					counter_stack=0;
			else
				if(stack_flag)
					counter_stack=counter_stack+5'b00100;
				else
					counter_stack=counter_stack;
		else
			counter_stack=5'h00;
end

always@(counter or In_IEZW or flag)
begin
	if(flag==1'b0)
		if(counter==0) begin
			if(In_IEZW==2'b10) begin
				stack_reset=1'b1;
				stack_flag=1'b0;
			end
			else begin
				stack_reset=1'b1;
				stack_flag=1'b1;
			end
		end
		else begin
			if(counter<5)begin
				if(In_IEZW==2'b10) begin
					stack_reset=1'b0;
					stack_flag=1'b0;
				end
				else begin
					stack_reset=1'b0;
					stack_flag=1'b1;
				end
			end
			else begin
				stack_reset=1'b0;
				stack_flag=1'b0;
			end
		end
	else begin
		stack_reset=1'b0;
		stack_flag=1'b0;
	end
end

always@(negedge clk)
begin
	if(!reset || !ready)
		flag=1'b1;
	else
		if(SMAP_flag)
			flag=1'b1;
		else
			if(SAQ_flag && flag_21==1'b0)
				flag=1'b0;
			else 
				flag=flag;
end

always@(negedge clk)
begin
	if(!reset || !ready) begin
		counter_21=5'h14;

	end
	else begin
		if(flag==1'b1 && counter_two==1'b1)
			if(counter_21==5'h14)
				counter_21=5'h00;
			else
				if(flag_21 || wire_en_smap)
					counter_21=counter_21;
				else
					counter_21=counter_21+1'b1;
		else
			counter_21=counter_21;
	end
end

always@(posedge clk)
begin
	if(!reset || !ready)//delay 1 clock
		SAQ_flag=1'b1;
	else
		if(counter_21==5'h14 && counter_two==1'b0)
			SAQ_flag=1'b1;
		else
			SAQ_flag=1'b0;
end

always@(negedge clk)
begin
	if(!reset || !ready)
		address_counter=((size/8*size/8)-1);//63;
	else
		if(SAQ_flag==1'b1 && flag_21==1'b0)
			address_counter=address_counter+1'b1;
		else
			address_counter=address_counter;
end

always@(negedge clk)
begin
	if(!reset || !ready)
		Done_reg=1'b0;
	else
		if(address_counter==((size/4*size/4)-1) && counter_21==5'h13)
			Done_reg=1'b1;
		else if(address_counter==(size/8*size/8) && counter_21==5'h13)
			Done_reg=1'b0;
		else
			Done_reg=Done_reg;
end

always@(posedge clk)
begin
	if(!reset || !ready)
		Done=1'b0;
	else
		if(address_counter==((size/4*size/4)-1) && counter_21==5'h14 && counter_two==1'b1 && flag==1'b1)
			Done=1'b1;
		else
			Done=1'b0;
end

endmodule


module IEZW_SMAP_process(clk,reset,ready,flag,In_IEZW,threshold,counter,counter_stack,address_counter,Write_en,Write_Data,Write_address);
input		clk,reset,ready,flag;
input	[1:0]	In_IEZW;
input	[7:0]	threshold;
input	[4:0]	counter,counter_stack;
input	[18:0]	address_counter;

output		Write_en;
output	[8:0]	Write_Data;
output	[18:0]	Write_address;


reg	[18:0]address_stack[4:0];
reg	[8:0]	Write_Data;
reg	[18:0]	Write_address,z_addr;
reg	[2:0]	stack_counter;
reg		write_flag,Write_en;
reg	[18:0]	frey_reg,frey_reg0;
reg		sign;

wire	[4:0]	temp_counter;

wire	[18:0]	stack_0,stack_1,stack_2,stack_3,stack_4;

assign	temp_counter=counter+5'b11111;

assign	stack_0=address_stack[0];
assign	stack_1=address_stack[1];
assign	stack_2=address_stack[2];
assign	stack_3=address_stack[3];
assign	stack_4=address_stack[4];

always@(posedge clk )
begin
if(!reset || !ready || flag) begin
	address_stack[0]=0;
	address_stack[1]=0;
	address_stack[2]=0;
	address_stack[3]=0;
	address_stack[4]=0;
	write_flag=1'b0;
	stack_counter=3'b000;
end
else
	if(counter==0) begin
		if(In_IEZW==2) begin
			address_stack[0]=0;
			address_stack[1]=0;
			address_stack[2]=0;
			address_stack[3]=0;
			address_stack[4]=0;
			write_flag=1'b0;
			stack_counter=3'b000;
		end
		else begin
			if(In_IEZW<2)
				write_flag=1'b1;
			else
				write_flag=1'b0;
			address_stack[0]=address_counter;
			address_stack[1]=0;
			address_stack[2]=0;
			address_stack[3]=0;
			address_stack[4]=0;
			stack_counter=3'b001;
		end
	end
	else begin
		if(In_IEZW==2)begin
			address_stack[0]=address_stack[0];
			address_stack[1]=address_stack[1];
			address_stack[2]=address_stack[2];
			address_stack[3]=address_stack[3];
			address_stack[4]=address_stack[4];
			write_flag=1'b0;
			stack_counter=stack_counter;
		end
		else begin 
			if(In_IEZW<2)
				write_flag=1'b1;
			else
				write_flag=1'b0;
			if(counter<5'b00101) begin
				frey_reg=address_stack[0];
				address_stack[stack_counter]={frey_reg[16:0],temp_counter[1:0]};
			end
			stack_counter=stack_counter+3'b001;
		end
	end
end

always@(posedge clk )
begin
	if(!reset || !ready || flag)
		sign=1'b0;
	else
		if(In_IEZW[1])
			sign=1'b0;
		else
			sign=In_IEZW[0];
end

always@(negedge clk)
begin
	if(!reset || !ready || flag) begin
		Write_Data=9'hxxx;
		Write_address=19'hxxxx;
		z_addr=19'hxxxx;
		Write_en=1'b0;
	end
	else begin
		if(write_flag) begin
			Write_en=1'b1;
			Write_Data={sign,threshold};
			if(counter==0) begin
				z_addr=address_stack[0];//change z scan address
				Write_address={z_addr[18:12],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
			end
			else if(counter<5'b00101) begin//[0]<<2+temp_counter[1:0];
				z_addr={frey_reg[16:0],temp_counter[1:0]};
				Write_address={z_addr[18:14],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
			end
			else begin
				frey_reg0=address_stack[temp_counter[4:2]];//address_stack[temp_counter[4:2]]<<2+temp_counter[1:0];
				z_addr={frey_reg0[16:0],temp_counter[1:0]};//change z scan address
				Write_address={z_addr[18:16],z_addr[15],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[14],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
			end
		end
		else begin
			Write_en=1'b0;
			Write_Data=9'hxxx;
			Write_address=19'hxxxx;
			z_addr=19'hxxxx;
		end
	end
end
endmodule


module IEZW_SAQ_process(clk,reset,ready,flag,counter_two,threshold,In_IEZW,Read_Data,counter_21,address_counter,flag_21,Write_en,Write_Data,address);
input		clk,reset,ready;
input		flag,counter_two;
input	[1:0]	In_IEZW;
input	[7:0]	threshold;
input	[8:0]	Read_Data;
input	[4:0]	counter_21;
input	[18:0]	address_counter;

output		flag_21,Write_en;
output	[8:0]	Write_Data;
output	[18:0]	address;

reg		flag_21,Write_en;
reg	[8:0]	Write_Data;
reg	[18:0]	z_addr,address;

always@(counter_two or Read_Data or flag)
begin
	if(~counter_two && flag)
		if(|Read_Data)
			flag_21=1'b1;
		else
			flag_21=1'b0;
	else
		flag_21=1'b0;
end

always@(negedge clk)
begin
	if(!reset || !ready || !flag) begin
		Write_Data=9'hxxx;
		Write_en=1'b0;
	end
	else
		if(!flag_21) begin
			Write_Data=9'hxxx;
			Write_en=1'b0;
		end
		else
			if(In_IEZW[0]) begin
				Write_Data={Read_Data | {1'b0,threshold>>1} | {1'b0,threshold>>2} };
				Write_en=1'b1;
			end
			else begin
				Write_Data=(Read_Data & ~{1'b0,(threshold>>1)}) |{1'b0,(threshold>>2)};
				Write_en=1'b1;
			end
end

always@(address_counter or counter_21)
begin
	case(counter_21)
	5'b00000:begin  z_addr=address_counter;
			address={z_addr[18:12],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	5'b00001:begin		z_addr={address_counter<<2};
			address={z_addr[18:14],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	5'b00010:begin  z_addr={address_counter<<2}+2'b01;
			address={z_addr[18:14],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	5'b00011:begin  z_addr={address_counter<<2}+2'b10;
			address={z_addr[18:14],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	5'b00100:begin  z_addr={address_counter<<2}+2'b11;
			address={z_addr[18:14],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	5'b00101:begin  z_addr={address_counter<<4};
			address={z_addr[18:16],z_addr[15],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[14],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	5'b00110:begin  z_addr={address_counter<<4}+4'h1;
			address={z_addr[18:16],z_addr[15],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[14],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	5'b00111:begin  z_addr={address_counter<<4}+4'h2;
			address={z_addr[18:16],z_addr[15],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[14],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	5'b01000:begin  z_addr={address_counter<<4}+4'h3;
			address={z_addr[18:16],z_addr[15],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[14],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	5'b01001:begin  z_addr={address_counter<<4}+4'h4;
			address={z_addr[18:16],z_addr[15],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[14],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	5'b01010:begin  z_addr={address_counter<<4}+4'h5;
			address={z_addr[18:16],z_addr[15],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[14],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	5'b01011:begin  z_addr={address_counter<<4}+4'h6;
			address={z_addr[18:16],z_addr[15],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[14],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	5'b01100:begin  z_addr={address_counter<<4}+4'h7;
			address={z_addr[18:16],z_addr[15],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[14],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	5'b01101:begin  z_addr={address_counter<<4}+4'h8;
			address={z_addr[18:16],z_addr[15],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[14],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	5'b01110:begin  z_addr={address_counter<<4}+4'h9;
			address={z_addr[18:16],z_addr[15],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[14],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	5'b01111:begin  z_addr={address_counter<<4}+4'ha;
			address={z_addr[18:16],z_addr[15],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[14],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	5'b10000:begin  z_addr={address_counter<<4}+4'hb;
			address={z_addr[18:16],z_addr[15],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[14],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	5'b10001:begin  z_addr={address_counter<<4}+4'hc;
			address={z_addr[18:16],z_addr[15],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[14],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	5'b10010:begin  z_addr={address_counter<<4}+4'hd;
			address={z_addr[18:16],z_addr[15],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[14],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	5'b10011:begin  z_addr={address_counter<<4}+4'he;
			address={z_addr[18:16],z_addr[15],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[14],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	5'b10100:begin	 z_addr={address_counter<<4}+4'hf;
			address={z_addr[18:16],z_addr[15],z_addr[13],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[14],z_addr[12],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	default:begin	  z_addr=address_counter;
			address={z_addr[18:12],z_addr[11],z_addr[9],z_addr[7],z_addr[5],z_addr[3],z_addr[1],z_addr[10],z_addr[8],z_addr[6],z_addr[4],z_addr[2],z_addr[0]};
		end
	endcase
end
endmodule