📄 back2bak.c
字号:
/*********************************************************************
* Filename: Back2bak.c
*
* Description: Back-to-back transmission and reception in SELF-TEST mode
*
* This test transmits data back-to-back at high speed without stopping.
* The received data is verified. Any error is flagged.
* MBX0 transmits to MBX16, MBX1 transmits to MBX17 and so on....
* This program illustrates the use of self-test mode
*
* Last update: 12/23/02
*********************************************************************/
#include "DSP28_Device.h"
#define TXCOUNT 1000 // Transmission will take place (TXCOUNT) times..
long i;
int j;
long loopcount = 0; // Counts the # of times the loop actually ran
long errorcount = 0; // Counts the # of times any error occured
unsigned long TestMbox1 = 0;
unsigned long TestMbox2 = 0;
unsigned long TestMbox3 = 0;
void InitECan(void);
void MBXcheck(long T1, long T2, long T3);
void MBXrd(int i);
main()
{
/* Initialize the CAN module */
InitECan();
/* Write to the MSGID field of TRANSMIT mailboxes MBOX0 - 15 */
ECanaMboxes.MBOX0.MSGID.all = 0x9555AAA0;
ECanaMboxes.MBOX1.MSGID.all = 0x9555AAA1;
ECanaMboxes.MBOX2.MSGID.all = 0x9555AAA2;
ECanaMboxes.MBOX3.MSGID.all = 0x9555AAA3;
ECanaMboxes.MBOX4.MSGID.all = 0x9555AAA4;
ECanaMboxes.MBOX5.MSGID.all = 0x9555AAA5;
ECanaMboxes.MBOX6.MSGID.all = 0x9555AAA6;
ECanaMboxes.MBOX7.MSGID.all = 0x9555AAA7;
ECanaMboxes.MBOX8.MSGID.all = 0x9555AAA8;
ECanaMboxes.MBOX9.MSGID.all = 0x9555AAA9;
ECanaMboxes.MBOX10.MSGID.all = 0x9555AAAA;
ECanaMboxes.MBOX11.MSGID.all = 0x9555AAAB;
ECanaMboxes.MBOX12.MSGID.all = 0x9555AAAC;
ECanaMboxes.MBOX13.MSGID.all = 0x9555AAAD;
ECanaMboxes.MBOX14.MSGID.all = 0x9555AAAE;
ECanaMboxes.MBOX15.MSGID.all = 0x9555AAAF;
/* Write to the MSGID field of RECEIVE mailboxes MBOX16 - 31 */
ECanaMboxes.MBOX16.MSGID.all = 0x9555AAA0;
ECanaMboxes.MBOX17.MSGID.all = 0x9555AAA1;
ECanaMboxes.MBOX18.MSGID.all = 0x9555AAA2;
ECanaMboxes.MBOX19.MSGID.all = 0x9555AAA3;
ECanaMboxes.MBOX20.MSGID.all = 0x9555AAA4;
ECanaMboxes.MBOX21.MSGID.all = 0x9555AAA5;
ECanaMboxes.MBOX22.MSGID.all = 0x9555AAA6;
ECanaMboxes.MBOX23.MSGID.all = 0x9555AAA7;
ECanaMboxes.MBOX24.MSGID.all = 0x9555AAA8;
ECanaMboxes.MBOX25.MSGID.all = 0x9555AAA9;
ECanaMboxes.MBOX26.MSGID.all = 0x9555AAAA;
ECanaMboxes.MBOX27.MSGID.all = 0x9555AAAB;
ECanaMboxes.MBOX28.MSGID.all = 0x9555AAAC;
ECanaMboxes.MBOX29.MSGID.all = 0x9555AAAD;
ECanaMboxes.MBOX30.MSGID.all = 0x9555AAAE;
ECanaMboxes.MBOX31.MSGID.all = 0x9555AAAF;
/* Initialize the mailbox RAM field of MBOX16 - 31 */
// This is needed to ensure the test indeed runs successfully everytime,
// since mailbox RAM may retain the correct data from a previous test.
ECanaMboxes.MBOX16.MDRL.all = 0;
ECanaMboxes.MBOX16.MDRH.all = 0;
ECanaMboxes.MBOX17.MDRL.all = 0;
ECanaMboxes.MBOX17.MDRH.all = 0;
ECanaMboxes.MBOX18.MDRL.all = 0;
ECanaMboxes.MBOX18.MDRH.all = 0;
ECanaMboxes.MBOX19.MDRL.all = 0;
ECanaMboxes.MBOX19.MDRH.all = 0;
ECanaMboxes.MBOX20.MDRL.all = 0;
ECanaMboxes.MBOX20.MDRH.all = 0;
ECanaMboxes.MBOX21.MDRL.all = 0;
ECanaMboxes.MBOX21.MDRH.all = 0;
ECanaMboxes.MBOX22.MDRL.all = 0;
ECanaMboxes.MBOX22.MDRH.all = 0;
ECanaMboxes.MBOX23.MDRL.all = 0;
ECanaMboxes.MBOX23.MDRH.all = 0;
ECanaMboxes.MBOX24.MDRL.all = 0;
ECanaMboxes.MBOX24.MDRH.all = 0;
ECanaMboxes.MBOX25.MDRL.all = 0;
ECanaMboxes.MBOX25.MDRH.all = 0;
ECanaMboxes.MBOX26.MDRL.all = 0;
ECanaMboxes.MBOX26.MDRH.all = 0;
ECanaMboxes.MBOX27.MDRL.all = 0;
ECanaMboxes.MBOX27.MDRH.all = 0;
ECanaMboxes.MBOX28.MDRL.all = 0;
ECanaMboxes.MBOX28.MDRH.all = 0;
ECanaMboxes.MBOX29.MDRL.all = 0;
ECanaMboxes.MBOX29.MDRH.all = 0;
ECanaMboxes.MBOX30.MDRL.all = 0;
ECanaMboxes.MBOX30.MDRH.all = 0;
ECanaMboxes.MBOX31.MDRL.all = 0;
ECanaMboxes.MBOX31.MDRH.all = 0;
/* Configure Mailboxes 0-15 as Tx, 16-31 as Rx */
ECanaRegs.CANMD.all = 0xFFFF0000;
/* Write to Master Control field */
ECanaMboxes.MBOX0.MCF.bit.DLC = 8;
ECanaMboxes.MBOX1.MCF.bit.DLC = 8;
ECanaMboxes.MBOX2.MCF.bit.DLC = 8;
ECanaMboxes.MBOX3.MCF.bit.DLC = 8;
ECanaMboxes.MBOX4.MCF.bit.DLC = 8;
ECanaMboxes.MBOX5.MCF.bit.DLC = 8;
ECanaMboxes.MBOX6.MCF.bit.DLC = 8;
ECanaMboxes.MBOX7.MCF.bit.DLC = 8;
ECanaMboxes.MBOX8.MCF.bit.DLC = 8;
ECanaMboxes.MBOX9.MCF.bit.DLC = 8;
ECanaMboxes.MBOX10.MCF.bit.DLC = 8;
ECanaMboxes.MBOX11.MCF.bit.DLC = 8;
ECanaMboxes.MBOX12.MCF.bit.DLC = 8;
ECanaMboxes.MBOX13.MCF.bit.DLC = 8;
ECanaMboxes.MBOX14.MCF.bit.DLC = 8;
ECanaMboxes.MBOX15.MCF.bit.DLC = 8;
/* Write to the mailbox RAM field of MBOX0 - 15 */
ECanaMboxes.MBOX0.MDRL.all = 0x9555AAA0;
ECanaMboxes.MBOX0.MDRH.all = 0x89ABCDEF;
ECanaMboxes.MBOX1.MDRL.all = 0x9555AAA1;
ECanaMboxes.MBOX1.MDRH.all = 0x89ABCDEF;
ECanaMboxes.MBOX2.MDRL.all = 0x9555AAA2;
ECanaMboxes.MBOX2.MDRH.all = 0x89ABCDEF;
ECanaMboxes.MBOX3.MDRL.all = 0x9555AAA3;
ECanaMboxes.MBOX3.MDRH.all = 0x89ABCDEF;
ECanaMboxes.MBOX4.MDRL.all = 0x9555AAA4;
ECanaMboxes.MBOX4.MDRH.all = 0x89ABCDEF;
ECanaMboxes.MBOX5.MDRL.all = 0x9555AAA5;
ECanaMboxes.MBOX5.MDRH.all = 0x89ABCDEF;
ECanaMboxes.MBOX6.MDRL.all = 0x9555AAA6;
ECanaMboxes.MBOX6.MDRH.all = 0x89ABCDEF;
ECanaMboxes.MBOX7.MDRL.all = 0x9555AAA7;
ECanaMboxes.MBOX7.MDRH.all = 0x89ABCDEF;
ECanaMboxes.MBOX8.MDRL.all = 0x9555AAA8;
ECanaMboxes.MBOX8.MDRH.all = 0x89ABCDEF;
ECanaMboxes.MBOX9.MDRL.all = 0x9555AAA9;
ECanaMboxes.MBOX9.MDRH.all = 0x89ABCDEF;
ECanaMboxes.MBOX10.MDRL.all = 0x9555AAAA;
ECanaMboxes.MBOX10.MDRH.all = 0x89ABCDEF;
ECanaMboxes.MBOX11.MDRL.all = 0x9555AAAB;
ECanaMboxes.MBOX11.MDRH.all = 0x89ABCDEF;
ECanaMboxes.MBOX12.MDRL.all = 0x9555AAAC;
ECanaMboxes.MBOX12.MDRH.all = 0x89ABCDEF;
ECanaMboxes.MBOX13.MDRL.all = 0x9555AAAD;
ECanaMboxes.MBOX13.MDRH.all = 0x89ABCDEF;
ECanaMboxes.MBOX14.MDRL.all = 0x9555AAAE;
ECanaMboxes.MBOX14.MDRH.all = 0x89ABCDEF;
ECanaMboxes.MBOX15.MDRL.all = 0x9555AAAF;
ECanaMboxes.MBOX15.MDRH.all = 0x89ABCDEF;
/* Enable all Mailboxes */
ECanaRegs.CANME.all = 0xFFFFFFFF;
ECanaRegs.CANMC.bit.STM = 1; // Configure CAN for self-test mode
/* Begin transmitting */
/* while(1) */ // Uncomment this line for infinite transmissions
for(i=0; i < TXCOUNT; i++) // Uncomment this line for finite transmissions
{
ECanaRegs.CANTA.all = 0xFFFFFFFF;
ECanaRegs.CANTRS.all = 0x0000FFFF; // Set TRS for all transmit mailboxes
while(ECanaRegs.CANTA.all != 0x0000FFFF ) {} // Wait for all TAn bits to be set..
ECanaRegs.CANTA.all = 0x0000FFFF; // Clear all TAn
loopcount++;
// Read from Receive mailboxes and begin checking for data
for(j=0; j<16; j++) // Read & check 16 mailboxes
{
MBXrd(j); // This func reads the indicated mailbox data
MBXcheck(TestMbox1,TestMbox2,TestMbox3); // Checks the received data
}
}
asm(" ESTOP0"); // Stop here after program termination
}
/* This function reads the receive-mailbox contents */
void MBXrd(int MBXnbr)
{
volatile struct MBOX *Mailbox = (void *) 0x6180; // CAN Mailboxes
Mailbox = Mailbox + MBXnbr;
TestMbox1 = Mailbox->MDRL.all; // = 0x9555AAAn (n is the MBX number)
TestMbox2 = Mailbox->MDRH.all; // = 0x89ABCDEF (a constant)
TestMbox3 = Mailbox->MSGID.all; // = 0x9555AAAn (n is the MBX number)
} // MSGID of a rcv MBX is transmitted as the MDRL data.
/* This function checks the transmit and receive mailbox contents */
void MBXcheck(long T1, long T2, long T3)
{
if((T1 != T3) || ( T2 != 0x89ABCDEF))
{
errorcount++;
}
}
/*
This code is useful to check the proper operation of the CAN module, without another
CAN module in the network. This is possible only in self-test mode.
... */
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -