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📄 dlcrx.c

📁 2812的CAN通讯源代码,需要的朋友请下载试用
💻 C
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/*********************************************************************
* Filename: DLCRX.c                                                
*                                                                    
* Description: Checks the operation of DLC field for a Receive mailbox. 	
* 
* DLC for a receive mailbox is irrelevant. The DLC field of the received
* frame is copied in the DLC field of the receive mailbox.
* Various values of DLC field are tried for mailbox 23. When the transmitting
* node transmits various data frames with differing DLC values, the correct
* number of bytes can be seen copied in the mailbox RAM window.
*          
* Last update: 12/24/2002
*********************************************************************/

#include "DSP28_Device.h"

#define DLC_val 1   // DLC value attempted to be written into MSGCTRL register
					// Values 0 thru 8 may be tried..
long	i;

void InitECan(void);

main() 
{

/* Create a shadow register structure for the CAN control registers. This is
 needed, since, only 32-bit access is allowed to these registers. 16-bit access
 to these registers could potentially corrupt the register contents. This is
 especially true while writing to a bit (or group of bits) among bits 16 - 31 */

struct ECAN_REGS ECanaShadow;

/* Initialize the CAN module */

	InitECan();
	
/* Write to the MSGID field  */
    
    ECanaMboxes.MBOX23.MSGID.all = 0x008C0000; // Std Identifier (ID = 23)
            
/* Configure Mailbox under test as a Receive mailbox */

	ECanaShadow.CANMD.all = ECanaRegs.CANMD.all;	
	ECanaShadow.CANMD.bit.MD23 = 1;
	ECanaRegs.CANMD.all = ECanaShadow.CANMD.all; 
	
/* Enable Mailbox under test */
	
	ECanaShadow.CANME.all = ECanaRegs.CANME.all;	
	ECanaShadow.CANME.bit.ME23 = 1;	
	ECanaRegs.CANME.all = ECanaShadow.CANME.all; 
	
/* Write to Master Control reg */   // Writes to MCF of a Rcv MBX are irrelevant
	
	ECanaMboxes.MBOX23.MCF.bit.DLC = DLC_val; // Writes to the DLC field of a Rcv MBX
		 								   // are not carried out
/* Begin Receiving */

    while(1) 						    			  	
    {
     while(ECanaRegs.CANRMP.bit.RMP23 == 0 ) {}  // Wait for RMP23 bit to be set..
     
     ECanaShadow.CANRMP.all = 0; 			    // See Note 1
     ECanaShadow.CANRMP.bit.RMP23 = 1;	    // Clear RMP23     
     ECanaRegs.CANRMP.all = ECanaShadow.CANRMP.all;
     
     asm (" NOP");        
    }   
}


/* 

Note 1: Initialize the "shadow-RMP" register to zero before setting any bit(s)
in order to clear it (them) in the RMP register. Otherwise, some other RMPn bit(s)
that is (are) set could be inadvertently cleared.

Note 2: Data frames with DLC values ranging from 0 - 8 may be transmitted 
from CANalyzer. Each time, the correct number of bytes will be received
and the DLC field updated accordingly.

CANalyzer configuration file: DLCRX.cfg
*/ 

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