91x_enet.c

STR912x Web Server V1.0 source code

  dmaRxDscrBase.dmaNext = (u32)pRXDescrChain;

  /* Setting the RX NEXT Descriptor Register inside the ENET */
  ENET_DMA->RXNDAR = (u32)&(dmaRxDscrBase);

  /* Set the max packet size  */
  dmaRxDscrBase.dmaStatCntl = EMAC_MAX_PACKET_SIZE;

  /* Setting the VALID bit */
  dmaRxDscrBase.dmaPackStatus = DMA_DSCR_RX_STATUS_VALID_MSK;

}

/*******************************************************************************
* Function Name  : ENET_TxDscrInit
* Description    : Initializes the Tx ENET descriptor chain with single descriptor
* Input          : None
* Output         : None
* Return         : None
*******************************************************************************/

void ENET_TxDscrInit(void)
{

  /* ENET Start Address */
  dmaTxDscrBase.dmaAddr = (u32)TxBuff;

  /* Next Descriptor Address */
  dmaTxDscrBase.dmaNext = (u32)&(dmaTxDscrBase);

  /* Initialize ENET status and control */
  dmaTxDscrBase.dmaStatCntl = 0;

  /* Tx next set to Tx decriptor base */
  ENET_DMA->TXNDAR = (u32)&(dmaTxDscrBase);

  /* Enable next enable */
  ENET_DMA->TXNDAR |= DMA_DSCR_NXT_NPOL_EN;

}

/*******************************************************************************
* Function Name  : ENET_Init
* Description    : ENET MAC, PHY and DMA initializations
* Input          : None
* Output         : None
* Return         : None
*******************************************************************************/
void ENET_Init (u32 operatingmode)
{

  u32 i;
  vu32 regValue;
  ENET_MACConfig *MAC_Config;
  ENET_MACConfig config;
  u32 macAddrLow, macAddrHigh;

  /* De-assert the SRESET bit of ENET + MAC devices */
  ENET_DMA->SCR &=~DMA_SCR_SRESET;
  MAC_Config =&config;
  /* Initialize MAC control register with common values */
  MAC_Config->ReceiveALL = DISABLE;
  if (SCU_GetHCLKFreqValue() > 50000)
  MAC_Config->MIIPrescaler = MIIPrescaler_2;
  MAC_Config->LoopbackMode = DISABLE;
  MAC_Config->AddressFilteringMode = MAC_Perfect_Multicast_Perfect;
  MAC_Config->VLANFilteringMode = VLANfilter_VLTAG;
  MAC_Config->PassWrongFrame = DISABLE;
  MAC_Config->LateCollision = DISABLE;
  MAC_Config->BroadcastFrameReception = ENABLE;
  MAC_Config->PacketRetry = ENABLE;
  MAC_Config->RxFrameFiltering = ENABLE;
  MAC_Config->AutomaticPadRemoval = ENABLE;
  MAC_Config->DeferralCheck = ENABLE;

  /* Configure MAC control register */
  ENET_MACControlConfig(MAC_Config);
  /* DMA initialization */
  /* Read the ENET DMA Status and Control Register */
  regValue = ENET_DMA->SCR;

  /* Setup Tx Max burst size */
  regValue &= ~(u32)DMA_SCR_TX_MAX_BURST_SZ;
  regValue |= (u32)DMA_SCR_TX_MAX_BURST_SZ_VAL;

  /* Setup Rx Max Burst size */
  regValue &= ~(u32)DMA_SCR_RX_MAX_BURST_SZ;
  regValue |= (u32)DMA_SCR_RX_MAX_BURST_SZ_VAL;

  /* Write Tx & Rx burst size to the ENET status and control register */
  ENET_DMA->SCR = regValue;

  /* Put the PHY in reset mode */
  ENET_MIIWriteReg(0x0,MAC_MII_REG_XCR, 0x8000);

  /* Delay to assure PHY reset */
  for(i=0; i<0xFFFFF; i++)
  {
    regValue = (u32) i;
  }
  /* initialize the opearting mode */
  ENET_SetOperatingMode(operatingmode);
  ENET_MIIWriteReg(0x0,MAC_MII_REG_XCR, operatingmode);

  /*set MAC physical*/
  macAddrLow  = (MAC_ADDR3<<24) + (MAC_ADDR2<<16) + \
                (MAC_ADDR1<<8) + MAC_ADDR0;

  // Higher MAC address
  macAddrHigh = (MAC_ADDR5<<8) + MAC_ADDR4;

  /* Write the Mac address Low Register */
  ENET_MAC->MAH = macAddrHigh;

  // MAC address low register
  ENET_MAC->MAL = macAddrLow;

  /* initialize Rx and Tx descriptors in memory */
  ENET_TxDscrInit();
  ENET_RxDscrInit();

}

/********************************************************************************
* Function Name  : ENET_HandleRxPkt
* Description    : receive a packet and copy it to memory pointed by ppkt.
* Input          : ppkt: pointer on application receive buffer.
* Output         : None
* Return         : ENET_NOK - If there is no packet
*                : ENET_OK  - If there is a packet
*******************************************************************************/
u32 ENET_HandleRxPkt ( void *ppkt)
{
  ENET_DMADSCRBase *pDescr;
  u16 size;
  u32  value;

  /* Check if the descriptor is owned by the ENET or CPU */
  value = (u32) (dmaRxDscrBase.dmaPackStatus & DMA_DSCR_RX_STATUS_VALID_MSK);
  if (value == DMA_DSCR_RX_STATUS_VALID_MSK) pDescr = NULL;
  else pDescr = &dmaRxDscrBase;

  /*check for validity*/
  if ( (pDescr != NULL)  && (pDescr->dmaAddr)  )
  {
    /*Get the size of the packet*/
    size = ((pDescr->dmaPackStatus & 0x7ff) - 4);

    MEMCOPY_L2S_BY4((u8*)ppkt, RxBuff, size); /*optimized memcopy function*/
    //memcpy(ppkt, RxBuff, size);   //string.h library*/
  }
  else
  /* Return error */
  return ENET_NOK;

  /* Give the buffer back to ENET */
  pDescr->dmaPackStatus = DMA_DSCR_RX_STATUS_VALID_MSK;

  /* Start the receive operation */
  ENET_DMA->RXSTR|= DMA_RX_START_FETCH;

  /* Return no error */
  return size;
}

/*******************************************************************************
* Function Name  : ENET_RxPacketGetSize
* Description    : Gets received packet size
* Input          : None
* Output         : None
* Return         : Size of the Rx packet
********************************************************************************/

u32 ENET_RxPacketGetSize(void)
{
  ENET_DMADSCRBase   *pDescr;
  u32  value;

  /* Check if the descriptor is owned by the ENET or CPU */
  value = (u32) (dmaRxDscrBase.dmaPackStatus & DMA_DSCR_RX_STATUS_VALID_MSK);
  if (value == DMA_DSCR_RX_STATUS_VALID_MSK) pDescr = NULL;
  else pDescr = &dmaRxDscrBase;

  /* Check for null */
  if(pDescr != NULL)
  {
    /* Return the size */
    return ((pDescr->dmaPackStatus & 0x7ff) - 4);
  }

  /* Return NUll */
  return NULL;
}

/*******************************************************************************
* Function Name  : ENET_TxPkt
* Description    : Transmit a packet
* Input          : ppkt: pointer to application packet Buffer
*                : size: Tx Packet size
* Output         : None
* Return         : None
*******************************************************************************/
void ENET_TxPkt(void *ppkt, u16 size)
{
  /* Copy the  application buffer to the driver buffer
     Using this MEMCOPY_L2L_BY4 makes the copy routine faster
     than memcpy */
  MEMCOPY_L2S_BY4((u8*)TxBuff, (u8*)ppkt, size);
  //memcpy(TxBuff, ppkt, size);

  /* Assign ENET address to Temp Tx Array */
  dmaTxDscrBase.dmaAddr = (u32)TxBuff;

  /* Setting the Frame Length*/
   dmaTxDscrBase.dmaStatCntl = (size&0xFFF);

  /* Start the ENET by setting the VALID bit in dmaPackStatus of current descr*/
  dmaTxDscrBase.dmaPackStatus = DMA_DSCR_TX_STATUS_VALID_MSK;

  /* Start the receive operation */
  ENET_DMA->TXSTR|= DMA_TX_START_FETCH;
}

/*******************************************************************************
* Function Name  : ENET_Start
* Description    : Enables ENET MAC reception / transmission & starts DMA fetch
* Input          : None
* Output         : None
* Return         : None
*******************************************************************************/

void  ENET_Start ( void)
{
  u32 value;

  /* Force a ENET abort by software for the receive block */
   ENET_DMA->RXSTR &=~ DMA_RX_START_DMA_EN;

  /* Force a ENET abort by software for the transmit block */
   ENET_DMA->TXSTR &=~DMA_TX_START_DMA_EN;

  /* Reset all interrupts */
  ENET_DMA->ISR = 0xFFFFFFFF;

  /* Setup Descriptor Fetch ENET_PhyDelay for Receive Block */
  value = ENET_DMA->RXSTR;
  value &= ~( DMA_RX_START_DFETCH_DLY );
  value |= DMA_RX_START_DFETCH_DEFAULT;
  ENET_DMA->RXSTR=  value;

  /* Setup Descriptor Fetch ENET_PhyDelay for Transmit Block */
  value = ENET_DMA->TXSTR;
  value &= ~( DMA_TX_START_DFETCH_DLY );
  value |= DMA_TX_START_DFETCH_DEFAULT;
  ENET_DMA->TXSTR= value;

  /* Set Tx underrun bit */
  value &= ~( DMA_TX_START_URUN );
  value |= DMA_TX_START_URUN;
  ENET_DMA->TXSTR = value;

  /* Clear the interrupts */
  ENET_DMA->IER = 0x0;

  /* MAC TX enable */
  ENET_MAC->MCR|= MAC_MCR_TE;

  /* MAC RX enable */
  ENET_MAC->MCR|= MAC_MCR_RE;

  /* Start the DMA Fetch */
  ENET_DMA->RXSTR|= DMA_RX_START_FETCH;
}


/*******************************************************************************
* Function Name  : ENET_InitClocksGPIO
* Description    : Reset, clocks & GPIO Ethernet Pin initializations
* Input          : None
* Output         : None
* Return         : None
*******************************************************************************/
void ENET_InitClocksGPIO(void)
{

  GPIO_InitTypeDef GPIO_Struct;

  SCU_AHBPeriphClockConfig(__ENET, ENABLE);
  SCU_AHBPeriphReset(__ENET,DISABLE);
  SCU_PHYCLKConfig(ENABLE);

  GPIO_DeInit(GPIO1);
  GPIO_Struct.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_2 |GPIO_Pin_3 |GPIO_Pin_4 |GPIO_Pin_7 ;
  GPIO_Struct.GPIO_Type = GPIO_Type_PushPull;
  GPIO_Struct.GPIO_Direction = GPIO_PinOutput;
  GPIO_Struct.GPIO_IPConnected = GPIO_IPConnected_Disable;
  GPIO_Struct.GPIO_Alternate=GPIO_OutputAlt2;
  GPIO_Init(GPIO1, &GPIO_Struct);


  GPIO_DeInit(GPIO5);
  GPIO_Struct.GPIO_Pin = GPIO_Pin_2 | GPIO_Pin_3;
  GPIO_Struct.GPIO_Type = GPIO_Type_PushPull;
  GPIO_Struct.GPIO_Direction = GPIO_PinOutput;
  GPIO_Struct.GPIO_IPConnected = GPIO_IPConnected_Disable;
  GPIO_Struct.GPIO_Alternate=GPIO_OutputAlt2;
  GPIO_Init(GPIO5, &GPIO_Struct);

}

/******************** (C) COPYRIGHT 2006 STMicroelectronics *******************/