main.c

最新的FreeRTOS源代码

		xAllTestsPass = pdFALSE;
	}

	if( xAreComTestTasksStillRunning() != pdTRUE )
	{
		xAllTestsPass = pdFALSE;
	}

	if( xAreSemaphoreTasksStillRunning() != pdTRUE )
	{
		xAllTestsPass = pdFALSE;
	}

	if( xAreBlockingQueuesStillRunning() != pdTRUE )
	{
		xAllTestsPass = pdFAIL;
	}

	if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
	{
		xAllTestsPass = ( portLONG ) pdFAIL;
	}

	if( xArePollingQueuesStillRunning() != pdTRUE )
	{
		xAllTestsPass = ( portLONG ) pdFAIL;
	}

	/* Mutual exclusion on this variable is not necessary as we only read it. */
	if( ulRegisterTestStatus != pdPASS )
	{
		xAllTestsPass = pdFALSE;
	}

	return xAllTestsPass;
}
/*-----------------------------------------------------------*/

static void prvSetupHardware( void )
{
	/* Ensure the interrupt controller is enabled in order that subsequent 
	code can successfully configure the peripherals. */
	XIntc_mMasterEnable( XPAR_OPB_INTC_0_BASEADDR );

	/* Initialise the GPIO used for the LED's. */
	vParTestInitialise();
}
/*-----------------------------------------------------------*/

static void vRegisterTest( void *pvParameters )
{
	for( ;; )
	{
		/* Fill the registers with their register number plus the offset 
		(added) value.  The added value is passed in as a parameter so
		is contained in r5. */
		asm volatile (	"addi r3, r5, 3		\n\t" \
						"addi r4, r5, 4		\n\t" \
						"addi r6, r5, 6		\n\t" \
						"addi r7, r5, 7		\n\t" \
						"addi r8, r5, 8		\n\t" \
						"addi r9, r5, 9		\n\t" \
						"addi r10, r5, 10	\n\t" \
						"addi r11, r5, 11	\n\t" \
						"addi r12, r5, 12	\n\t" \
						"addi r16, r5, 16	\n\t" \
						"addi r17, r5, 17	\n\t" \
						"addi r18, r5, 18	\n\t" \
						"addi r19, r5, 19	\n\t" \
						"addi r20, r5, 20	\n\t" \
						"addi r21, r5, 21	\n\t" \
						"addi r22, r5, 22	\n\t" \
						"addi r23, r5, 23	\n\t" \
						"addi r24, r5, 24	\n\t" \
						"addi r25, r5, 25	\n\t" \
						"addi r26, r5, 26	\n\t" \
						"addi r27, r5, 27	\n\t" \
						"addi r28, r5, 28	\n\t" \
						"addi r29, r5, 29	\n\t" \
						"addi r30, r5, 30	\n\t" \
						"addi r31, r5, 31	\n\t"
					);

		/* Now read back the register values to ensure they are as we expect. 
		This task will get preempted frequently so other tasks are likely to
		have executed since the register values were written. */

		/* r3 should contain r5 + 3.  Subtract 3 to leave r3 equal to r5. */
		asm volatile (	"addi r3, r3, -3 " );

		/* Compare r3 and r5.  If they are not equal then either r3 or r5
		contains the wrong value and *pulStatusAddr is to pdFAIL. */
		asm volatile (	"cmp r3, r3, r5				\n\t" \
						"beqi r3, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" 
					 );

		/* Repeat for all the other registers. */
		asm volatile ( 	"addi r4, r4, -4			\n\t" \
						"cmp r4, r4, r5				\n\t" \
						"beqi r4, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r6, r6, -6			\n\t" \
						"cmp r6, r6, r5				\n\t" \
						"beqi r6, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r7, r7, -7			\n\t" \
						"cmp r7, r7, r5				\n\t" \
						"beqi r7, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r8, r8, -8			\n\t" \
						"cmp r8, r8, r5				\n\t" \
						"beqi r8, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r9, r9, -9			\n\t" \
						"cmp r9, r9, r5				\n\t" \
						"beqi r9, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r10, r10, -10			\n\t" \
						"cmp r10, r10, r5			\n\t" \
						"beqi r10, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r11, r11, -11			\n\t" \
						"cmp r11, r11, r5			\n\t" \
						"beqi r11, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r12, r12, -12			\n\t" \
						"cmp r12, r12, r5			\n\t" \
						"beqi r12, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r16, r16, -16			\n\t" \
						"cmp r16, r16, r5			\n\t" \
						"beqi r16, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r17, r17, -17			\n\t" \
						"cmp r17, r17, r5			\n\t" \
						"beqi r17, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r18, r18, -18			\n\t" \
						"cmp r18, r18, r5			\n\t" \
						"beqi r18, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r19, r19, -19			\n\t" \
						"cmp r19, r19, r5			\n\t" \
						"beqi r19, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r20, r20, -20			\n\t" \
						"cmp r20, r20, r5			\n\t" \
						"beqi r20, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r21, r21, -21			\n\t" \
						"cmp r21, r21, r5			\n\t" \
						"beqi r21, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r22, r22, -22			\n\t" \
						"cmp r22, r22, r5			\n\t" \
						"beqi r22, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r23, r23, -23			\n\t" \
						"cmp r23, r23, r5			\n\t" \
						"beqi r23, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r24, r24, -24			\n\t" \
						"cmp r24, r24, r5			\n\t" \
						"beqi r24, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r25, r25, -25			\n\t" \
						"cmp r25, r25, r5			\n\t" \
						"beqi r25, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r26, r26, -26			\n\t" \
						"cmp r26, r26, r5			\n\t" \
						"beqi r26, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r27, r27, -27			\n\t" \
						"cmp r27, r27, r5			\n\t" \
						"beqi r27, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r28, r28, -28			\n\t" \
						"cmp r28, r28, r5			\n\t" \
						"beqi r28, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r29, r29, -29			\n\t" \
						"cmp r29, r29, r5			\n\t" \
						"beqi r29, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r30, r30, -30			\n\t" \
						"cmp r30, r30, r5			\n\t" \
						"beqi r30, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t" \
						"addi r31, r31, -31			\n\t" \
						"cmp r31, r31, r5			\n\t" \
						"beqi r31, 12				\n\t" \
						"lwi r3, r0, pulStatusAddr	\n\t" \
						"sw	r0, r0, r3				\n\t"
					);
	}
}