nt68167mcu.h

NT68617源程序代码集合

/*
********************************************************************************
*
*	                                LCD控制程序
*
*	                        NT68167中相关MCU的寄存器定义
*
*	文件名	: NT68167MCU.H
*	设计者	: Terry
********************************************************************************
*                         NT68167中相关MCU的特征描述
*
[X] Operating voltage Vcc ranges from 3.0V to 3.6V

[X] 8031 8-bit CMOS Micro-Processor (uP) core
  -  Intel compatible 8031 architecture
  -  256-byte Internal DATA Memory
  -  Two 16-Bit Timer/Counter
  -  Fully duplex UART
  -  5-vector interrupt structure with two programmable priority levels
  -  High level C-language for the F/W development

[X] On-Chip Oscillator 12MHz operating frequency
  -  12~96 MHz clock for CPU operating

[X] Reset
  -  External Reset Pin
  -  Low-Voltage Reset
  -  Watch-Dog Timer Reset
  -  ISP Reset

[X] Power Saving Mode
  -  Watch-Dog Timer Disable Function

[X] Program memory
  -  2/4 bank structure selectable memory mapping for program execution

[X] 3840 Bytes On-Chip Data Memory
  -  Extended 256 Bytes Internal DATA Memory of uP 8031 (idata: 0x00 ~ 0xFF)
  -  External Data Memory
     -  3072 Bytes General Purpose RAM Buffer (xdata: 0x9000~0x97FF & 0xF400~0xF7FF)
     -  512 Bytes EDID RAM Buffer for Hardware DDC Port (xdata: 0xF800 ~ 0xF9FF)

[X] A/D Converter
  -  7-Bit resolution
  -  4 selectable Input channels
  -  Conversion Range Absolutely Monotonic linear from GND to VCC
  -  Conversion time 12us

[X] PWM D/A Converter
  -  8-Bit resolution
  -  8 selectable output channels
     -  4 channels with 3.3V Push-Pull Structure
     -  4 channels with 5V Open-Drain Structure

[X] Interrupts 5-vector interrupt structure with two programmable priority levels for uP F8031
  -  TF0: Timer/Counter 0 Overflow Interrupt
  -  TF1: Timer/Counter 1 Overflow Interrupt
  -  RI+TI: UART Interrupts
  -  INT0
     -  Receive Interrupts from Scaler IRQ
     -  I2C Bus Port-0 (PB4, PB5) Interrupt
  -  INT1
     -  External Interrupts: INTE0 & INTE1

[X] DDC Port
  -  DDC channel for VGA ports
  -  Pure hardware solution for VESA DDC1/2B
  -  Selectable 128/256 Bytes EDID-Buffer for hardware DDC port

[X] I2C-bus
  -  Built-in master/slave I2C bus interfaces support VESA 2Bi/2B+
  -  SCL clock speed supports up to 400Kbps

[X] Parallel Bus
  -  Direct 8-bit address mapping, high-speed control interface bus for internal Scaler register access.
  -  Memory mapping address from $8000H to $80FFH (xdata: 0x8000H ~ 0x80FFH)
********************************************************************************
*/

#ifndef __NT68167MCU_H__
#define __NT68167MCU_H__

#include <absacc.h>

/*
================================================================================
=	BYTE Registers
================================================================================
*/
sfr P0    = 0x80;
sfr P1    = 0x90;
sfr P2    = 0xA0;
sfr P3    = 0xB0;
sfr PSW   = 0xD0;
sfr ACC   = 0xE0;
sfr B     = 0xF0;
sfr SP    = 0x81;
sfr DPL   = 0x82;
sfr DPH   = 0x83;
sfr PCON  = 0x87;
sfr TCON  = 0x88;
sfr TMOD  = 0x89;
sfr TL0   = 0x8A;
sfr TL1   = 0x8B;
sfr TH0   = 0x8C;
sfr TH1   = 0x8D;
sfr IE    = 0xA8;
sfr IP    = 0xB8;
sfr SCON  = 0x98;
sfr SBUF  = 0x99;


/*
================================================================================
=	位寄存器定义
================================================================================
*/
/*  PSW  */
sbit CY    = PSW^7;
sbit AC    = PSW^6;
sbit F0    = PSW^5;
sbit RS1   = PSW^4;
sbit RS0   = PSW^3;
sbit OV    = PSW^2;
sbit P     = PSW^0; //8052 only

/*  TCON  */
sbit TF1   = TCON^7;
sbit TR1   = TCON^6;
sbit TF0   = TCON^5;
sbit TR0   = TCON^4;
sbit IE1   = TCON^3;
sbit IT1   = TCON^2;
sbit IE0   = TCON^1;
sbit IT0   = TCON^0;

/*  IE  */
sbit EA    = IE^7;
sbit ES    = IE^4;
sbit ET1   = IE^3;
sbit EX1   = IE^2;
sbit ET0   = IE^1;
sbit EX0   = IE^0;

/*  IP  */
sbit PT2   = IP^5;
sbit PS    = IP^4;
sbit PT1   = IP^3;
sbit PX1   = IP^2;
sbit PT0   = IP^1;
sbit PX0   = IP^0;

/*  P3  */
sbit RD    = P3^7;
sbit WR    = P3^6;
sbit T1    = P3^5;
sbit T0    = P3^4;
sbit INT1  = P3^3;
sbit INT0  = P3^2;
sbit TXD   = P3^1;
sbit RXD   = P3^0;

/*  SCON  */
sbit SM0   = SCON^7;
sbit SM1   = SCON^6;
sbit SM2   = SCON^5;
sbit REN   = SCON^4;
sbit TB8   = SCON^3;
sbit RB8   = SCON^2;
sbit TI    = SCON^1;
sbit RI    = SCON^0;


/*
================================================================================
=	1、NT68167中MCU的扩漳特殊功能寄存器，这些寄存器分布在外部数据存储器空间
=	2、IDX大头的定义是寄存器的偏移量，主要用在初始当中
================================================================================
*/
/*
================================================================================
=	I/O口控制寄存器
================================================================================
*/
#define XFR_PORTA			XBYTE[0xF000]
#define XFR_PORTB			XBYTE[0xF001]
#define XFR_PORTC			XBYTE[0xF002]
#define IDX_PORTA			0x00
#define IDX_PORTB			0x01
#define IDX_PORTC			0x02

#define XFR_RDPA			XBYTE[0xF005]
#define XFR_RDPB			XBYTE[0xF006]
#define XFR_RDPC			XBYTE[0xF007]
#define IDX_RDPA			0x05
#define IDX_RDPB			0x06
#define IDX_RDPC			0x07


/*
================================================================================
=	看门狗寄存器
================================================================================
*/
#define XFR_WDT				XBYTE[0xF00A]
#define IDX_WDT				0x0A

/*
================================================================================
=	ADC控制寄存器
================================================================================
*/
#define XFR_ADCCON			XBYTE[0xF00B]
#define XFR_ADC0			XBYTE[0xF00C]
#define XFR_ADC1			XBYTE[0xF00D]
#define XFR_ADC2			XBYTE[0xF00E]
#define XFR_ADC3			XBYTE[0xF00F]
#define IDX_ADCCON			0x0B
#define IDX_ADC0			0x0C
#define IDX_ADC1			0x0D
#define IDX_ADC2			0x0E
#define IDX_ADC3			0x0F


/*
================================================================================
=	PWM控制寄存器
================================================================================
*/
#define XFR_ENPWM_HB		XBYTE[0xF011]
#define IDX_ENPWM_HB		0x11

#define XFR_PWM2			XBYTE[0xF014]
#define XFR_PWM3			XBYTE[0xF015]
#define XFR_PWM4			XBYTE[0xF016]
#define XFR_PWM5			XBYTE[0xF017]
#define XFR_PWM6			XBYTE[0xF018]
#define XFR_PWM7			XBYTE[0xF019]
#define XFR_PWM8			XBYTE[0xF01A]
#define XFR_PWM9			XBYTE[0xF01B]
#define IDX_PWM2			0x14
#define IDX_PWM3			0x15
#define IDX_PWM4			0x16
#define IDX_PWM5			0x17
#define IDX_PWM6			0x18
#define IDX_PWM7			0x19
#define IDX_PWM8			0x1A
#define IDX_PWM9			0x1B


/*
================================================================================
=	DDC控制寄存器
================================================================================
*/
#define XFR_DDC_CTL0		XBYTE[0xF01C]
#define XFR_DDC_ADDR0		XBYTE[0xF01D]
#define IDX_DDC_CTL0		0x1C
#define IDX_DDC_ADDR0		0x1D